DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Application
This Office Action is in response to Applicant’s application 18/671,172 filed on May 22 2024 in which claims 1-3 are pending.
Drawings
The drawings submitted on May 22 2024 have been reviewed and accepted by the Examiner.
Information Disclosure Statement
The Information Disclosure Statement (IDS), filed on June 14 2024 and December 06 2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosed therein has been considered by the Examiner.
Notation
References to patents will be in the form of (C: L) where C is the column number and L is the line number. References to pre-grant patent publications will be to the paragraph number in the form of (¶ XXXX).
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP §§ 706.02(l)(1) - 706.02(l)(3) for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims 1-3 are rejected on the ground of nonstatutory double patenting as unpatentable over claims 1-20 of U. S. Patent (US 12,015,046 B2) since the claims would improperly extend the "right to exclude" already granted in the patent. The subject matter claimed in the instant application is fully disclosed in the patent and is anticipated by the patent since the patent and the application are claiming common subject matter.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1 and 3 are rejected under AIA 35 U.S.C. 102(a)(1) as being anticipated by Muramastu et al. (US 2015/0200216 A1; hereinafter “Muramastu”).
Regarding claim 1, Muramastu teaches in an image sensor (Fig.3G; ¶0017) for sensing at least one of: deep ultraviolet (DUV) radiation, vacuum ultraviolet (VUV) radiation, extreme ultraviolet (EUV) radiation (¶ 0017), and charged particles, the image sensor comprising: a semiconductor membrane (301A, Fig.3G; ¶ 0044), the semiconductor membrane including circuit elements formed on a first surface of the semiconductor membrane (layers 302-307 are formed on the front side; ¶ 0044) and a pure boron layer formed on a second surface of the semiconductor membrane using plasma ALD (306; Fig.3G; ¶ 0015).
Regarding claim 3, Muramastu teaches an inspection system comprising: an illumination source (¶ 0017); a set of optics including an objective lens (¶0011), the set of optics configured to direct and focus radiation from the illumination source onto a sample (¶ 0010); a detector configured to receive light from the sample, wherein the set of optics are configured to collect, direct, and focus the light from the sample onto the detector, the detector including one or more image sensors (¶ 0010), wherein at least one sensor comprises: a semiconductor membrane comprising an epitaxial layer (301, Fig.3G; ¶ 0044), wherein the epitaxial layer includes a first surface and a second textured surface opposite of the first surface (top surface and bottom surface of 301, Fig.3G); one or more circuit elements formed on the first surface of the epitaxial layer (circuits formed on the front surface, Fig.3G); and a boron layer (306, Fig.3G) disposed on the second textured surface of the epitaxial layer using plasma ALD (¶ 0015).
Allowable Subject Matter
Claim 2 is allowed.
The following is a statement of reasons for the indication of allowable subject matter:
Claim 2 is allowed because the prior art does not teach the following limitations : “… wherein forming the second epitaxial layer includes generating a p-type dopant concentration gradient in the second epitaxial layer by gradually increasing a concentration of a p-type dopant used during formation of the second epitaxial layer such that a first layer portion of the second epitaxial layer has a lower p-type dopant concentration than a subsequently formed second layer portion of the second epitaxial layer, and a highest p-type dopant concentration of the second epitaxial layer is adjacent to the plasma ALD pure boron layer.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Mounir S Amer whose telephone number is (571)270-3683. The examiner can normally be reached Monday-Friday 9:00-5:30.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Mounir S Amer/Primary Examiner, Art Unit 2818