DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are pending in this office action and presented for examination. Claims 1-19 are newly amended by the response received August 14, 2025.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Examiner notes that tens of thousands of patent applications, beginning decades prior to the filing of the instant application, are directed to vector computation, and as such the title does not have sufficient informative value in indexing, classifying, and searching. Similarly, Examiner submits that registers, threads (and thus thread management), and computation circuitry were likewise widespread. Examiner generally notes that if a satisfactory title is not supplied by the applicant, the examiner will, at the time of allowance, change the title by an examiner’s amendment to increase informative value in indexing, classifying, and searching.
Drawings
The drawings are objected to because:
The drawing sheet numbering must be clear and larger than the numbers used as reference characters to avoid confusion. However, the amended drawings do not meet this requirement.
FIG. 1A as amended appears to have introduced new matter: compare the 4 horizontal lines that extend over all the computation channels of the original FIG. 1A with the 6 horizontal lines that extend over all the computation channels of the amended FIG. 1A.
In FIG. 1A as amended, it is unclear as to whether the lead line for a “Register block” (e.g., Register block #1) is intended to indicate one square (e.g., “0”), a vertical set of squares that do not extend beyond the horizontal lines that extend over all the computation channels (e.g., “0” and “32”), the entire vertical set of squares (e.g., “0”, “32”, “0”, “32”, “0”, “32”, “0”, “32”, “…”), or something else. Similarly, see FIG. 3B and 4A.
FIG. 1C as amended appears to have introduced new matter, as two instances of the ALU block being shaded in the original FIG. 1C are no longer present in the amended FIG. 1C.
In FIG. 4A as amended, “V5” and V7” mingle with lines.
Regarding Figure 14 as amended, “ALU” should not be placed upon hatched or shaded surfaces. A blank space may be left in the hatching or shading where “ALU” occurs so that it appears distinct.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claims 7 and 16 are objected to because of the following informalities. Appropriate correction is required.
In claim 7, line 7, “based on next adjacent address” should be “based on a next adjacent address” for grammatical clarity.
In claim 16, line 7, “based on next adjacent address” should be “based on a next adjacent address” for grammatical clarity.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 1 recites the limitation “thread management circuitry configured to identify at least one thread to be executed according to a relationship between first and second elements to be computed” in lines 8-10. However, the original disclosure does not appear to provide support for this limitation. For example, the original disclosure (e.g., [0026]) does not appear to provide support for identifying at least one thread to be executed according to a relationship between first and second elements to be computed.
Claims 2-9 are rejected for failing to alleviate the rejection of claim 1 above.
Claim 2 recites the limitation “thread management circuitry is configured with a nominal number of threads” in lines 2-3. However, the original disclosure does not appear to provide support for this limitation. For example, the original disclosure (e.g., [0026]) does not appear to provide support for thread management circuitry being configured with a “nominal” number of threads. Note that the limitation “the nominal number of threads” is recited in claim 2, line 3.
Claim 3 is rejected for failing to alleviate the rejection of claim 2 above.
Claim 3 recites the limitation “the block number of each register is determined according to a proportional relationship between a nominal vector length of the register unit and a number of the plurality of computation channels” in lines 1-4. However, the original disclosure does not appear to provide support for this limitation. For example, the original disclosure (e.g., [0031]) does not appear to provide support for determining the block number according to a proportional relationship between a “nominal” vector length of the register unit and a number of the plurality of computation channels.
Claim 10 recites the limitation “thread management circuitry configured to identify at least one thread to be executed according to a relationship between first and second elements to be computed” in lines 10-12. However, the original disclosure does not appear to provide support for this limitation. For example, the original disclosure (e.g., [0026]) does not appear to provide support for identifying at least one thread to be executed according to a relationship between first and second elements to be computed.
Claims 11-18 are rejected for failing to alleviate the rejection of claim 10 above.
Claim 11 recites the limitation “thread management circuitry is configured with a nominal number of threads” in line 2. However, the original disclosure does not appear to provide support for this limitation. For example, the original disclosure (e.g., [0026]) does not appear to provide support for thread management circuitry being configured with a “nominal” number of threads. Note that the limitation “the nominal number of threads” is recited in claim 11, lines 2-3.
Claim 12 is rejected for failing to alleviate the rejection of claim 11 above.
Claim 12 recites the limitation “the block number of each register is determined according to a proportional relationship between a nominal vector length of the register unit and a number of the plurality of computation channels” in lines 1-3. However, the original disclosure does not appear to provide support for this limitation. For example, the original disclosure (e.g., [0031]) does not appear to provide support for determining the block number according to a proportional relationship between a “nominal” vector length of the register unit and a number of the plurality of computation channels.
Claim 19 recites the limitation “thread management circuitry configured to identify at least one thread to be executed according to a relationship between first and second elements to be computed” in lines 10-12. However, the original disclosure does not appear to provide support for this limitation. For example, the original disclosure (e.g., [0026]) does not appear to provide support for identifying at least one thread to be executed according to a relationship between first and second elements to be computed.
Claim 20 is rejected for failing to alleviate the rejection of claim 19 above.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation “thread management circuitry configured to identify at least one thread to be executed according to a relationship between first and second elements to be computed” in lines 8-10. However, the metes and bounds of this limitation are indefinite. For example, it is unclear as to how there can be a relationship between two elements that have yet to be computed (and therefore would not appear to exist yet).
Claim 1 recites the limitation “the first and second elements corresponding to each thread in the corresponding computation channel” in lines 15-17. However, there is insufficient antecedent basis for this limitation in the claims. Also note that claim 1 recites the similar limitation “the first and second elements corresponding to the thread” in lines 17-18.
Claims 2-9 are rejected for failing to alleviate the rejections of claim 1 above.
Claim 2 recites the limitation “a nominal number of threads” in lines 2-3. However, the metes and bounds of this limitation are indefinite. For example, it is indefinite as to the manner by which the limitation "nominal" further limits the claim, in the context in which the limitation resides. What is “nominal” (i.e., trifling, insignificant) may vary from one person to another. Examiner notes that the disclosure does not explicitly or implicitly provide definite criteria by which whether a number of threads is “nominal” can be determined. Note that the limitation “the nominal number of threads” is recited in claim 2, line 3.
Claim 2 recites the limitation “a block number of each register” in lines 3-4. However, the metes and bounds of this limitation are indefinite. For example, it is indefinite as to whether each register embodies a same block number, or whether the registers referred to by “each register” embody respective block numbers. For example, it is unclear as to whether “a block number” is referring to a total number of blocks of each register collectively; a total number of blocks of any given register of “each register” which is the same as a total number of blocks of any other given register of “each register”; or, for example, particular block indexes of the registers referred to by “each register”. For example, it is unclear whether “each register” is referring to a first register and a second register of a particular computation channel, all registers of a particular computation channel, first and second registers of all computation channels, all registers of all computation channels, or something else. Note that “the block number of each register” is recited in claim 3, lines 1-2.
Claim 3 is rejected for failing to alleviate the rejections of claim 2 above.
Claim 3 recites the limitation “the block number of each register is determined according to a proportional relationship between a nominal vector length of the register unit and a number of the plurality of computation channels” in lines 1-4. However, the metes and bounds of this limitation are indefinite. For example, it is indefinite as to the manner by which the limitation "nominal" further limits the claim, in the context in which the limitation resides. What is “nominal” (i.e., trifling, insignificant) may vary from one person to another. Examiner notes that the disclosure does not explicitly or implicitly provide definite criteria by which whether a vector length is “nominal” can be determined.
Claim 4 recites the limitation “obtain an actual vector length of the first vector or the second vector” in line 4. However, it is indefinite as to whether the “actual vector length of” language is just being applied to “the first vector”, or is being applied to both “the first vector” and “the second vector”. Note that the limitation “the actual vector length” is recited in claim 4, line 8.
Claim 5 is rejected for failing to alleviate the rejection of claim 4 above.
Claim 5 recites the limitation “obtain a vector length threshold of the first vector or the second vector” in lines 3-4. However, it is indefinite as to whether the “vector length threshold of” language is just being applied to “the first vector”, or is being applied to both “the first vector” and “the second vector”. Note that the limitation “the vector length threshold” is recited in claim 5, line 7.
Claim 10 recites the limitation “thread management circuitry configured to identify at least one thread to be executed according to a relationship between first and second elements to be computed” in lines 10-12. However, the metes and bounds of this limitation are indefinite. For example, it is unclear as to how there can be a relationship between two elements that have yet to be computed (and therefore would not appear to exist yet).
Claim 10 recites the limitation “the first and second elements corresponding to each thread in the corresponding computation channel” in lines 17-18. However, there is insufficient antecedent basis for this limitation in the claims. Also note that claim 10 recites the similar limitation “the first and second elements corresponding to the thread” in lines 19-20.
Claims 11-18 are rejected for failing to alleviate the rejections of claim 10 above.
Claim 11 recites the limitation “a nominal number of threads” in line 2. However, the metes and bounds of this limitation are indefinite. For example, it is indefinite as to the manner by which the limitation "nominal" further limits the claim, in the context in which the limitation resides. What is “nominal” (i.e., trifling, insignificant) may vary from one person to another. Examiner notes that the disclosure does not explicitly or implicitly provide definite criteria by which whether a number of threads is “nominal” can be determined. Note that the limitation “the nominal number of threads” is recited in claim 11, lines 2-3.
Claim 11 recites the limitation “a block number of each register” in lines 3-4. However, the metes and bounds of this limitation are indefinite. For example, it is indefinite as to whether each register embodies a same block number, or whether the registers referred to by “each register” embody respective block numbers. For example, it is unclear as to whether “a block number” is referring to a total number of blocks of each register collectively; a total number of blocks of any given register of “each register” which is the same as a total number of blocks of any other given register of “each register”; or, for example, particular block indexes of the registers referred to by “each register”. For example, it is unclear whether “each register” is referring to a first register and a second register of a particular computation channel, all registers of a particular computation channel, first and second registers of all computation channels, all registers of all computation channels, or something else. Note that “the block number of each register” is recited in claim 12, lines 1-2.
Claim 12 is rejected for failing to alleviate the rejections of claim 11 above.
Claim 12 recites the limitation “the block number of each register is determined according to a proportional relationship between a nominal vector length of the register unit and a number of the plurality of computation channels” in lines 1-3. However, the metes and bounds of this limitation are indefinite. For example, it is indefinite as to the manner by which the limitation "nominal" further limits the claim, in the context in which the limitation resides. What is “nominal” (i.e., trifling, insignificant) may vary from one person to another. Examiner notes that the disclosure does not explicitly or implicitly provide definite criteria by which whether a vector length is “nominal” can be determined.
Claim 13 recites the limitation “obtain an actual vector length of the first vector or the second vector” in line 4. However, it is indefinite as to whether the “actual vector length of” language is just being applied to “the first vector”, or is being applied to both “the first vector” and “the second vector”. Note that the limitation “the actual vector length” is recited in claim 13, line 8.
Claim 14 is rejected for failing to alleviate the rejection of claim 13 above.
Claim 14 recites the limitation “obtain a vector length threshold of the first vector or the second vector” in lines 3-4. However, it is indefinite as to whether the “vector length threshold of” language is just being applied to “the first vector”, or is being applied to both “the first vector” and “the second vector”. Note that the limitation “the vector length threshold” is recited in claim 14, line 7.
Claim 17 recites the limitation “a first register block of the first array or the second array” in lines 3-4. However, it is indefinite as to whether “a first register block of” is associated merely with “the first array”, or both “the first array” and “the second array”. For the purposes of this office action, Examiner is interpreting this limitation akin to the analogous, but amended, limitation in claim 8.
Claim 19 recites the limitation “thread management circuitry configured to identify at least one thread to be executed according to a relationship between first and second elements to be computed” in lines 10-12. However, the metes and bounds of this limitation are indefinite. For example, it is unclear as to how there can be a relationship between two elements that have yet to be computed (and therefore would not appear to exist yet).
Claim 19 recites the limitation “the first and second elements corresponding to each thread in the corresponding computation channel” in lines 17-18. However, there is insufficient antecedent basis for this limitation in the claims. Also note that claim 19 recites the similar limitation “the first and second elements corresponding to the thread” in lines 19-20.
Claim 20 is rejected for failing to alleviate the rejections of claim 19 above.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. The claim(s) does/do not fall within at least one of the four categories of patent eligible subject matter because the claim(s) can be interpreted as software per se and thus can be made without an actual hardware apparatus. While the claim(s) do recite circuitry, paragraph [0073] discloses, for example: “The above apparatus according to the embodiments of the present disclosure may be implemented in hardware and firmware, or implemented as software or computer codes which can be stored in a recording medium (such as a CD-ROM, a RAM, a floppy disk, a hard disk or a magneto-optical disk), or implemented as computer codes which are downloaded through a network”. As such, Examiner recommends inserting the limitation “hardware” in an appropriate part of the claim and all relevant places in further dependent claims (e.g. replacing the limitation “computation circuitry” with the limitation “hardware computation circuitry”).
Response to Arguments
Applicant across pages 13-14 argues: “The Office indicated that a new Title is required as the current Title is allegedly not descriptive. Office Action, page 2. The Office also requires corrections to the abstract as the abstract is currently one long sentence. Id. Even though Applicant respectfully disagrees with the Office, Applicant deletes the Title and substitutes therefor a new Title indicative of the invention to which the claims are directed. In addition, Applicant amends the abstract section as suggested by the Office. Accordingly, Applicant respectfully requests withdrawal of the objection.”
In view of the aforementioned amendment to the abstract, the previously presented objection to the abstract is withdrawn. However, Examiner submits that the amendment to the title does not overcome the objection to the title — see the specification section above.
Applicant on page 14 argues: “The Office objected to the drawings. Office Action, 2-4. In response to the objections, Applicant amends the drawings as illustrated in the corrected drawing sheets to address the issues raised by the Office. In the corrected drawing sheets, FIGs. 1A-IC, 2, 3A, 3B, 4A-4C, and 5-7 are reproduced for clarity and rearranged in 9 sheets to address the formality issues. Figures 1B, 2, 4B, 5, 6, and 7 are further amended to include underlined reference characters. Figures 2, 5, 6, and 7 are further amended to include descriptive legends for better understanding of the figures. Applicant respectfully requests withdrawal of the objection to the drawings.”
In view of the aforementioned amendments, the associated previously presented objections to the drawings are withdrawn.
Applicant on page 14 argues: “Applicant respectfully traverses the rejection of claims 1-20 under 35 U.S.C. § 112(b). Without acquiescing in this rejection, but merely to expedite prosecution, Applicant amends claims 1-19 to address the Office's concerns. Applicant respectfully requests that the Office reconsider and withdraw the rejection of claims 1-20 under 35 U.S.C. § 112(b).”
Various previously pending rejections of the claims under 35 U.S.C. §112(b) are withdrawn in view of the amendments to the claims. However, other previously presented rejections under 35 U.S.C. §112(b) remain applicable, and in various cases the amendments to the claims introduce additional indefinite subject matter and written description issues; see the Claim Rejections - 35 USC § 112 section above.
Applicant across pages 14-15 argues: ‘Applicant respectfully traverses the rejection of claims 1-20 under 35 U.S.C. § 101. Without acquiescing in this rejection, but merely to expedite prosecution, Applicant amends the claims to provide hardware limitations in an appropriate part of the claim and all relevant places in further dependent claims by replacing "computation unit" with "computation circuitry," and replacing "thread management unit" with "thread management circuitry." Applicant respectfully submits that pending claims 1-20, as amended, fall within at least one of the four categories of patent eligible subject matter and cannot be interpreted as software per se. In particular, claims 1-9 are directed to a "vector computation apparatus," and thus fall within the "machine" category of patent eligible subject matter, and cannot be made without an actual hardware apparatus at least because of the term "circuitry" connotes a hardware structure to one of ordinary skill in the art. Similarly, claims 10-18 directed to a "processor" and claims 19 and 20 directed to a "system on chip" all fall within the "machine" category of patent eligible subject matter, and cannot be made without an actual hardware apparatus at least because of the terms "processor cores," "processor," and "circuitry" all connote hardware structures to one of ordinary skill in the art. Applicant respectfully requests that the Office reconsider and withdraw the rejection of claims 1-20 under 35 U.S.C. § 101.’
However, paragraph [0073] of the instant specification nevertheless conveys that “the above apparatus” may be implemented as software or computer codes. Examiner generally notes that circuitry may be implemented as software via hardware description languages such as VHDL.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/KEITH E VICARY/ Primary Examiner, Art Unit 2182