DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant's claim for foreign priority based on an application filed in
Italy (IT 102023-000011076) on May 31, 2023. Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 05/22/2024, 09/05/2024, 06/18/2025 and 06/03/2026 are being considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 5-7, 15 and 16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tsai et al. (US 20160141404 A1).
Regarding Claim 1, Tsai et al. teaches a HEMT device comprising:
a semiconductor body 102 having a semiconductive heterostructure 108, 110, 104, 112 (see annotated Fig. 10: 102, 108, 110, 104, 112, paragraph 0013-0016);
a gate region 402 on the semiconductor body 102 and elongated along a first axis Y (see annotated Fig. 10: 402, 102, paragraph 0042);
Note that, even though not explicitly mentioned or shown in Figures, the gate region 402 will be inherently elongated in the direction Y into the page of annotated Fig. 10.
a gate metal region 128 including a respective lower portion on the gate region 402 and laterally recessed with respect to the gate region 402, and a respective upper portion on the lower portion and having a width greater that the lower portion along a second axis X (see annotated Fig. 10: 128, 402, X, paragraph 0022);
a source metal region 122 extending on the semiconductor body 102 and including aluminum (see Fig. 10: 122, paragraph 0020);
a drain metal region 124 of conductive material, extending on the semiconductor body 102 (see Fig. 10: 124, paragraph 0020),
the source metal region 122 and the drain metal region 124 extending on opposite sides of the gate region 402 (see Fig. 10: 122, 124, 402, paragraph 0020);
and a first conductivity enhancement region 502 of aluminum nitride, extending on the semiconductor body 102 and laterally interposed between the source metal region 122 and the gate region 128 (see annotated Fig. 10: 502, 122, 128, paragraph 0044),
the first conductivity enhancement region 502 being in direct contact with the source metal region 122 and being separated from the gate region 128 (see annotated Fig. 10: 502, 122, 128).
Note that in Fig. 10, the first conductivity enhancement region 502 is separated from the gate region 128 by the layer 904.
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Regarding Claim 5, Tsai et al. teaches the HEMT device according to claim 1, wherein the semiconductor body 102 comprises a channel layer 104 of gallium nitride (see Fig. 10: 104, paragraph 0038).
Regarding Claim 6, Tsai et al. teaches the HEMT device according to claim 1, wherein the gate region 402 comprises a channel modulating region 114 of gallium nitride with a P-type conductivity (see Fig. 10: 114, 402, paragraph 0018).
Regarding Claim 7, Tsai et al. teaches a process for manufacturing a HEMT device, comprising:
forming a gate region 402 on a semiconductor body 102, the gate region 402 being elongated along a first axis Y (see annotated Fig. 10: 402, 102, paragraph 0042);
Note that, even though not explicitly mentioned or shown in Figures, the gate region 402 will be inherently elongated in the direction Y into the page of annotated Fig. 10.
forming a gate metal region 128 including a respective lower portion, which is on the gate region 402 and is laterally recessed with respect to the gate region 402, and a respective upper portion, which is on the lower portion and has a width greater that the lower portion along a second axis X (see annotated Fig. 10: 128, 402, X, paragraph 0022);
a source metal region 122 extending on the semiconductor body 102 and including aluminum (see Fig. 10: 122, paragraph 0020);
forming a drain metal region 124 of conductive material, which extends on the semiconductor body 102,the source metal region 122 and the drain metal region 124 extending on opposite sides of the gate region 402 (see Fig. 10: 122, 124, 402, paragraph 0020);
and forming a first conductivity enhancement region 502 of aluminum nitride, which extends on the semiconductor body 102 and is laterally interposed between the source metal region 122 and the gate region 128 (see annotated Fig. 10: 502, 122, 128, paragraph 0044),
the first conductivity enhancement region 502 being in direct contact with the source metal region 122 and being separated from the gate region 128 (see annotated Fig. 10: 502, 122, 128).
Note that in Fig. 10, the first conductivity enhancement region 502 is separated from the gate region 128 by the layer 904.
Regarding Claim 15, Tsai et al. teaches a HEMT device, comprising:
a heterostructure 108, 110, 104, 112 having a first surface S1 (see annotated Fig. 10: S1, 108, 110, 104, 112, paragraph 0013-0016);
a gate region 402 on the first surface S1, the gate region 402 having a second surface S2 opposing the first surface S2 (see annotated Fig. 10: 402, S1, S2, paragraph 0042);
a gate conductive region 128 on the second surface S2 (see annotated Fig. 10: 128, S2, paragraph 0022);
an insulating layer 120 on the first surface S1 and the second surface S2 (see annotated Fig. 10: 120, S1, S2, paragraph 0019);
a conductivity enhancement region 502 on the first surface S1 and the insulating layer 120, and spaced from the gate region 402 (see annotated Fig. 10: 502, 120, 402, S1, paragraph 0044);
and a source conductive region 122 on the first surface S1 and in contact with the conductivity enhancement region 502 (see annotated Fig. 10: 122, S1, 502, paragraph 0020).
Regarding Claim 16, Tsai et al. teaches the HEMT device of claim 15, wherein the conductivity enhancement region 502 comprises aluminum nitride (see annotated Fig. 10: 502, paragraph 0044).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Rejection Note: Italicized claim limitations are limitations not explicitly disclosed in the primary
reference but disclosed in the secondary references.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Tsai et al. (US 20160141404 A1), as applied to Claim 1 above, further in view of Jones et al. (US 20210111254 A1).
Regarding Claim 2, Tsai et al. teaches the HEMT device according to claim 1, further comprising:
a first dielectric region 120 of a dielectric material other than silicon nitride (i.e., silicon oxide, see paragraph 0019), which extends on top of the semiconductor body 102 (see annotated Fig. 10: 120, 120_119, 120_2, paragraph 0019),
an inner portion of the first dielectric region 120: 120_1, 120_2 (i.e., the sides of the layer 120) covering the gate region 402 (see annotated Fig. 10: 120, 402),
the lower portion of the gate metal region 128 extending through the inner portion of the first dielectric region 120 (see annotated Fig. 10: 120, 128);
a second dielectric region 126 of silicon nitride, which is laterally interposed between the gate region 402 and the drain metal region 124 and includes a respective first portion 126_1, which extends on the semiconductor body 102 and laterally contacts a first peripheral portion 120_1 of the first dielectric region 120, and a respective second portion 126_2, which extends on the first peripheral portion 120_1 of the first dielectric region 120 (see annotated Fig. 10: 126, 126_1, 126_2, 120, 120_1, 120_2, 124, paragraph 0021);
and a field plate of conductive material, which extends in part on the second portion of the second dielectric region, in direct contact, and in part on the first dielectric region, in direct contact;
and wherein the first conductivity enhancement region 502 comprises: a respective first portion 502_1, which extends on the semiconductor body 102 and laterally contacts the source metal region 122; and a respective second portion 502_2, which extends on a second peripheral portion 120_2 of the first dielectric region 120 (see annotated Fig. 10: 502, 502_1, 502_2, 120_2, 120).
Jone et al. teaches a HEMT device comprising the following limitations not disclosed in Tsai et al.:
a field plate 33 of conductive material, which extends in part on the second portion of the second dielectric region 28, in direct contact, and in part on the first dielectric region 27, in direct contact (see Fig. 1: 33, 28, 27, paragraph 0057);
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to have combined the teachings of Tsai et al. and Jones et al., in order to have a field plate of conductive material, which extends in part on the second portion of the second dielectric region, in direct contact, and in part on the first dielectric region, in direct contact. Doing so would allow for reduction of gate-to-drain capacitance and trapping effects, as well as reduction in peak electric field proximate the drain electrode, as recognized by Jones et al. (paragraph 0058).
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Tsai et al. (US 20160141404 A1), , further in view of Jones et al. (US 20210111254 A1), as applied to Claim 2 above, further in view of Liu et al. (CN 108461543 A1).
Regarding Claim 3, Tsai et al. teaches the HEMT device according to claim 2, further comprising: a second conductivity enhancement region 502’ of aluminum nitride, extending on the semiconductor body 102 and laterally interposed, in direct contact, between the first portion 126_1 of the second dielectric region 126 and the drain metal region 124 (see annotated Fig. 10: 502’, 126_1, 26, 124, paragraph 0044).
While Tsai teaches the second conductivity enhancement region 502’ is in direct contact with the drain metal region 124, it fails to teach to explicitly teach the second conductivity enhancement region 502’ is in direct contact with the first portion 126_1 of the second dielectric region 126.
However, Liu et al. teaches a HEMT device comprising a second conductivity enhancement region 6 of aluminum nitride, extending on the semiconductor body 1 and laterally interposed, in direct contact, between the first portion of the second dielectric region 8 and the drain metal region 11 (see Fig. 1: 6, 1, 8, 11, page 7, lines 7-11 and 16-17 in English Translation of Liu et al.).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to have combined the teachings of Tsai et al., Jones et al. and Liu et al., in order to have the second conductivity enhancement region laterally interposed, in direct contact, between the first portion of the second dielectric region and the drain metal region. Doing so would ensure the second conductivity enhancement region is spaced apart from the gate region by the second dielectric region, thereby not adversely effecting the gate modulation of the channel layer.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Tsai et al. (US 20160141404 A1), , further in view of Jones et al. (US 20210111254 A1), as applied to Claim 2 above, further in view of Iucolano et al. (US 20200194579 A1).
Regarding Claim 4, the Tsai et al. teaches the HEMT device according to claim 2, wherein the first dielectric region 120 includes:
a sealing region of a non-conductive material;
and a silicon oxide region 120, on the sealing region (Fig. 10: 120, paragraph 0021).
Iucolano et al. teaches a HEMT device comprising the following limitations not disclosed in Tsai et al.:
wherein the first dielectric region 108, 220 includes: a sealing region 108 of a non-conductive material; and a dielectric region 220, on the sealing region 108 (Fig. 2: 108, 220, paragraph 0030).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to have combined the teachings of Tsai et al., Jones et al. and Iucolano et al., in order to have the first dielectric region include a sealing region of a non-conductive material and the silicon oxide region of Tsai et al., on the sealing region. Doing so would enable better interface passivation, rendered by the sealing region.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Tsai et al. (US 20160141404 A1), as applied to Claim 7 above, further in view of Ichikawa et al. (US 20180277434 A1).
Regarding Claim 8, Tsai et al. teaches the process according to claim 7,
wherein forming the first conductivity enhancement region 502 comprises: forming a preliminary dielectric region 502’ of silicon nitride, which laterally contacts the source metal region 602 (annotated Fig. 10: 502, Fig. 6: 502’, 602, paragraph 0044, 0048);
and transforming the preliminary dielectric region into the first conductivity enhancement region with a thermal treatment.
Ichikawa et al. teaches a process for manufacturing a HEMT device, comprising the following limitations not disclosed in Tsai et al.:
forming a preliminary dielectric region 22 of silicon nitride and transforming the preliminary dielectric region into the first conductivity enhancement region with a thermal treatment (Fig. 1D: 22, paragraph 0015-0017).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to have combined the teachings of Tsai et al. and Ichikawa et al., in order to have a step of forming a preliminary dielectric region of silicon nitride and transforming the preliminary dielectric region into the first conductivity enhancement region with a thermal treatment. Doing so would activate the atomic elements (e.g. Aluminum from source region) that imparts conductivity, as recognized by Ichikawa et al. (paragraph 0017).
Claims 9-11 are rejected under 35 U.S.C. 103 as being unpatentable over Tsai et al. (US 20160141404 A1), further in view of Ichikawa et al. (US 20180277434 A1), as applied to Claim 8 above, further in view of Jones et al. (US 20210111254 A1).
Regarding Claim 9, Tsai et al. teaches the process according to claim 8, further comprising:
forming a first dielectric region 120 of a dielectric material other than silicon nitride (i.e., silicon oxide, see paragraph 0019), which extends on top of the semiconductor body 102, an inner portion of the first dielectric region 120 (i.e., the sides of the layer 120) covering the gate region 402, the lower portion of the gate metal region 128 extending through the inner portion of the first dielectric region 120 (see annotated Fig. 10: 120, , 402, 128, paragraph 0019);
forming a second dielectric region 126 of silicon nitride, which is laterally interposed between the gate region 402 and the drain metal region 124 and includes a respective first portion 126_1, which extends on the semiconductor body 102 and laterally contacts a first peripheral portion 120_1 of the first dielectric region 120, and a respective second portion 126_2, which extends on the first peripheral portion 120_1 of the first dielectric region 120 (see annotated Fig. 10: 126, 126_1, 126_2, 120, 120_1, 120_2, 124, paragraph 0021);
and forming a field plate of conductive material, which extends in part on and in direct contact with the second portion of the second dielectric region, and in part on and in direct contact with the first dielectric region;
and wherein forming the first conductivity enhancement region 502 comprises: forming a respective first portion 502_1 the first conductivity enhancement region 502, which extends on the semiconductor body 102 and laterally contacts the source metal region 122; and forming a second portion 502_2 the first conductivity enhancement region 502, which extends on a second peripheral portion 120_2 of the first dielectric region 120 (see annotated Fig. 10: 502, 502_1, 502_2, 120_2, 120).
Jones et al. teaches a process for manufacturing a HEMT device comprising the following limitations not disclosed in Tsai et al.:
forming a field plate 33 of conductive material, which extends in part on and in direct contact with the second portion of the second dielectric region 28, and in part on and in direct contact with the first dielectric region 27 (Fig. 1: 33, 27, 28, paragraph 0057);
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to have combined the teachings of Tsai et al. and Jones et al., in order to have a step of forming a field plate of conductive material, which extends in part on and in direct contact with the second portion of the second dielectric region, and in part on and in direct contact with the first dielectric region. Doing so would allow for reduction of gate-to-drain capacitance and trapping effects, as well as reduction in peak electric field proximate the drain electrode, as recognized by Jones et al. (paragraph 0058).
Regarding Claim 10, Tsai et al. teaches the process according to claim 9,
wherein forming the second dielectric region 126 comprises: after forming the preliminary dielectric region 502’, forming a dielectric layer 126’ of silicon nitride (Fig. 8: 126’, 502’ paragraph 0058);
and selectively removing a portion of the dielectric layer 126’, the remaining portion of the dielectric layer 126’ forming the second dielectric region 126 (Fig. 8: 126’, Fig. 9: 126, paragraph 0054).
Regarding Claim 11, Tsai et al. teaches the process according to claim 9,
wherein forming a source metal region 122 and a drain metal region 124 comprises: forming a source opening 606 and a drain opening 608 respectively through the preliminary dielectric region 502’, and the first portion of the second dielectric region (Fig. 6: 606, 608, 502’, paragraph 0050);
and forming the source metal region 122 and the drain metal region 124 so that the source metal region 122 and the drain metal region 124 respectively extend in the source opening 606 and the drain opening 608 (Fig. 7-8: 122, 124, 608, 606, paragraph 0050).
Jones et al. teaches the following limitations not disclosed in Tsai et al.:
forming a source opening and a drain opening respectively through the preliminary dielectric region 27, and the first portion of the second dielectric region 28 (Fig. 13: 27, 28, paragraph 0056).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to have combined the teachings of Tsai et al. and Jones et al., in order to have a step of forming a source opening and a drain opening respectively through the preliminary dielectric region, and the first portion of the second dielectric region. Doing so would allow the step of etching the source/drain openings and forming the source/drain regions in a later step after depositing the dielectric layers, thereby simplifying the manufacturing process.
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Tsai et al. (US 20160141404 A1), further in view of Ichikawa et al. (US 20180277434 A1), further in view of Jones et al. (US 20210111254 A1), as applied to Claim 9 above, further in view of Makiyama et al. (US 20100244104 A1).
Regarding Claim 12, Tsai et al. teach the process according to Claim 9,
wherein the preliminary dielectric region 502 includes a silicon nitride having a percentage of silicon such that the respective refractive index is greater or equal to 1.95;
and wherein the second dielectric region 126 includes silicon nitride having a percentage of silicon such that the respective refractive index is lower than 1.95.
Makiyama et al. teaches a process for manufacturing a HEMT device comprising the following limitations not disclosed in Tsai et al.:
wherein the preliminary dielectric region 7 includes a silicon nitride having a percentage of silicon such that the respective refractive index is greater or equal to 2.0 and less than or equal to 2.3 (Fig. 2K: 7, paragraph 0022);
Note that while Makiyama et al. fails to explicitly teach a refractive index is lower than 1.95, the disclosed value overlaps the claimed range. According to MPEP § 2144.05 (I), “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
and wherein the second dielectric region 6 includes silicon nitride having a percentage of silicon such that the respective refractive index is greater or equal to 1.8 and lower than or equal to 2.0 (Fig. 2K: 6, paragraph 0022).
Note that while Makiyama et al. fails to explicitly teach a refractive index is lower than 1.95, the disclosed value overlaps the claimed range. According to MPEP § 2144.05 (I), “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to have combined the teachings of Tsai et al., Jones et al. and Makiyama et al., in order to have the preliminary dielectric region include a silicon nitride having a percentage of silicon such that the respective refractive index is greater or equal to 1.95 and have the second dielectric region include silicon nitride having a percentage of silicon such that the respective refractive index is lower than 1.95. By doing so, the combination of low and high dielectric regions would significantly reduce the collapse of the drain current, as recognized by Makiyama et al. (see Fig. 3B and paragraph 0049).
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Tsai et al. (US 20160141404 A1), further in view of Ichikawa et al. (US 20180277434 A1), further in view of Jones et al. (US 20210111254 A1), as applied to Claim 9 above, further in view of Liu et al. (CN 108461543 A1).
Regarding Claim 13, Tsai et al. teaches the process according to claim 9, further comprising: forming a second conductivity enhancement region 502’ of aluminum nitride, extending on the semiconductor body 102 and laterally interposed, in direct contact, between the first portion 126_1 of the second dielectric region 126 and the drain metal region 124 (see annotated Fig. 10: 502’, 126_1, 26, 124, paragraph 0044).
While Tsai teaches the second conductivity enhancement region 502’ is in direct contact with the drain metal region 124, it fails to teach to explicitly teach the second conductivity enhancement region 502’ is in direct contact with the first portion 126_1 of the second dielectric region 126.
However, Liu et al. teaches a process of forming a HEMT device comprising forming a second conductivity enhancement region 6 of aluminum nitride, extending on the semiconductor body 1 and laterally interposed, in direct contact, between the first portion of the second dielectric region 8 and the drain metal region 11 (see Fig. 1: 6, 1, 8, 11, page 7, lines 7-11 and 16-17 in English Translation of Liu et al.).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to have combined the teachings of Tsai et al., Jones et al. and Liu et al., in order to have the second conductivity enhancement region laterally interposed, in direct contact, between the first portion of the second dielectric region and the drain metal region. Doing so would ensure the second conductivity enhancement region is spaced apart from the gate region by the second dielectric region, thereby not adversely affecting the gate modulation of the channel layer.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Tsai et al. (US 20160141404 A1), further in view of Ichikawa et al. (US 20180277434 A1), further in view of Jones et al. (US 20210111254 A1), further in view of Liu et al. (CN 108461543 A1), as applied to Claim 13 above, further in view of Makiyama et al. (US 20100244104 A1).
Regarding Claim 13, Tsai et al. teaches the process according to claim 13,
wherein the drain metal region 124 includes aluminum (Fig. 10: 124, paragraph 0020),
said process further comprising forming an additional preliminary dielectric region 120” (Fig. 6: 120’’, paragraph 0046),
the preliminary dielectric region and the additional preliminary dielectric region including a silicon nitride having a percentage of silicon such that the respective refractive index is greater or equal to 1.95;
and wherein forming a source metal region 122 and a drain metal region 124 comprises: forming a source opening 606 and a drain opening 608 respectively through the preliminary dielectric region 502’and the additional preliminary dielectric region 120’’ (Fig. 6: 120’’, 502’, 606, 608, paragraph 0048);
and forming the source metal region 122 and the drain metal region 124 so that the source metal region and the drain metal region respectively extend in the source opening 606 and the drain opening 608 (Fig. 8: 122, 124, 606, 608, paragraph 0049, 0050);
and wherein said thermal treatment causes the transformation of a part of the additional preliminary dielectric region into the second conductivity enhancement region, a part of the additional preliminary dielectric region forming the second dielectric region.
The combination of Ichikawa et al. and Makiyama et al. renders obvious the following limitations not explicitly disclosed by Tsai et al.:
the preliminary dielectric region 6 and the additional preliminary dielectric region 7 including a silicon nitride having a percentage of silicon such that the respective refractive index is greater or equal to 1.95 (as taught by Makiyama et al., see Fig. 2K: 7, 6, paragraph 0022);
Note that according to paragraph 0022, the refractive index of the silicon nitride film 6 is 1.8 to 2.0 (for example, about 2.0) and the refractive index of the silicon nitride film 7 is 2.0 to 2.3, both ranges overlap the claimed range. According to MPEP § 2144.05 (I), “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
and wherein said thermal treatment (as taught by Ichikawa et al., paragraph 0017) causes the transformation of a part of the additional preliminary dielectric region 7 into the second conductivity enhancement region (i.e., portion of layer 7 close to the drain electrode 5d in Fig. 2K of Makiyama et al., paragraph 0022), a part of the additional preliminary dielectric region 7 forming the second dielectric region (i.e., the middle portion of layer 7 in Fig. 2K of Makiyama et al.).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to have combined the teachings of Tsai et al., Jones et al., Ichikawa et al. and Makiyama et al., in order to have the preliminary dielectric region and the additional preliminary dielectric region include a silicon nitride having a percentage of silicon such that the respective refractive index is greater or equal to 1.95 and wherein said thermal treatment causes the transformation of a part of the additional preliminary dielectric region into the second conductivity enhancement region, a part of the additional preliminary dielectric region forming the second dielectric region. Doing so would significantly reduce the collapse of the drain current, as recognized by Makiyama et al. (see Fig. 3B and paragraph 0049), as well as form the second dielectric region in fewer manufacturing steps.
Claims 17 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Tsai et al. (US 20160141404 A1), as applied to Claim 16 above, further in view of Iucolano et al. (US 20200194579 A1).
Regarding Claim 17, Tsai et al. teaches the HEMT device of claim 16, wherein the insulating layer 120 includes: a sealing region on the first surface; and a first dielectric region 120 on the sealing region (Fig. 10: 120, paragraph 0021).
Iucolano et al. teaches a HEMT device comprising the following limitations not disclosed in Tsai et al.:
wherein the insulating layer 108, 220 includes: a sealing region 108 on the first surface Sc; and a first dielectric region 220 on the sealing region 108 (Fig. 2: 108, 220, Sc, paragraph 0030).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to have combined the teachings of Tsai et al., Jones et al. and Iucolano et al., in order to have the insulating layer include a sealing region on the first surface and a first dielectric region of Tsai et al., on the sealing region. Doing so would enable better interface passivation, rendered by the sealing region.
Regarding Claim 18, Tsai et al. teaches the HEMT device of claim 17, further comprising: a drain conductive region 124 on the first surface S1; and a second dielectric region 126 on the first surface S1 and the insulating layer 120, and in contact with the drain conductive region 124 (see annotated Fig. 10: 124, S1, 126, 120, paragraph 0020).
Claims 19 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Tsai et al. (US 20160141404 A1), , further in view of Iucolano et al. (US 20200194579 A1, as applied to Claim 18 above, further in view of Jones et al. (US 20210111254 A1).
Regarding Claim 19, Tsai et al. teaches the HEMT device of claim 18, further comprising:
a field plate on the first dielectric region and the second dielectric region, spaced from the gate conductive region, and spaced from the drain conductive region;
and a third dielectric region 904 on the filed plate, the second dielectric region 126, and the first dielectric region 120 (Fig. 10: 904, 20, 126, paragraph 0057).
Jones et al. teaches a HEMT device comprising:
a field plate 33 on the first dielectric region 27 and the second dielectric region 28, spaced from the gate conductive region 32, and spaced from the drain conductive region 30 (Fig. 1: 33, 27, 28, 32, 30, paragraph 0057);
and a third dielectric region 29 on the filed plate 33, the second dielectric region 28, and the first dielectric region 27 (Fig. 1: 27, 28, 29, 33, paragraph 0080).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to have combined the teachings of Tsai et al., Jones et al. and Iucolano et al., in order to have a field plate on the first dielectric region and the second dielectric region, spaced from the gate conductive region, and spaced from the drain conductive region such that the third dielectric region of Tsai et al. is on the filed plate, the second dielectric region, and the first dielectric region. Doing so would allow for reduction of gate-to-drain capacitance and trapping effects, as well as reduction in peak electric field proximate the drain electrode, as recognized by Jones et al. (paragraph 0058).
Regarding Claim 20, Tsai et al. teaches the HEMT device of claim 19, wherein the source conductive region 122 is partially on the conductivity enhancement region 502 and the drain conductive region 124 is partially on the second dielectric region 126 (see annotated Fig. 10: 122, 124, 126, 502).
Conclusion
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/HAMNA FATHIMA IQBAL/Examiner, Art Unit 2817 07/02/2026
/Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817
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