Prosecution Insights
Last updated: October 23, 2026
Application No. 18/671,897

MICROELECTROMECHANICAL SYSTEMS DEVICE AND MANUFACTURING METHOD THEREOF

Final Rejection §103
Filed
May 22, 2024
Priority
Apr 03, 2024 — CN 202410403528.7
Examiner
THROCKMORTON, ROBERT EMIL
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
United Microelectronics Corp.
OA Round
2 (Final)
100%
Grant Probability
Favorable
3-4
OA Rounds
1m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 100% — above average
100%
Career Allowance Rate
4 granted / 4 resolved
+32.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
26 currently pending
Career history
33
Total Applications
across all art units

Statute-Specific Performance

§103
47.9%
+7.9% vs TC avg
§102
27.7%
-12.3% vs TC avg
§112
24.5%
-15.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 4 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment The amendment filed on August 12, 2026, under 37 C.F.R. 1.312 has been entered. All objections raised by the examiner to the applicant’s specification in the previous office action have been addressed. Therefore, all objections to the specification are withdrawn. In addition, all rejections under 35 U.S.C. 112(b) have been addressed. Therefore, the rejections of claims 8-9 under 35 U.S.C. 112(b) have been withdrawn. Response to Arguments Applicant's arguments filed August 12, 2026, have been fully considered but they are not persuasive. Regarding rejections under 35 U.S.C. 103, the applicant makes the following arguments. First, the applicant argues that the combination of Chen et. al., US Pat. No. 11,259,106, hereafter referred to as Chen, and Huang et. al., Pub. No. US 2011/0115039, hereafter referred to as Huang, fails to teach the limitation, “a material of the membrane layer includes polysilicon”, recited in the amended claim 1. Second, the applicant argues that the combination of Notake et. al., Pub. No. US 2010/0002895, hereafter referred to as Notake, and Huang fails to teach the limitation, “performing a chemical vapor deposition process to form a membrane layer”, recited in the amended claim 6. In response to both arguments, neither of the claim limitations in question was recited in the original claims but were only disclosed in the specification. While interpretation of claim limitations may be guided by the specification, limitations cannot be imported from the specification (see MPEP 2111.01 II: ““Though understanding the claim language may be aided by explanations contained in the written description, it is important not to import into a claim limitations that are not part of the claim. For example, a particular embodiment appearing in the written description may not be read into a claim when the claim language is broader than the embodiment.” Superguide Corp. v. DirecTV Enterprises, Inc., 358 F.3d 870, 875, 69 USPQ2d 1865, 1868 (Fed. Cir. 2004).”). The applicant’s argument amounts to importing limitations from the specification that were not recited in the original unamended claims. In addition, the examiner must respectfully disagree that the references do not teach the new limitations added to the amended claims 1 and 6. Notake not only teaches that the membrane layer includes polysilicon, but that this polysilicon layer is formed by chemical vapor deposition (see Notake [0066]). In light of the above arguments, the examiner maintains that the rejections of the original claims 1-10 under 35 U.S.C. 103 were proper. However, the applicant’s amendments to claims 1 and 6 have rendered the original rejections moot and have necessitated the new grounds of rejection presented below. PNG media_image1.png 490 1009 media_image1.png Greyscale Fig. 1 of Chen, reproduced with annotations added by the examiner. PNG media_image2.png 754 1049 media_image2.png Greyscale Fig. 11 of Huang, reproduced with annotations added by the examiner. PNG media_image3.png 588 1047 media_image3.png Greyscale Fig. 1 of Notake, reproduced with annotations added by the examiner. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-5 are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Huang and Notake. Regarding claim 1, Chen teaches “A microelectromechanical systems (MEMS) device” (Chen col. 1, lines 8-10), “including: a substrate” (Chen col. 5, line 9; Fig. 1, reproduced above with annotations added by the examiner, substrate 11); “a membrane layer, disposed on the substrate” (Chen col. 5, line 10; Fig. 1, diaphragm 14); “and a plurality of patterned backplates” (Chen col. 5, line 10; Fig. 1, backplate 13), “disposed above the membrane layer” (Chen Fig. 1; note the relative locations of the backplate 13 and the diaphragm 14), but does not teach “(a membrane layer that has) a plurality of corrugated structures, wherein a top surface of the membrane layer has a rounded-corner feature, and a bottom surface of the membrane layer has a sharp-corner feature” and “wherein a material of the membrane layer includes polysilicon.” Huang, on the other hand, does teach “(a membrane layer that has) a plurality of corrugated structures” (Huang [0024]; Fig. 11, reproduced above with annotations added by the examiner; note the shape of the diaphragm electrode 250), “wherein a top surface of the membrane layer has a rounded-corner feature” (Huang Fig. 11; note the rounded corners on the corrugations of the diaphragm electrode 250), “and a bottom surface of the membrane layer has a sharp-corner feature” (Huang Fig. 11; note the sharp corners on the corrugations of the diaphragm electrode 250). Furthermore, Huang teaches that the corrugated membrane has better mechanical strength (Huang [0007]: “The micro electro mechanical system structure of the present invention has a 3D diaphragm electrode of a composite structure. Such 3D diaphragm electrode of a composite structure not only has robust mechanical strength, but also in the manufacturing process, a step to etch a metal layer may be omitted to create a simpler process.”). The corrugated membrane of Huang can be incorporated into the device of Chen through the use of a corrugated membrane in said device. It would have been obvious to one of ordinary skill in the art before the effective filing date of the application to use a corrugated membrane as taught by Huang in the device of Chen because such a membrane would have greater mechanical strength and it would be a simple substitution of one element for another. The combination of Chen and Huang just described, however, does not teach “wherein a material of the membrane layer includes polysilicon.” Notake, on the other hand, does teach “wherein a material of the membrane layer includes polysilicon” (Notake [0054]; Fig. 1, polysilicon film 102). The use of polysilicon as a material of the membrane layer taught by Notake can be incorporated into the combined device of Chen and Huang by making the membrane in said combined device out of polysilicon. It would have been obvious to one of ordinary skill in the art before the effective filing date of the application to have used polysilicon as the material for the membrane layer in the combined device of Chen and Huang as taught by Notake because polysilicon is capable of serving as a conductive material for the membrane and it would be a simple substitution of one material for another. Regarding claim 2, the combined device of Chen, Huang, and Notake described in the discussion of claim 1 further teaches “The MEMS device according to claim 1, further including: a first insulating layer” (Chen col. 5, line 9; Fig. 1, portion of the dielectric layer 12 between the diaphragm 14 and the substrate 11), “disposed between the membrane layer and the substrate” (Chen Fig. 1; note that a portion of the dielectric layer 12 lies between the diaphragm 14 and the substrate 11, “wherein the substrate, the first insulating layer and the membrane layer define a cavity of the MEMS device” (Chen col. 5, line 14; Fig. 1; note that the opening 11A is bounded by the substrate 11, the portion of the dielectric layer 12 between the substrate 11 and the diaphragm 14, and the diaphragm 14); “and a second insulating layer” (Chen col. 5, line 9; Fig. 1, portion of the dielectric layer 12 between the diaphragm 14 and the backplate 13), “disposed between the plurality of patterned backplates and the membrane layer” (Chen Fig. 1; note that a portion of the dielectric layer 12 lies between the diaphragm 14 and the backplate 13), “wherein the membrane layer, the second insulating layer and the plurality of patterned backplates define an air gap of the MEMS device” (Chen col. 6, line 13; Fig. 1; note that the air gap G is bounded by the diaphragm 14, the portion of the dielectric layer 12 between the diaphragm 14 and the backplate 13, and the backplate 13). Regarding claim 3, the combined device of Chen, Huang, and Notake described in the discussion of claim 1 further teaches “The MEMS device according to claim 2, wherein the membrane layer includes a slit” (Chen col. 6, line 2; Fig. 1, vent holes 142). Regarding claim 4, the combined device of Chen, Huang, and Notake described in the discussion of claim 1 further teaches “The MEMS device according to claim 3, wherein the air gap and the cavity are connected through the slit” (Chen Fig. 1; note that the vent holes 142 directly connect the opening 11A to the air gap G). Regarding claim 5, the combined device of Chen, Huang, and Notake described in the discussion of claim 1 teaches “The MEMS device according to claim 1, further including: a first liner” (Chen col. 6, lines 11-12; Fig. 1, insulating protrusions 134), “disposed between the plurality of patterned backplates and the membrane layer” (Chen Fig. 1; note that the insulating protrusions 134 lie between the backplate 13 and the diaphragm 14) “and covering a bottom surface of the plurality of patterned backplates” (Chen col. 6, lines 11-13: “In some embodiments, a number of insulating protrusions 134 are provided or formed on the first side S1 of the backplate 13”); “a second liner” (Chen col. 6, line 19; Fig. 1, insulating layer 132), “disposed on the plurality of patterned backplates and covering a top surface… of the plurality of patterned backplates” (Chen Fig. 1; note that the insulating layer 132 lies on top of the backplate 13); “and a contact layer” (Chen col. 5, line 10; Fig. 1, electrode layer 15), “disposed on the second liner” (Chen Fig. 1; note that the electrode layer 15 is disposed on the insulating layer 132), “wherein the plurality of patterned backplates and the membrane layer are coupled through the contact layer” (Chen Fig. 1; note that the electrode layer 15 contacts the diaphragm 14 and the backplate 13 through the insulating layer 132), but does not teach “(a second liner covering) a side surface of the plurality of patterned backplates”. Notake, on the other hand, does teach “(a second liner covering) a side surface of the plurality of patterned backplates” (Notake [0055]; Fig. 1, reproduced above with annotations added by the examiner, fourth silicon nitride film 117). The second liner of Notake can be incorporated into the combined device of Chen and Huang described in the discussion of claim 1 by extending the insulating layer of Chen to cover the sides of the backplate as well. It would have been obvious to one of ordinary skill in the art before the effective filing date of the application to extend the insulating layer of Chen to cover the sides of the backplate because doing so would provide further protection of the backplate from the outside environment and it would be a simple combination of the two disclosures. PNG media_image4.png 710 902 media_image4.png Greyscale Fig. 3 of Notake, reproduced with annotations added by the examiner. PNG media_image5.png 627 893 media_image5.png Greyscale Fig. 4 of Notake, reproduced with annotation added by the examiner. PNG media_image6.png 623 916 media_image6.png Greyscale Fig. 5 of Notake, reproduced with annotations added by the examiner. PNG media_image7.png 618 1030 media_image7.png Greyscale Fig. 6 of Notake, reproduced with annotations added by the examiner. PNG media_image8.png 576 760 media_image8.png Greyscale Fig. 8 of Notake, reproduced with annotations added by the examiner. PNG media_image9.png 367 562 media_image9.png Greyscale Fig. 5 of Huang, reproduced with annotations added by the examiner. Claims 6-7 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Notake in view of Huang. Regarding claim 6, Notake teaches “A manufacturing method of a microelectromechanical systems (MEMS) device, including: forming a first insulating layer on a substrate” (Notake [0066]; Fig. 3a, reproduced above with annotations added by the examiner, protection oxide film 101); “performing a chemical vapor deposition process to form a membrane layer on the first insulating layer” (Notake [0066]: “Thereafter, the p-type polysilicon film (first conductive polysilicon film) 102 that is to be the second electrode (vibrating electrode) is grown on the protection oxide film 101 to a thickness of 300 nm by low-pressure CVD.”; Fig. 3a, polysilicon film 102), “and forming a plurality of patterned backplates on the first side of the substrate” (Notake [0071]; Fig. 5b, reproduced above with annotations added by the examiner, polysilicon film 115), but does not teach “a top surface of the membrane layer has a rounded-corner feature, and a bottom surface of the membrane layer has a sharp-corner feature”, “wherein a first side of the substrate has a plurality of grooves, and a top surface of the first insulating layer has a recessed feature in the plurality of grooves”, and “wherein the membrane layer has a plurality of corrugated structures”. Huang, on the other hand, does teach “wherein a first side of the substrate has a plurality of grooves” (Huang [0015]; Fig. 5, reproduced above with annotations added by the examiner; note that the substrate 201 has a trench 202; also see Fig. 11, which shows a plurality of such grooves), “and a top surface of the first insulating layer has a recessed feature in the plurality of grooves” (Huang [0016]; Fig. 5; note the recess in the insulating layer 210) and “wherein the membrane layer has a plurality of corrugated structures” (Huang [0022]; Fig. 11, diaphragm electrode 250). Furthermore, Huang teaches that the corrugated membrane has better mechanical strength (Huang [0007]). The steps of forming a plurality of grooves in the substrate, forming the first insulating layer with recesses, and forming a corrugated diaphragm as taught by Huang can be incorporated into the process of Notake as additional steps of forming grooves in the substate, forming a first insulating layer with recesses, and forming a corrugated diaphragm. It would have been obvious to one of ordinary skill in the art before the effective filing date of the application to add the additional steps recited by Huang into the process of Notake because the corrugated diaphragm would have greater mechanical strength and it would be a simple combination of the two disclosures. Regarding claim 7, the combined process of Notake and Huang described in the discussion of claim 6 further teaches “The manufacturing method of the MEMS device according to claim 6, further including following steps after forming the membrane layer and before forming the plurality of patterned backplates: forming a second insulating layer on the first side of the substrate” (Notake [0069]; Fig. 4b, reproduced above with annotation added by the examiner, boron-doped phosphor-silicate glass (BPSG) film 109; note that this step follows forming the polysilicon film 102); “and forming a first liner on the first side of the substrate and a second side of the substrate, wherein the first side is opposite to the second side” (Notake [0071]; Fig. 5b, silicon nitride film 114; note that the silicon nitride film 114 covers both the front and back sides of the substrate). Regarding claim 10, the combined process of Notake and Huang described in the discussion of claim 6 teaches “The manufacturing method of the MEMS device according to claim 6, further including following steps after forming the plurality of patterned backplates: forming a cavity in the substrate” (Notake [0076]; Fig. 8a, reproduced above with annotations added by the examiner, substrate removed portion 123; note that the step of removing a portion of the substrate 100 is performed after the formation of the backplate 131); “and forming an air gap between the plurality of patterned backplates and the membrane layer” (Notake [0077]; Fig. 8b, air gap 125), “wherein the air gap and the cavity are connected through a slit of the membrane layer” (Notake [0077]; Fig. 8b, acoustic holes 124). PNG media_image10.png 471 766 media_image10.png Greyscale Fig. 2 of Suzuki, reproduced with annotations added by the examiner. PNG media_image11.png 580 950 media_image11.png Greyscale Fig. 26 of Suzuki, reproduced with annotations added by the examiner. Claims 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Notake and Huang in view of Suzuki et. al., Pub. No. 2007/0121972, hereafter referred to as Suzuki. Regarding claim 8, the combined process of Notake and Huang described in the discussion of claim 6 teaches “The manufacturing method of the MEMS device according to claim 6, further including following steps after forming the plurality of patterned backplates: forming a second liner on the first side of the substrate and the second side of the substrate” (Notake [0072]; Fig. 6a, reproduced above with annotations added by the examiner, silicon nitride film 117; note that the silicon nitride film 117 covers both the front and back sides of the substrate), “wherein the second liner covers the plurality of patterned backplates on the first side of the substrate” (Fig. 6a; note that the silicon nitride film 117 covers the top surface of the polysilicon film 115); and “forming a contact via on the first side of the substrate” (Notake [0077]; Fig. 8b, reproduced above with annotations added by the examiner, second electrode pad opening 113; also see [0073] and Fig. 8a and note that the second electrode pad opening 113 is not finally opened at the end of the process until the fluorosilicate glass (FSG) film 119 is etched away); but does not teach “forming a contact layer in the contact via, wherein the plurality of patterned backplates are coupled to the membrane layer through the contact layer.” Suzuki, on the other hand, teaches an embodiment of their invention with a via (Suzuki [0286]; Fig. 26, reproduced above with annotations added by the examiner, electrode 3030) that contacts a diaphragm (Suzuki [0283]; Fig. 26, diaphragm 3036), and furthermore teaches an embodiment in which the diaphragm and the backplate are connected (Suzuki [0143]; Fig. 2, reproduced above with annotations added by the examiner, back plate 2 and diaphragm 3; note that the back plate 2 and the diaphragm 3 are connected to each other via a bias voltage applying device 4). The electrode of Suzuki can be incorporated into the combined process of Notake and Huang as the addition of an electrode after the fabrication of the second liner. The combined process teaches “forming a contact layer in the contact via” (Suzuki [0286]; Fig. 26, electrode 3030), “wherein the plurality of patterned backplates are coupled to the membrane layer through the contact layer” (Suzuki [0143]; Fig. 2, back plate 2 and diaphragm 3; note that the back plate 2 and the diaphragm 3 are connected to each other via a bias voltage applying device 4; also note the presence of electrode 3038 contacting the plate 3033 in Fig. 26, which would allow an electrical connection between the plate 3033 and the diaphragm 3036). It would have been obvious to one of ordinary skill in the art to incorporate a step of forming an electrode into the combined process of Notake and Huang described in the discussion of claim 6 because it would provide a means for applying a voltage to the diaphragm and it would be a simple combination of elements of the disclosures. Regarding claim 9, the combined process of Notake, Huang, and Suzuki described in the discussion of claim 8 teaches “The manufacturing method of the MEMS device according to claim 8”, but does not teach “wherein the contact via includes a first contact via, a second contact via and a third contact via, the first contact via exposes a portion of the membrane layer, the second contact via exposes a portion of the substrate, and the third contact via exposes a portion of the plurality of patterned backplates.” The combined process of Notake, Huang, and Suzuki, however, does teach a via with a contact disposed inside (Notake [0077]; Fig. 8b, second electrode pad opening 113; Suzuki [0286]; Fig. 26, electrode 3030). Suzuki, on the other hand, does teach “wherein the contact via includes a first contact via” (Suzuki [0286]; Fig. 26, electrode 3030), “a second contact via” (Suzuki [0286]; Fig. 26, electrode 3039) “and a third contact via” (Suzuki [0286]; Fig. 26, electrode 3038), “the first contact via exposes a portion of the membrane layer” (Suzuki Fig. 26; note that the electrode 3030 contacts the diaphragm 3036), “the second contact via exposes a portion of the substrate” (Suzuki Fig. 26; note that the electrode 3039 contacts the substrate 3010), “and the third contact via exposes a portion of the plurality of patterned backplates” (Suzuki Fig. 26; note that the electrode 3038 contacts the plate 3033). Suzuki further teaches that the purpose of these electrodes is to provide connections between the device and external circuitry (Suzuki [0286]: “An electrode 3030 joins the conductive film 3012 so as to establish connection between the diaphragm 3036 and an external signal processing circuit (not shown). An electrode 3038 joins the conductive film 3014 so as to establish connection between the plate and the external signal processing circuit. An electrode 3039 joins a substrate 3010 so as to establish connection between the substrate 301 and a reference voltage terminal (not shown).”). The three contact vias of Suzuki can be incorporated into the combined process of Notake, Huang, and Suzuki described in the discussion of claim 8 as the formation of two additional electrode pad openings, one over the backplate and another over the substrate, and the formation of electrodes within these openings. It would have been obvious to one of ordinary skill in the art before the effective filing date of the application to incorporate the formation of three electrodes, one contacting the diaphragm, one contacting the substrate, and one contacting the backplate, into the combined process of Notake, Huang, and Suzuki described in the discussion of claim 8 because doing so would provide a means for connecting these elements to external circuitry, as suggested by Suzuki, and it would be a simple combination of elements of the disclosures. Conclusion Applicant's amendment necessitated the new grounds of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Robert E Throckmorton whose telephone number is (571) 272-7014. The examiner can normally be reached 7:30 AM - 11:30 AM and 12:30 PM - 4:30 PM ET Monday to Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven H Loke can be reached at (571) 272-1657. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /R.E.T./Examiner, Art Unit 2818 /STEVEN H LOKE/Supervisory Patent Examiner, Art Unit 2818
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Prosecution Timeline

May 22, 2024
Application Filed
Jun 09, 2026
Non-Final Rejection mailed — §103
Aug 12, 2026
Response Filed
Oct 02, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
100%
Grant Probability
99%
With Interview (+0.0%)
2y 6m (~1m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 4 resolved cases by this examiner. Grant probability derived from career allowance rate.

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