Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-10, 18-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Siemieniec et la. (hereinafter Siemieniec, US 2016/0163852).
In regards to independent claim 1, Siemieniec teaches a semiconductor device, comprising a semiconductor layer, a trench gate structure and a conductive layer, wherein the semiconductor layer has a first surface and a second surface opposite each other, the trench gate structure is at least partially located in a trench on the first surface of the semiconductor layer (Fig. 1, 41, 101, 21, 22),
the semiconductor layer comprises:
a source region, extending from the first surface toward the second surface (12);
a drift region and a body region, wherein at least a part of the drift region is located between the body region and the second surface of the semiconductor layer (11, 13, 31, 32),
wherein a first part of the body region is located between the source region and the drift region along a direction of the first surface to the second surface, the first part of the body region and the source region both adjoin a first sidewall of the trench gate structure (13, Fig. 1),
the first surface has a plurality of recesses, the conductive layer adjoins the first surface and extends into the plurality of recesses (115, more than one recess visible in Fig. 1),
the source region and the drift region are of a first conductivity type, the body region is of a second conductivity type, and the first conductivity type is opposite to the second conductivity type ([0037]).
In regards to dependent claim 2, Siemieniec teaches wherein the recess is one or a combination of crescent, cone, and polygonal (Fig. 1).
In regards to dependent claim 3, Siemieniec teaches wherein the recess continuously extends along an extension direction of the trench gate structure (Fig. 1); or
the plurality of recesses extends along the extension direction of the trench gate structure, and at least two recesses are isolated by plane area of the first surface along the extension direction of the trench gate structure (Fig. 2, Fig. 15).
In regards to dependent claim 4, Siemieniec teaches wherein the recesses are arranged in an array between two trench gate structures (Fig. 15).
In regards to dependent claim 5, Siemieniec teaches wherein a first part, a second part and a third part of the body region are sequentially adjoining along a width direction of the trench gate structure (Fig. 1),
the first part and the second part of the body region is located between two trench gate structure, the first part adjoins the first sidewall of the trench gate structure, the second part is close to a second sidewall of the trench gate structure, the first surface is opposite to the second surface (13),
the third part and the second part are close to the same trench gate structure, the third part is located between a bottom surface of the trench gate structure and the second surface, and the third part and the first part are isolated by the drift region (31, 32),
wherein the second part adjoins the second sidewall, or the second part and the second part are isolated by the drift region (31,32).
In regards to dependent claim 6, Siemieniec teaches wherein the third part of the body region extends from the bottom surface of the trench gate structure toward the second surface; or
at least part of the bottom surface of the trench gate structure is separated from the third part of the body region by the drift region along the direction of the first surface to the second surface Fig. 1).
In regards to dependent claim 7, Siemieniec teaches wherein the second part of the body region comprises a first sub-region and a second sub-region that are connected,
along the direction of the trench gate structure, the first sub-region adjoins the first part of the body region, the second sub-region adjoins the third part of the body region,
wherein, a distance from an edge of the first part of the body region facing toward the second surface to the first surface is a first distance, a distance from an edge of the first sub-region facing toward the second surface to the first surface is a second distance, a distance from an edge of the second sub-region facing toward the second surface to the first surface is a third distance,
the third distance is greater than the second distance, and the second distance is greater than the first distance (second part of the body region can be divided into subregions being arranged on top of each other where the first subregion adjoins the first part of the body region and the second subregion located below the first subregion adjoins the third part of the body region.
In regards to dependent claim 8, Siemieniec teaches wherein a distance from the bottom surface of the trench gate structure to the first surface is a fourth distance, the second distance is not less than the fourth distance (The second part of the body region can be subdivided in any form which would meet this criteria).
In regards to dependent claim 9, Siemieniec teaches wherein along the direction of the second surface to the first surface, a distance between the third part and the bottom surface of the trench gate structure which are separated by the drift region is a fifth distance, a sum of the fourth distance and the fifth distance is equal to the second distance (The second part of the body region can be subdivided in any form which would meet this criteria).
In regards to dependent claim 10, Siemieniec teaches wherein edges of the second part and the third part of the body region facing toward the second surface are connected; or an edge of the third part facing toward the second surface is closer to the second surface than an edge of the second part facing toward the second surface (Fig. 1).
In regards to dependent claim 18, Siemieniec teaches wherein the semiconductor device is a metal-oxide semiconductor field effect transistor or an insulated gate bipolar transistor (Fig. 1 12, [0003-005], [0038]]).
In regards to dependent claim 19, Siemieniec teaches wherein between two trench gate structures, the source region extends from the first sidewall of one trench gate structure towards the second sidewall of the other trench ate structure, and adjoins the second part of the body region (Fig. 1 12, [0003-0005]).
In regards to dependent claim 20, Siemieniec teaches wherein the semiconductor layer comprises a SiC semiconductor layer (Fig. 1 12, [0002-0005]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 11, 12, 13, 15, 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Siemieniec in view of Basler et al. (hereinafter Infineon, US 2021/0159316).
In regards to dependent claim 11, Siemieniec fails to explicitly teach wherein the semiconductor layer further comprises a channel drain region, located between the first part of the body region and the drift region, so that the source region, the first part of the body region and the channel drain region are sequentially adjoining in a direction of the first surface to the second surface and adjoin a first sidewall of the trench gate structure,
the channel drain region adjoins the drift region and the second part of the body region, respectively, and the channel drain region is separated from the third part of the body region by the drift region,
wherein the channel drain region is of the first conductivity type.
Infineon teaches wherein the semiconductor layer further comprises a channel drain region, located between the first part of the body region and the drift region, so that the source region, the first part of the body region and the channel drain region are sequentially adjoining in a direction of the first surface to the second surface and adjoin a first sidewall of the trench gate structure,
the channel drain region adjoins the drift region and the second part of the body region, respectively, and the channel drain region is separated from the third part of the body region by the drift region,
wherein the channel drain region is of the first conductivity type. (Infineon, Fig. 4, 137).
It would have been obvious to one of ordinary skill in the art, having the teachings of Siemieniec and Infineon before him before the effective filing date of the claimed invention, to modify the trench transistor taught by Siemieniec to include channel drain region of Infineon in order to obtain a trench transistor with channel drain region deposited on a drift zone and recombination zone One would have been motivated to make such a combination because “educe the emitter efficiency and thus also the hole injection in on-state operation of the intrinsic body diode BD. Thus, in forward operation of the intrinsic body diode BD, the plasma flooding of the SiC semiconductor body 100 decreases and significantly fewer charge carriers recombine within the drift zone”.
In regards to dependent claim 12, Siemieniec fails to explicitly teach wherein a doping concentration of the channel drain region is greater than a doping concentration of the drift region. Infineon teaches wherein a doping concentration of the channel drain region is greater than a doping concentration of the drift region (Infinion, Fig. 4, 137). It would have been obvious to one of ordinary skill in the art, having the teachings of Siemieniec and Infineon before him before the effective filing date of the claimed invention, to modify the trench transistor taught by Siemieniec to include channel drain region of Infineon in order to obtain a trench transistor with channel drain region deposited on a drift zone and recombination zone One would have been motivated to make such a combination because “educe the emitter efficiency and thus also the hole injection in on-state operation of the intrinsic body diode BD. Thus, in forward operation of the intrinsic body diode BD, the plasma flooding of the SiC semiconductor body 100 decreases and significantly fewer charge carriers recombine within the drift zone”.
In regards to dependent claim 13, Siemieniec fails to explicitly teach wherein a distance from an edge of the channel drain region facing toward the second surface to the first surface is not greater than a distance from the bottom surface of the trench gate structure to the first surface; or
the distance from the edge of the channel drain region facing toward the second surface to the first surface is greater than the distance from the bottom surface of the trench gate structure to the first surface, and the channel drain region adjoins a part of the bottom surface of the trench gate structure.
Infineon teaches wherein a distance from an edge of the channel drain region facing toward the second surface to the first surface is not greater than a distance from the bottom surface of the trench gate structure to the first surface; or
the distance from the edge of the channel drain region facing toward the second surface to the first surface is greater than the distance from the bottom surface of the trench gate structure to the first surface, and the channel drain region adjoins a part of the bottom surface of the trench gate structure. (Infinion, Fig. 8A, 1611 -1612). It would have been obvious to one of ordinary skill in the art, having the teachings of Siemieniec and Infineon before him before the effective filing date of the claimed invention, to modify the trench transistor taught by Siemieniec to include channel drain region of Infineon in order to obtain a trench transistor with channel drain region deposited on a drift zone and recombination zone One would have been motivated to make such a combination because “educe the emitter efficiency and thus also the hole injection in on-state operation of the intrinsic body diode BD. Thus, in forward operation of the intrinsic body diode BD, the plasma flooding of the SiC semiconductor body 100 decreases and significantly fewer charge carriers recombine within the drift zone”.
In regards to dependent claim 15, Siemieniec fails to explicitly teach wherein the semiconductor layer further comprises a body contact region extending from the first surface toward the second surface, and the body contact region adjoins the body region,
the body contact region adjoins the source region, or is separated from the source region by the body region,
wherein the body contact region is of the second conductivity type.
Infineon teaches wherein the semiconductor layer further comprises a body contact region extending from the first surface toward the second surface, and the body contact region adjoins the body region,
the body contact region adjoins the source region, or is separated from the source region by the body region,
wherein the body contact region is of the second conductivity type. (Infinion, Fig. 8A, 1611 -1612. It would have been obvious to one of ordinary skill in the art, having the teachings of Siemieniec and Infineon before him before the effective filing date of the claimed invention, to modify the trench transistor taught by Siemieniec to include channel drain region of Infineon in order to obtain a trench transistor with channel drain region deposited on a drift zone and recombination zone One would have been motivated to make such a combination because “educe the emitter efficiency and thus also the hole injection in on-state operation of the intrinsic body diode BD. Thus, in forward operation of the intrinsic body diode BD, the plasma flooding of the SiC semiconductor body 100 decreases and significantly fewer charge carriers recombine within the drift zone”.
In regards to dependent claim 16, Siemieniec fails to explicitly teach wherein along an extension direction of the trench gate structure, a part of the body contact region adjoins the second sidewall, another part of the body contact region has a space from the second sidewall, and the part of the body contact region adjoining the second sidewall and the part of the body contact having the space from the second sidewall are arranged alternatively along the extension direction of the trench gate structure,
or the body contact region is separated from the second surface by the body region.
Infineon teaches wherein along an extension direction of the trench gate structure, a part of the body contact region adjoins the second sidewall, another part of the body contact region has a space from the second sidewall, and the part of the body contact region adjoining the second sidewall and the part of the body contact having the space from the second sidewall are arranged alternatively along the extension direction of the trench gate structure,
or the body contact region is separated from the second surface by the body region. (Infinion, Fig. 8A, 1611 -1612. It would have been obvious to one of ordinary skill in the art, having the teachings of Siemieniec and Infineon before him before the effective filing date of the claimed invention, to modify the trench transistor taught by Siemieniec to include channel drain region of Infineon in order to obtain a trench transistor with channel drain region deposited on a drift zone and recombination zone One would have been motivated to make such a combination because “educe the emitter efficiency and thus also the hole injection in on-state operation of the intrinsic body diode BD. Thus, in forward operation of the intrinsic body diode BD, the plasma flooding of the SiC semiconductor body 100 decreases and significantly fewer charge carriers recombine within the drift zone”.
Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Siemieniec in view of Kinoshita et al. (hereinafter Kinoshita, US 2021/0159316).
In regards to dependent claim 17, Siemieniec fails to explicitly teach wherein the trench gate structure comprises the gate dielectric layer and a gate conductor,
the gate dielectric layer covers an inner surface of the trench and covers part of the first surface adjacent to the trench, the trench extending from the first surface toward the second surface,
a part of the gate conductor is in the trench, another part extends outside the trench and covers the gate dielectric layer,
wherein the gate dielectric layer is located between the gate conductor and the semiconductor layer, so as to separate the gate conductor and the semiconductor layer.
Kinoshita teaches wherein the trench gate structure comprises the gate dielectric layer and a gate conductor,
the gate dielectric layer covers an inner surface of the trench and covers part of the first surface adjacent to the trench, the trench extending from the first surface toward the second surface,
a part of the gate conductor is in the trench, another part extends outside the trench and covers the gate dielectric layer,
wherein the gate dielectric layer is located between the gate conductor and the semiconductor layer, so as to separate the gate conductor and the semiconductor layer. (Kinoshita, Fig. 1 9a 10a).
It would have been obvious to one of ordinary skill in the art, having the teachings of Siemieniec and Infineon before him before the effective filing date of the claimed invention, to modify the trench transistor taught by Siemieniec to include the gate dielectric layer of Kinoshita in order to obtain a trench transistor with a gate dielectric layer One would have been motivated to make such a combination because reduces leakage current from the gate electrode.
Allowable Subject Matter
Claim 14 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art fails to disclose or teach an obvious combination of the following limitations when taken with the claim as a whole:
Claim 14:
wherein the channel drain region is of the first conductivity type,
a distance from an edge of the channel drain region facing toward the second surface to the first surface is a sixth distance,
the sixth distance is greater than the second distance, and the third distance is greater than the sixth distance, so that the channel drain region and the second sub-region are separated by the drift region along a width direction of the trench gate structure.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM C TRAPANESE whose telephone number is (571)270-3304. The examiner can normally be reached Monday - Friday 7am-12pm & 8pm-10pm EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at (571)272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/WILLIAM C TRAPANESE/Primary Examiner, Art Unit 2812