DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement filed on May 24, 2024 has been considered by the Examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, 5-6, 8, 9 and 11-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Denso (JP 2021-022586; cited in the IDS).
Regarding claim 1, Denso discloses a printed circuit board (see figure 6), comprising: an insulating layer (1); a wiring layer disposed on an outermost side of the insulating layer (1) and including a first pad and a first pattern (see figure 6); a first post (10) disposed on the first pattern (see figure 6); and a resist layer (11) disposed on the insulating layer (1) and covering the wiring layer and the first post (10), wherein the resist layer (11) includes (i) a first protrusion (12) in a region covering the first post (100) and (ii) a first opening (17) over the first pad (see figure 6).
Regarding claim 2, Denso discloses the printed circuit board (see figure 6), further comprising a second post (10; see figure 6) that is disposed on the first pattern and that is spaced apart from the first post (see figure 6), wherein the wiring layer further includes a second pad spaced apart from the first pad, and the resist layer (11) further includes (i) a second protrusion (12; see figure 6) in a region covering the second post and (ii) a second opening over the second pad (see figure 6).
Regarding claim 3, Denso discloses the printed circuit board (see figure 6), wherein the first post (10) is disposed to surround the first pad (see figure 6), the second post (10) is disposed to surround the second pad (see figure 6), the first protrusion (12) is disposed to surround the first opening, and the second protrusion (12) is disposed to surround the second opening (see figure 6).
Regarding claim 5, Denso discloses the printed circuit board (see figure 6), wherein the wiring layer (see figure 6) further includes a second pad spaced apart from the first pad (se figure 6) and a second pattern spaced apart from the first pattern, the printed circuit board (see figure 6) further comprises a second post (10; see figure 6) that is disposed on the second pattern and that is spaced apart from the first post (10), and the resist layer further includes (i) a second protrusion (12; see figure 6) in a region covering the second post (10; see figure 6) and (ii) a second opening (17) over the second pad from the resist layer (11).
Regarding claim 6, Denso discloses the printed circuit board (see figure 6), wherein the first post (10) is disposed to surround the first pad, the second post (10; see figure 6) is disposed to surround the second pad, the first protrusion (12) is disposed to surround the first opening (17), and the second protrusion (12; see figure 6) is disposed to surround the second opening (17;see figure 6).
Regarding claim 8, Denso discloses the printed circuit board (see figure 6) wherein the wiring layer (see figure 6) further includes a second pad spaced apart from the first pad, and the resist layer (11) further has a second opening over the second pad (see figure 6).
Regarding claim 9, Denso discloses the printed circuit board (see figure 6), wherein the first post (10) is disposed to surround the first and second pads (see figure 6), and the first protrusion (12) is disposed to surround the first and second openings (see figure 6).
Regarding claim 11, Denso discloses the printed circuit board (see figure 6), wherein the wiring layer (see figure 6) protrudes away from the outermost side of the insulating layer (1).
Regarding claim 12, Denso discloses the printed circuit board (see figure 6), wherein the wiring layer (see figure 6) is buried in the insulating layer (1) based on an upper surface of the insulating layer (see figure 6).
Regarding claim 13, Denso discloses the printed circuit board (see figure 6), further comprising: a wiring structure including a plurality of insulating layers (1), a plurality of wiring layers, and a plurality of via layers (see figure 6), wherein the insulating layer (1) on which the wiring layer is disposed is disposed on an outermost side of the plurality of insulating layers (see figure 5).
Regarding claim 14, Denso discloses the printed circuit board (see figure 6), wherein the resist layer (11) does not cover at least a portion of the first pad (see figure 6).
Regarding claim 15, Denso discloses the printed circuit board (see figure 6), wherein the first post (10) is embedded in the resist layer (11).
Regarding claim 16, Denso discloses the printed circuit board (see figure 6), wherein the first post (10) includes copper.
Regarding claim 17, Demo discloses a printed circuit board (see figure 6), comprising: an insulating layer (1); a metal pad disposed at an outermost side of the insulating layer (1); a metal post (10) disposed on the outermost side of the insulating layer (1) and disposed around the metal pad, wherein an outermost surface of the metal post (10) is disposed above an outermost surface of the metal pad; and a resist layer (11) disposed on the outermost surface of the insulating layer (1), and covering the metal pad and the metal post (10), wherein an outermost surface of the resist layer (11) protrudes from a region covering the metal post (10) and includes an opening (17) over the metal pad (see figure 6).
Regarding claim 18, Demo discloses the printed circuit board (see figure 6), wherein the metal post (10) surrounds the metal pad in a ring shape (see figure 6).
Regarding claim 19, Demo discloses the printed circuit board (see figure 6), comprising a plurality of the metal pad and a plurality of the metal post (10), and each of the plurality of the metal post surrounds each of the plurality of the metal pad in a ring shape (see figure 6).
Allowable Subject Matter
Claims 4, 7 and 10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner's statement of reasons for allowance: The primary reasons for the indication of the allowability of claims 4, 7 and 10 are:
Regarding claim 4, the prior art does not teach or fairly suggest in combination with the other claimed limitations the printed circuit board, further comprising: a first surface treatment layer disposed in the first opening and on an outermost surface of the first pad; a second surface treatment layer disposed in the second opening and on an outermost surface of the second pad; a first solder bump disposed on the resist layer, filling the first opening, and connected to the first surface treatment layer; and a second solder bump disposed on the resist layer, filling the second opening, and connected to the second surface treatment layer.
Regarding claim 7, the prior art does not teach or fairly suggest in combination with the other claimed limitations the printed circuit board, further comprising: a first surface treatment layer disposed in the first opening and on an outermost surface of the first pad; a second surface treatment layer disposed in the second opening and on an outermost surface of the second pad; a first solder bump disposed on the resist layer, filling the first opening, and connected to the first surface treatment layer; and a second solder bump disposed on the resist layer, filling the second opening, and connected to the second surface treatment layer.
Regarding claim 10, the prior art does not teach or fairly suggest in combination with the other claimed limitations the printed circuit board, further comprising: a first surface treatment layer disposed in the first opening and on an outermost surface of the first pad; a second surface treatment layer disposed in the second opening and on an outermost surface of the second pad; a first solder bump disposed on the resist layer, filling the first opening, and connected to the first surface treatment layer; and a second solder bump disposed on the resist layer, filling the second opening, and connected to the second surface treatment layer.
These limitations are found in claims 4, 7 and 10, and are neither disclosed nor taught by the prior art of record, alone or in combination.
Conclusion
5. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kim et al (US 8,889,994, US 11,997,788 and US 12,213,251), Nam et al (US 12,010,795), Takeuchi et al (US 8,664,534), Kondo (US 8,153,901) and Huyn et al (US 2013/0153266) disclose a printed circuit board.
6. Any inquiry concerning this communication should be directed to Angel R. Estrada at telephone number (571) 272-1973. The Examiner can normally be reached on Monday-Friday (8:30am -5:00pm).
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Imani N. Hayman can be reached on (571) 270-5528. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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January 24, 2026
/ANGEL R ESTRADA/Primary Examiner, Art Unit 2841