Prosecution Insights
Last updated: April 19, 2026
Application No. 18/673,943

STANDBY METHOD FOR SWITCHING POWER SUPPLY, SWITCHING POWER SUPPLY, AND PRIMARY AND SECONDARY CONTROL CIRCUITS

Non-Final OA §102
Filed
May 24, 2024
Examiner
ZHANG, JUE
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Diodes Incorporated
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
2y 7m
To Grant
93%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
825 granted / 993 resolved
+15.1% vs TC avg
Moderate +10% lift
Without
With
+10.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
19 currently pending
Career history
1012
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
34.2%
-5.8% vs TC avg
§102
49.9%
+9.9% vs TC avg
§112
8.9%
-31.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 993 resolved cases

Office Action

§102
DETAILED ACTION This office action is in response to the application filed on 05/24/2024. Claims 1-20 are pending. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Applicant’s claim for the benefit of a prior-filed application under 35 U.S.C. 119(e) or under 35 U.S.C. 120, 121, or 365(c) is acknowledged. Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file. Drawing The drawing submitted on 05/24/2024 is acknowledged and accepted by the examiner. Information Disclosure Statement The information disclosure statements (IDS) submitted on 07/10/2024, 09/05/2025, and 12/23/2025 have been considered by the examiner. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-2, 4, 9-11, 14-16, 20 are rejected under 35 U.S.C. 102(a)(1) and/or (a)(2) as being anticipated by Liao et al. (US Patent or PG Pub. No. 20130215651, hereinafter ‘651). Claim 1, ‘651 teaches a standby method for a switching power supply (e.g., see figures 4- 11), characterized by being applied to a switching power supply provided with an optical coupler circuit (e.g., 8041, 8042), the standby method comprising: upon detecting a mode control signal indicating that a load device power supply demand (e.g., the load demand corresponding to and/or being function of Vout) is greater than a preset value (e.g., when the output voltage Vout is not larger than the predetermined voltage Vprd1 and/or Vprd2, see [0059]-[0061], Fig. 9-10), entering, by the switching power supply, a first mode (e.g., normal operation mode, see [0059]-[0061], Fig. 9-10), and controlling output voltage of the switching power supply by means of the optical coupler circuit (e.g., see [0059]-[0061], Fig. 9-10); and upon detecting a mode control signal indicating that the load device power supply demand (e.g., the load demand corresponding to Vprd2) is less than or equal to the preset value, entering, by the switching power supply, a second mode (e.g., stand-by mode), turning off a bias current of the optical coupler circuit (e.g., S1 Off, when the output voltage Vout is larger than the predetermined voltage Vprd2, see [0059]-[0061], Fig. 9-10), so as to reduce bias currents of a primary side and a secondary side of the switching power supply, and reduce standby power consumption of the switching power supply (e.g., see [0059]-[0061], Fig. 9-10). Claim 2, ‘651 teaches the limitations of claim 1 as discussed above. It further teaches that wherein the entering a second mode comprises: generating, according to the bias current of the optical coupler circuit, a notification signal (e.g., when the output voltage Vout is larger than the predetermined voltage Vprd2, see [0059]-[0061], Fig. 9-10) indicating that the switching power supply has entered the second mode; and controlling, according to the notification signal maintained for a first preset time length (e.g., the corresponding active time length of the output of 8045 in stand-by mode), a secondary side control chip to enter the second mode (e.g., when the output voltage Vout is larger than the predetermined voltage Vprd2, see [0059]-[0061], Fig. 9-10). Claim 4, ‘651 teaches the limitations of claim 1 as discussed above. It further teaches that wherein the turning off a bias current of the optical coupler circuit, and controlling the output voltage of the switching power supply by means of a driving pulse signal comprises: when a primary side control chip (e.g., the circuits comprising 8051, 8052) acquires an output undervoltage signal indicating that the output voltage is in an undervoltage state (e.g., when the output voltage Vout is not larger than the predetermined voltage Vprd1, see [0060]), outputting the driving pulse signal at the primary side control chip (e.g., the output of 8052, see [0060]); and adjusting the output voltage of the switching power supply of the driving pulse signal, so that the switching power supply is in the second mode (e.g., see [0060], Fig. 9-10). Claim 9, ‘651 teaches a switching power supply (e.g., see Fig. 4-11) comprising: an optical coupler circuit (e.g., 8041, 8042) coupled between a primary side and a secondary side; a mode signal generating circuit (e.g., the circuits comprising 804, 805), configured to measure a load device power supply demand of the switching power supply (e.g., the load demand corresponding to and/or being function of Vout), and generate a second mode control signal (e.g., stand-by mode) when the load device power supply demand is less than or equal to a preset value (e.g., the load demand corresponding to Vprd2); an optical coupler control circuit (e.g., the circuits comprising S1, 8045), which controls, according to the second mode control signal, a bias current (e.g., Iopt of 8041) of the optical coupler circuit to be turned off (e.g., S1 Off, when the output voltage Vout is larger than the predetermined voltage Vprd2, see [0059]-[0061], Fig. 9-10); and a switching power supply output control circuit, configured to generate a first mode control signal (e.g., normal operation mode) when the load device power supply demand is greater than the preset value (e.g., when the output voltage Vout is not larger than the predetermined voltage Vprd1 and/or Vprd2, see [0059]-[0061], Fig. 9-10), control, according to the first mode control signal, the switching power supply to enter a first mode (e.g., normal operation mode), control a output voltage of the switching power supply by means of the optical coupler circuit, control, according to the second mode control signal, the switching power supply to enter a second mode (e.g., stand-by mode), and control the output voltage of the switching power supply by means of a driving pulse signal (e.g., the output of 8052 during the Stand-By mode operation, see [0059]-[0061], Fig. 9-10), so as to reduce bias currents of the primary side and the secondary side of the switching power supply, and reduce standby power consumption of the switching power supply (e.g., see [0059]-[0061], Fig. 9-10). Claim 10, ‘651 teaches the limitations of claim 9 as discussed above. It further teaches that wherein the switching power supply output control circuit comprises: a notification signal control circuit (e.g., the circuits comprising 8045, 8044, 8053, 8055) configured to generate a notification signal (e.g., the output of 8053 and 8055) upon receiving the second mode control signal, and configured to notify a primary side control chip (e.g., the circuits comprising 8053, 8055) to enter or exit the second mode, so that the switching power supply controls the output voltage of the switching power supply by means of the driving pulse signal, so as to reduce the bias currents of the primary side and the secondary side of the switching power supply, and reduce the standby power consumption of the switching power supply (e.g., see [0059]-[0061], Fig. 9-10); and a primary mode control circuit (e.g., 8054, 8052), configured to receive the notification signal, and control, based on the notification signal, a primary side control chip (e.g., 8053, 8055, 8054, 8052) to change an operation mode, the operation mode comprising the first mode or the second mode, wherein when the load device power supply demand is greater than the preset value, the switching power supply enters the first mode, and the output voltage of the switching power supply is controlled by means of the optical coupler circuit (e.g., see [0059]-[0061], Fig. 9-10). Claim 11, ‘651 teaches the limitations of claim 1 as discussed above. It further teaches that wherein the notification signal control circuit having: a first second-mode-entering control circuit (e.g., the circuits comprising S1, 8041, 8044, 8042), configured to generate, according to the bias current of the optical coupler circuit, the notification signal indicating that the switching power supply has entered the second mode, and control, according to the notification signal maintained for a first preset time length (e.g., the corresponding active time length of the output of 8045 in stand-by mode), a secondary side control chip (e.g., the circuits comprising 8044, S1, 8041, 8042) to enter the second mode (e.g., when the output voltage Vout is larger than the predetermined voltage Vprd2, see [0059]-[0061], Fig. 9-10). Claim 14, ‘651 teaches the limitations of claim 10 as discussed above. It further teaches that wherein the notification signal control circuit further having: a second secondary second-mode-exiting control circuit, configured to control, according to the notification signal maintained for a third preset time length (e.g., the corresponding active time length of the output of 8045 in normal operation mode), a secondary side control chip (e.g., the circuits comprising 804) to exit the second mode (e.g., when the output voltage Vout is not larger than the predetermined voltage Vprd1 and/or Vprd2, see [0059]-[0061], Fig. 9-10). Claim 15, ‘651 teaches a secondary control circuit of a switching power supply (e.g., see Fig. 4-11) comprising: an optical coupler circuit (e.g., 8041, 8042) coupled between a primary side and a secondary side of the switching power supply; a mode signal generating circuit (e.g., the circuits comprising 804, 805), configured to measure a load device power supply demand of the switching power supply (e.g., the load demand corresponding to and/or being function of Vout), and generate a second mode control signal (e.g., stand-by mode) when the load device power supply demand is less than or equal to a preset value (e.g., the load demand corresponding to Vprd2, see [0059]-[0061], Fig. 9-10); an optical coupler control circuit (e.g., the circuits comprising S1, 8045), which controls, according to the second mode control signal, a bias current (e.g., Iopt of 8041) of the optical coupler circuit to be turned off (e.g., S1 Off, when the output voltage Vout is larger than the predetermined voltage Vprd2, see [0059]-[0061], Fig. 9-10); and a notification signal control circuit (e.g., the circuits comprising 8045, 8044, 8053, 8055), which generates a notification signal (e.g., the output of 8053 and 8055) upon receiving the second mode control signal, and is configured to notify a primary side control chip (e.g., the circuits comprising 8053, 8055) to enter or exit a second mode (e.g., stand-by mode), so that the switching power supply controls output of the switching power supply by means of a driving pulse signal (e.g., the output of 8052 during stand-by mode), so as to reduce bias currents of the primary side and the secondary side of the switching power supply, and reduce standby power consumption of the switching power supply (e.g., see [0059]-[0061], Fig. 9-10). Claim 16, ‘651 teaches the limitations of claim 15 as discussed above. It further teaches that wherein the notification signal control circuit having: a third second-mode-entering control circuit (e.g., the circuits comprising S1, 8041, 8044, 8042), configured to generate, according to the bias current of the optical coupler circuit, the notification signal indicating that the switching power supply has entered the second mode, and control, according to the notification signal maintained for a first preset time length (e.g., the corresponding active time length of the output of 8045 in stand-by mode), a secondary side control chip (e.g., the circuits comprising 8044, S1, 8041, 8042) to enter the second mode (e.g., when the output voltage Vout is larger than the predetermined voltage Vprd2, see [0059]-[0061], Fig. 9-10). Claim 20, ‘651 teaches the limitations of claim 15 as discussed above. It further teaches that wherein the notification signal control circuit further having: a fourth secondary second-mode-exiting control circuit, and control, according to the notification signal maintained for a third preset time length (e.g., the corresponding active time length of the output of 8045 in normal operation mode), a secondary side control chip (e.g., the circuits comprising 804) to exit the second mode (e.g., when the output voltage Vout is not larger than the predetermined voltage Vprd1 and/or Vprd2, see [0059]-[0061], Fig. 9-10). Allowable Subject Matter Claims 3, 5-8, 12-13, 17-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matters: For claim 3, the prior art does not disclose or suggest, in combination with the limitations of the base claim and any intervening claims, primarily,… wherein the entering a second mode having: when a primary side control chip acquires that a level signal of a voltage signal outputted by the optical coupler circuit has been inverted and a retention time length of the inverted level signal has reached a time threshold, controlling … to enter the second mode, wherein the time threshold is greater than a maximum value of a duration of the level signal in the first mode, … the secondary side control chip controls a duration of the mode control signal indicating that the load device power supply demand is less than or equal to the preset value to be greater than the time threshold. For claims 5-7, the prior art does not disclose or suggest, in combination with the limitations of the base claim and any intervening claims, primarily,… further having: when a secondary side control chip acquires the mode control signal indicating that the load device power supply demand is greater than the preset value, outputting, by means of a transformer, a wake-up signal which has a preset frequency and which indicates exiting the second mode, controlling the secondary side control chip to stop outputting the wake-up signal, and controlling, according to the wake-up signal, the secondary side control chip to exit the second mode. For claim 8, the prior art does not disclose or suggest, in combination with the limitations of the base claim and any intervening claims, primarily,… wherein the turning off a bias current of the optical coupler circuit, and controlling the output voltage of the switching power supply by means of a driving pulse signal having: when an input voltage of an auxiliary winding of the primary side is adjusted to be within a preset range, outputting the driving pulse signal at a primary side control chip; … adjusting the output of the switching power supply according to the driving pulse signal and a relationship between the input voltage and the output voltage, … the switching power supply is in the second mode. For claim 12, the prior art does not disclose or suggest, in combination with the limitations of the base claim and any intervening claims, primarily,… wherein the notification signal control circuit further having: a first secondary second-mode-exiting control circuit, … to output, by means of a transformer when the secondary side control chip acquires the first mode control signal indicating that the load device power supply demand is greater than the preset value, a wake-up signal which has a preset frequency and which indicates exiting the second mode, control the secondary side control chip to stop outputting the wake-up signal, and control, according to the wake-up signal, the secondary side control chip to exit the second mode. For claim 13, the prior art does not disclose or suggest, in combination with the limitations of the base claim and any intervening claims, primarily,… wherein the notification signal control circuit further having: a second second-mode-entering control circuit, configured to control, when the primary side control chip acquires that a level signal of a voltage signal outputted by the optical coupler circuit has been inverted and a retention time length of the inverted level signal has reached a time threshold, the primary side control chip to enter the second mode, wherein the time threshold is greater than a maximum value of a duration of the level signal in the first mode, … a secondary side control chip controls a duration of the second mode control signal indicating that the load device power supply demand is less than or equal to the preset value to be greater than the time threshold. For claim 17, the prior art does not disclose or suggest, in combination with the limitations of the base claim and any intervening claims, primarily,… wherein the notification signal control circuit further having: a fourth second-mode-entering control circuit, …, when the primary side control chip acquires that a level signal of a voltage signal outputted by the optical coupler circuit has been inverted and a retention time length of the inverted level signal has reached a time threshold, the primary side control chip to enter the second mode, wherein the time threshold is greater than a maximum value of a duration of the level signal in a first mode, and a secondary side control chip controls a duration of the second mode control signal indicating that the load device power supply demand is less than or equal to the preset value to be greater than the time threshold. For claims 18-19, the prior art does not disclose or suggest, in combination with the limitations of the base claim and any intervening claims, primarily,… wherein the notification signal control circuit further having: a third secondary second-mode-exiting control circuit, configured to output, by means of a transformer when a secondary side control chip acquires a first mode control signal indicating that the load device power supply demand is greater than the preset value, a wake-up signal which has a preset frequency and which indicates exiting the second mode, control a secondary side control chip to stop outputting the wake-up signal, … control, according to the wake-up signal, the secondary side control chip to exit the second mode. Examiner's Note: Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JUE ZHANG whose telephone number is (571)270-1263. The examiner can normally be reached on M-F: 8:30AM-5:00PM If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached on 571-272-2838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JUE ZHANG/ Primary Examiner, Art Unit 2838
Read full office action

Prosecution Timeline

May 24, 2024
Application Filed
Feb 07, 2026
Non-Final Rejection — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12603582
BIDIRECTIONAL LOW DC-DC CONVERTER INCLUDING LOSSLESS SNUBBER CIRCUIT, CONTROL METHOD OF BIDIRECTIONAL LDC AND BIDIRECTIONAL LDC SYSTEM
2y 5m to grant Granted Apr 14, 2026
Patent 12604430
SYSTEMS FOR INTEGRATING CHOKE INTO INVERTER HEADER SUB-ASSEMBLY FOR IMPROVING EMC PERFORMANCE
2y 5m to grant Granted Apr 14, 2026
Patent 12591262
LOW POWER VOLTAGE REFERENCE
2y 5m to grant Granted Mar 31, 2026
Patent 12587100
POWER CONVERSION DEVICE AND CONTROL METHOD THEREOF
2y 5m to grant Granted Mar 24, 2026
Patent 12573942
DISTRIBUTED PHASE-SHIFTING TRANSFORMING POWER SUPPLY SYSTEM
2y 5m to grant Granted Mar 10, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
93%
With Interview (+10.1%)
2y 7m
Median Time to Grant
Low
PTA Risk
Based on 993 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month