DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant's claim for foreign priority based on an application filed in Germany (DE) on 10/06/2022. It is noted, however, that applicant has not filed a certified copy of DE10/20221258696 in the application as required by 37 CFR 1.55.
Election/Restrictions
Applicant's election with traverse of Species II in the reply filed on 07/24/2026 is acknowledged. The traversal is on the ground(s) that Species I is prior art, Species III being an arrangement of a plurality of single-pixel devices of species II and therefore not subject to restriction, Sub-Species A and B being only applicable to the non-elected species III, also that the Sub-Species A and B can be extensions of the devices shown in Figs. 2-3 and therefore not a serious search burden are acknowledged.
In response to Species I being prior art, this is found persuasive because drawings of prior art are not subject to a restriction requirement.
In response to Sub-Species A and Sub-Species B being directed to a non-elected species, and therefore an election of Sub-Species A or Sub-Species B not being required, this is found persuasive because of the election of Species II and Sub-Species A and Sub-Species B being directed to only Species III. In light of this, since Figs. 5A (Sub-Species A) and 5B (Sub-Species B) are directed to only Fig. 4 (The non-elected Species III), the argument of a serious search burden between Sub-Species A and Sub-Species B is no longer relevant.
In response to Species III being an arrangement of a plurality of single-pixel devices of species II and therefore not a different species and/or not requiring a serious search burden, this is found not persuasive as the structure shown in Fig. 3 (Species II) and the structure shown in Fig. 4 (Species III) are mutually exclusive. In Fig. 3 the pixel is coated with layer 14 which is absent in Fig. 4, and in Fig. 4 electric contact 7 is not in Fig. 3. The roughened interface 12, 12a, 12b is also offset in Fig. 4 while being centered in Fig 3. Additionally in Fig. 3 reflective side walls 15 surround each pixel while in Fig. 4 reflective side walls are only on the outside boarder of a multitude of pixels. Since the two Species have mutually exclusive structures, in the examiner’s view this is a different field of search: Where it is necessary to search for one of the inventions in a manner that is not likely to result in finding art pertinent to the other invention(s).
The requirement is still deemed proper and is therefore made FINAL.
Claim 14-15 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected Species III, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 07/24/2026.
Regarding claim 14: “The light emitting device according to claim 13, wherein the separate roughened interface areas are further distant from a neighbouring edge of neighbouring surface areas than from an opposing edge of the respective surface area.” Appears to be directed to Fig. 4 of the non-elected species III, Specifically the distances labeled D1 and D2.
Regarding claim 15: The claim language “each second contact” appears to refer to element 7 in Fig. 4, drawn to the non-elected species III. The examiner notes that if claim 15 were to be considered, there are potential issues under 112(b) (See statutory basis below), the claim language “each second contact” has no antecedent basis, and the electric contact via is stated in claim 1 to be connected to the first contact, not the second, which separates the regions in claim 11.
Drawings
Figure 1 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 1 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding claim 1: The claim language “an interface between a top surface of the semiconductor layer stack and the medium above the top surface is roughened“ lacks sufficient written description in the specification. An “interface” being the area between two surfaces is not what is roughened, unless the interface refers to a third material that is in between the semiconductor body (See Fig. 2 element 11) and the medium (See Fig. 2 element 10). A person of ordinary skill in the art would assume the semiconductor body and/or the medium is roughened, or there is third material between the semiconductor body and the medium that is roughened. Therefore, there is a lack of sufficient written description detailing what part of the device is roughened or if there is an undisclosed third material.
For the purposes of examination, the roughened surface will be assumed to be the semiconductor body.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 1 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1: As discussed in the rejection under 112 (a) there are alternative interpretations of a “roughened interface” as claimed in claim 1. It could mean that the semiconductor body, the medium, or a third material between the two is roughened. Each interpretation would affect the scope of the claim; therefore, the scope of the claim is indefinite.
For the purposes of examination, the roughened surface will be assumed to be the semiconductor body.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 3, 5-6, and 8-13 is/are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Yoon US 20220190201 A1, hereinafter referred to as Yoon201.
Regarding claim 1: Yoon201 teaches a light emitting device (“A semiconductor light emitting device is provided”, abstract) comprising: a semiconductor layer stack with a first layer of a first doping type, a second layer of a second doping type, and an active region arranged between the first and the second layer (“The first conductivity-type semiconductor layer 122, the active layer 124, and the second conductivity-type semiconductor layer 126 may be formed of a nitride semiconductor, and the light emitting structure 120 may be a nitride light emitting structure.”, para. [0021]); a first electric contact connected to an electric contact via, the electric contact via extending electrically isolated (“Referring to FIG. 8B, first contact electrodes 142 may be formed to be connected to the first conductivity-type semiconductor layer 122, and a first interlayer insulating layer 162 may be formed in the holes TH.”, para. [0074]) through the second layer and the active region and contacting the first layer (“Holes TH may be formed through the first conductivity-type semiconductor layer 122, the active layer 124 and a portion of the second conductivity-type semiconductor layer 126 to expose a certain region of the second conductivity-type semiconductor layer 126. A process of forming the holes TH may be implemented by an etching process of removing certain regions of the first conductivity-type semiconductor layer 122 and the active layer 124. A region of the second conductivity-type semiconductor layer 126, exposed by the holes TH, may be provided as a region for forming the second electrode 150 (see FIG. 1B).”, para. [0073]); a second electric contact contacting the second layer (“The first electrode 140 and the second electrode 150 may be disposed below the light emitting structure 120 to be electrically connected to the first conductivity-type semiconductor layer 122 and the second conductivity-type semiconductor layer 126, respectively.”, para. [0033]); and a medium (“The reflective resin portion 230 may be formed to be higher than an upper surface of the dam structure 130, and thus, may provide a region in which a wavelength conversion portion 220 (see FIG. 5) may be formed.”, para. [0095]), wherein the first electric contact and the second electric contact are arranged on the second layer on a bottom surface of the semiconductor layer stack (See Fig. 5 annotated below), and wherein an interface between a top surface of the semiconductor layer stack and the medium above the top surface is roughened in an area smaller than an area of the top surface (“In contrast to the light emitting structure 120, the dam structure 130 may not have uneven portions P on an upper surface thereof and may have a substantially planar upper surface.”, para. [0031]).
PNG
media_image1.png
811
1198
media_image1.png
Greyscale
Fig 5. Taken from Yoon201 and annotated: Electric contact via 154 is electrically separated from the second layer and active region by first insulating layer 162. Portions of the top surface of layer 126 are depicted as unroughened. The first 152 and second 144 electric contacts are shown to be on the bottom of the second layer 122 of the semiconductor stack.
Regarding claim 3: Yoon201 teaches the light emitting device according to claim 1, wherein the medium above the top surface is a converter layer arranged on the first layer on the top surface of the semiconductor layer stack (See Fig. 5 annotated above, medium is on top of semiconductor region 130), and wherein the converter layer is configured to convert light of a first wavelength generated in the active region into light of a second wavelength. (“The wavelength conversion portion 220 may be disposed on the semiconductor light emitting device 100 inside the reflective resin portion 230. Specifically, the wavelength conversion portion 220 may be disposed on the light emitting structure 120 and the dam structure 130 of the semiconductor light emitting device 100, and may be configured to convert a wavelength of light emitted from an active layer 124. The wavelength conversion portion 220 may include a wavelength conversion material such as a phosphor or quantum dot material configured to convert a wavelength of light generated from the light emitting structure 120.”, para. [0053]).
Regarding claim 5: Yoon201 teaches the light emitting device according to claim 1, wherein the roughened interface is distant from a circumference of the top surface. (See Fig. 1A, planar region 130 surrounds light emitting structure 120 where roughened portions P are located).
Regarding claim 6: The light emitting device according to claim 1, wherein the roughened interface provides a better outcoupling of light from the top surface into a converter layer compared to an unroughened interface. (“The light emitting structure 120 may have uneven portions P for improving light extraction efficiency on a surface of the second conductivity-type semiconductor layer 126.”, para. [0026]).
Regarding claim 8: Yoon 201 teaches the light emitting device according to claim 1, further comprising a reflective sidewall arranged on at least one side surface of the semiconductor layer stack, the side surface connecting the top surface and the bottom surface with each other. (The reflective resin portion 230 may be formed to cover external side surfaces of a dam structure 130, a first electrode 140, a second electrode 150, an interlayer insulating layer 160, and the substrate structure 110 of the semiconductor light emitting device 100.”, para. [0094]).
Regarding claim 9: Yoon201 teaches the light emitting device according to claim 1, further comprising a reflective layer arranged on the bottom surface of the semiconductor layer stack, the reflective layer surrounding the first and second electric contacts. (“According to example embodiment, the interlayer insulating layer 160 may include at least one layer provided as a reflective insulating layer. For example, the reflective insulating layer may have a distributed Bragg reflector (DBR) structure in which dielectric layers having different refractive indices are alternately stacked. According to example embodiments, the semiconductor light emitting device 100 may further include a reflective metal layer disposed on at least one layer of the interlayer insulating layer 160., para. [0038], “The interlayer insulating layer 160 may be disposed to be in contact with the first electrode 140 and/or the second electrode 150.”, para. [0037]).
Regarding claim 10: Yoon201 teaches the light emitting device according to claim 1, wherein at least the second layer and the active region is separated into a first portion and at least a second portion. (The examiner notes that there is nothing in the claim language to distinguish the first region and the second region, such that the second layer and active region may be arbitrarily divided into two regions, see close up of Fig. 5 from Yoon201 annotated below)
Regarding claim 11: Yoon201 teaches the light emitting device according to claim 10, wherein the first portion and the at least second portion are separated by the electric contact via (The examiner notes that there is nothing in the claim language to distinguish the first region and the second region, such that the second layer and active region may be arbitrarily divided into two regions, provided that the electric contact via is in between them, see close up of Fig. 5 from Yoon201 annotated below).
Regarding claim 12: Yoon201 teaches the light emitting device according to claim 10, wherein above each of the first portion and the at least second portion the interface between the first layer and a converter layer is roughened in separate areas, the separate areas being spaced from each other. (The examiner notes that there is nothing in the claim language to distinguish the first region and the second region, such that the second layer and active region may be arbitrarily divided into two regions, each region being slightly separated and containing roughened regions, see close up of Fig. 5 from Yoon201 annotated below).
Regarding claim 13: The light emitting device according to claim 12, wherein the top surface is divided into surface areas, one surface area of each of which is assigned to the first portion and the at least second portion, and wherein the separate roughened interface areas are each distant from a circumference of the respective surface area. (The examiner notes that there is nothing in the claim language to distinguish the first region and the second region, such that the second layer and active region may be arbitrarily divided into two regions with a roughened top surface, both separated by a space, see close up of Fig. 5 from Yoon201 annotated below)
PNG
media_image2.png
670
1113
media_image2.png
Greyscale
Close up of Fig. 5 from Yoon201: Both regions (depicted above as dashed outlines) are separated by an electric contact via and have top surfaces separated by a space within the planar perimeter 130.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2 and 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yoon US 20220190201 A1, hereinafter referred to as Yoon201, in view of Tasaki (US 20190273182 A1) hereinafter referred to as Tasaki182.
Regarding claim 2: Yoon201 teaches the light emitting device according to claim 1, Yoon201 does not explicitly state that the area smaller is at least 10% smaller than the area of the top surface. Yoon201 states “A width W of the dam structure 130 may vary in example embodiments. In example embodiments, the external side surface of the dam structure 130 may be vertical, or the dam structure 130 may have a side surface inclined such that the width of the dam structure 130 increases in a downward direction.”, para. [0032]).
Tasaki182 recognizes that the area of the roughened surface and the surrounding flat surface can improve the light output power (“The following can be found from Table 1. In Examples 1 to 3 and Comparative Examples 1, 2 where the line width W .sub.1 of the wiring electrode portion is equal to or less than 4.0 μm which is half the line width in Conventional Examples 1 and 2, the light output power was significantly improved. In terms of only improving the light output power, Comparative Example 1 is most preferable. Comparing Conventional Example 1 with Conventional Example 2, the light output power is found to have improved slightly more in Conventional Example 2 where the line width W.sub.2 of the flat surface portion F was smaller; however, in comparison with this improvement, the effect of reducing the line width W.sub.1 of the wiring electrode portion was found to be more significant. This may be because not only did the light emitting area in the semiconductor layer surface simply increase, but also the light emitting area around the wiring electrode portion where current was most concentrated was increased.”, para. [0114]). Therefore, the area of the roughened surface and the surrounding flat region is a result-effective variable.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to vary, through routine optimization, the result-effective variable of the dimensions of the roughened area and the surrounding flat area in order to determine the optimum or workable ranges and arrive at the claimed invention (MPEP 2144.05). Furthermore, the applicant has not presented persuasive evidence that the claimed ratio of roughened area to surrounding flat area is for a particular purpose that is critical to the overall claimed invention.
Regarding claim 4: In addition to the reasoning used to reject claim 3, Yoon201 teaches that the active layer 124 (active region) extends throughout the entire light emitting portion and the boundary regions 130 and that the interface between the first layer and the converter layer is roughened in a central area above the active region (Uneven portion P). Yoon201 does not explicitly teach that a central region is at least 10% smaller than a projection of the active region in view of a direction perpendicular to the top surface.
Tasaki182 also depicts the light emitting layer 122 (active layer) as extending horizontally throughout the entire semiconductor stack. Since the top surface area of the semiconductor stack and the active area in Tasaki182 are substantially the same width, the ratio of the roughened area to the total area of the top surface is substantially the same as the ratio of the roughened portion to the width of active region below. For these reasons, in the examiners view, the reasoning used to reject claim 2 is also equally valid for rejecting claim 4. Similarly, the applicant has not presented persuasive evidence that the claimed ratio of roughened area to the area of the active region below is for a particular purpose that is critical to the overall claimed invention.
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yoon US 20220190201 A1, hereinafter referred to as Yoon201, in view of Jung et al. (US 20150091037 A1) hereinafter referred to as Jung037.
Regarding claim 7: Yoon201 teaches the light emitting device according to claim 1, and that the planar surrounding region 130 may have structure (“The dam structure 130a may have a structure, independent of the light emitting structure 120, and may include materials different from the light emitting structure 120. For example, the dam structure 130a may be formed of a high-reflectivity material. In this case, light extraction efficiency may be further improved.” para. [0041]). Yoon201 does not explicitly teach what kind of coating is arranged on the top surface surrounding the roughened interface, or the coating comprising a higher transmission for light incident on the coating perpendicular to the top surface than light incident on the coating at a shallower angle relative to the top surface. (The examiner notes that the claim language appears to refer to the phenomenon of total internal reflection, where light passing through a material with a higher refractive index into a material with a lower refractive index will be reflected at shallower angles).
Jung037 teaches a coating of materials with lower refractive index than the semiconductor body (“A plurality of lower refractive layers is provided on an outer surface of the semiconductor structure layer. The lower refractive layers includes a first lower refractive layer having a first refractive index lower than a refractive index of the semiconductor structure layer on a surface of the semiconductor structure layer, and a second lower refractive layer having a second refractive index lower than the first refractive index on an outer surface of the first lower refractive layer.”, abstract)
A person of ordinary skill in the art before the effective filing date of the claimed invention, looking to improve the output efficiency of a LED device, would have consulted the prior art to find the teachings of Jung037. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention, that incorporating a layer with a lower refractive index than the semiconductor body, as taught by Jung037, into the device taught by Yoon201, to arrive at the claimed invention, would have a reasonable chance of improving the light output efficiency.
Claim(s) 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yoon US 20220190201 A1, hereinafter referred to as Yoon201, in view of Wu et al. (US 20220359786 A1) hereinafter referred to as Wu786.
Regarding claim 16: Yoon201 teaches the light emitting device according to claim 1, Yoon201 is silent on the overall dimensions of the device.
Wu786 teaches a LED device with an overall size less than 40 µm (In light of the specification µLED is considered to be a pixel with a pitch or center-to-center distance of less than 40 µm, Wu786 teaches: “The term “micro light-emitting diode” mainly refers to a micron-level light-emitting diode which has a width ranging from 2 μm to 100 μm and has a length ranging from 2 μm to 100 μm. In certain embodiment, each of the length and the width of the micro light-emitting diode ranges from 2 μm to 5 μm, from 5 μm to 10 μm, from 10 μm to 20 μm, from 20 μm to 50 μm, or from 50 μm to 100 μm., para. [0019]). Wu786 also teaches the advantages of µLEDs (“Micro light emitting diodes (microLEDs), having advantages such as low power/energy consumption, high luminance, high resolution, high color saturation, fast response speed, and long service life, are a next generation light source for display devices and are the focus of research and development in the industry, especially for achieving higher light-extraction efficiency.”, para. [0003]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention that µLEDs have several advantages over lager LEDs. µLEDs were well-known in the art at the effective filing date of the invention, and as claimed, a µLED could be combined with the device in Yoon201 to arrive at the claimed invention, for instance, by attaching the µLED to the substrate as taught by Wu786. The light emitting device of Yoon201 and the µLED would simply be performing the functions as they would separately and the results would be predictable. (The examiner notes that the way claim 16 is written, the µLED could be a separate semiconductor stack that does not have the same structural limitations as the semiconductor stack described in claim 1, but could be a totally separate part of the device, regardless, the structure disclosed in Wu786 is substantially the same as the structure of the semiconductor body in claim 1).
Citation of Pertinent Prior Art
The prior art made of record and not relied upon is considered relevant to the Applicant’s Disclosure: Wang et al. (US 20220359787 A1) teaches a µLED with a similar structure to the claimed invention.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROBERT L STEWART whose telephone number is (571)-270-0853. The examiner can normally be reached M-F 8:00am-4:00pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Manno can be reached at (571)-272-2339. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ROBERT L STEWART/ Examiner, Art Unit 2898
/JESSICA S MANNO/ SPE, Art Unit 2898
Prosecution Insights