DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Invention I, Species I in the reply filed on 7/14/2026 is acknowledged.
Claims 5-10 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention and species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 7/14/2026.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Guo et al. (US PG Pub 2022/0302291, hereinafter Guo).
Regarding claim 1, figure 5I of Guo discloses a semiconductor structure, comprising:
a substrate (112);
a semiconductor layer (116) on the substrate;
a gate structure (126) on the semiconductor layer;
a first dielectric layer (121) continuously extending on the gate structure and the semiconductor layer, wherein the first dielectric layer comprises a first portion and a second portion;
an etch stop layer (123) on at least the first portion of the first dielectric layer;
a second dielectric layer (147) on the etch stop layer; and
a field plate (140) comprising a first field plate portion on the second dielectric layer and a second field plate portion on the second portion of the first dielectric layer, wherein a lower surface of the first field plate portion is a first distance away from the semiconductor layer, a lower surface of the second field plate portion is a second distance away from the semiconductor layer, the first distance is larger than the second distance, the field plate has a first projection on the substrate along a vertical direction of the substrate, the gate structure has a second projection on the substrate along the vertical direction of the substrate, and the first projection does not cover the second projection.
Regarding claim 2, figure 5I of Guo discloses the field plate (140) extends continuously on the first dielectric layer (121) and the second dielectric layer (147).
Regarding claim 3, figure 5I of Guo discloses a third dielectric layer on the first dielectric layer and the second dielectric layer, wherein the field plate is on the third dielectric layer (¶ 55, last sentence).
Regarding claim 4, figure 5I of Guo discloses an upper surface of the second portion of the first dielectric layer (121) is lower than an upper surface of the first portion of the first dielectric layer.
Conclusion
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/YU-HSI D SUN/Primary Examiner, Art Unit 2817
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