Prosecution Insights
Last updated: April 19, 2026
Application No. 18/675,643

CONFIGURING AND DEBUGGING A DIE-TO-DIE LINK USING A SIDEBAND LINK

Final Rejection §103
Filed
May 28, 2024
Examiner
WONG, TITUS
Art Unit
2181
Tech Center
2100 — Computer Architecture & Software
Assignee
Nvidia Corporation
OA Round
2 (Final)
78%
Grant Probability
Favorable
3-4
OA Rounds
3y 0m
To Grant
98%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allow Rate
455 granted / 587 resolved
+22.5% vs TC avg
Strong +21% interview lift
Without
With
+20.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
28 currently pending
Career history
615
Total Applications
across all art units

Statute-Specific Performance

§101
3.7%
-36.3% vs TC avg
§103
32.2%
-7.8% vs TC avg
§102
32.6%
-7.4% vs TC avg
§112
22.7%
-17.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 587 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Response to Amendment The amendment filed on September 29, 2025 has been received and entered. Applicant’s Amendments to the Claims have been received and acknowledged. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Das Sharma et al. (U.S. Publication No. 2022/0334995 A1), hereafter referred to as DasSharma’995 in view of Ware (U.S. Publication No. 2016/0328008 A1), hereafter referred to as Ware’008. Referring to claim 1, DasSharma’995, as claimed, a first device (two link partner devices to be couple using a UCIe link, see para. [0074]) comprising: first circuitry to communicate with a second device over a first die-to-die (D2D) link (mainband connection provide the main data path, see para. [0076]); second circuitry to communicate with the second device over a second D2D link (sideband connection, see para. [0076]); and a link controller comprises logic to: send first configuration data to the second device over the first D2D link (logic to implement arbitration and multiplexor functionality, error detection/correction codes, coordinating higher level link state machine and link bring up protocols, protocol options related to parameter exchanges with remote link partner, power management coordination with remote link partner, etc. (see paras. [0074] and [0075]); and responsive to determining that the first configuration data failed to configure the second device, send second configuration data to the second device over the second D2D link (sideband connection can be used for parameter exchanges, register accesses for debug/compliance, and coordination with remote partner for link training and management, see paras. [0076], [0104], and [0106]). However, DasSharma’995 does explicitly teach the configuration of each device comprising a respective link controller and sideband controller. Ware’008 discloses the configuration of each device comprising a respective link controller and sideband controller (integrated circuit devices 102B and 104B each comprising a data interface circuit 106B and optional control interface circuit 112B connected by links 108B and 114B, respectively, see Figs. 1A-D and paras. [0037]-[0046], [0050]-[0055]). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify DasSharma’995’s invention to comprise the configuration of each device comprising respective link controller and sideband controller, as taught by Ware’008, in order to support high performance data transfers while also facilitating low power consumption (see para. [0006]) and it has been held that a mere duplication of the essential working parts of a device involves only routine skill in the art. St. Regis Paper Co. v. Bemis Co., 193 USPQ8. As to claim 2, DasSharma’995 also discloses the first D2D link is configured to transmit data at a higher data transfer rate than the second D2D link (mainband connection has a faster data transfer rate than a sideband connection, see paras. [0076], [0087], and Figs. 12A-B). As to claim 3, DasSharma’995 also discloses the second D2D link comprises a pair of data wires and a pair of clock wires (a forwarded clock pin and a data pin in each direction, see paras. [0076] and [0079]). As to claim 4, DasSharma’995 also discloses the second configuration data comprises correction data to enable the second device to restore communication with the first device over the first D2D link (error correction bits/bytes (e.g. CRC), see paras. [0072], [0074], [0083], and [0090]). As to claim 5, DasSharma’995 also discloses a set of registers reserved for sending data via the second D2D link (sideband access of registers, see paras. [0087], [0088]-[0092], [0108], Tables 1-3). As to claim 6, DasSharma’995 also discloses the first configuration data is sent from a first set of registers of the first device to a second set of registers of the second device and the second configuration data is sent from a third set of registers of the first device to the second set of registers (link parameters configured/training, see paras. [0105]-[0107], Fig. 15A; also note: registers, see paras. [0087], [0088]-[0092], [0108], Tables 1-3). As to claim 7, DasSharma’995 also discloses the logic is further to: receive, via the second D2D link, control and status data from the second device (sideband access of registers, parameter exchanges, register accesses for debug/compliance, and coordination with remote partner for link training and management, see paras. [0076], [0084], [0087], [0104], and [0106]; also note: control and status registers, see paras. [0088], [0089], [0091], Fig. 15A). Note claims 8 and 15 recite similar limitations of claim 1. Therefore they are rejected based on the same reason accordingly. Note claims 9 and 16 recite the corresponding limitations of claim 2. Therefore they are rejected based on the same reason accordingly. Note claims 10 and 17 recite the corresponding limitations of claim 3. Therefore they are rejected based on the same reason accordingly. Note claims 11 and 18 recite the corresponding limitations of claim 4. Therefore they are rejected based on the same reason accordingly. Note claims 12 and 19 recite the corresponding limitations of claim 5. Therefore they are rejected based on the same reason accordingly. Note claims 13 and 20 recite the corresponding limitations of claim 6. Therefore they are rejected based on the same reason accordingly. Note claim 14 recites the corresponding limitations of claim 7. Therefore they are rejected based on the same reason accordingly. Response to Arguments Applicant's arguments filed 9/29/2025 have been fully considered but they are moot due to new grounds of rejection. In summary, DasSharma’995 and Ware’008 teach the claimed limitations as set forth. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. The examiner requests, in response to this office action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line number(s) in the specification and/or drawing figure(s). This will assist the examiner in prosecuting the application. When responding to this office action, applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present, in view of the state of art disclosed by the references cited or the objections made. He or she must also show how the amendments avoid such references or objections. See 37 C.F.R. 1.111(c). In amending in reply to a rejection of claims in an application or patent under reexamination, the applicant or patent owner must clearly point out the patentable novelty which he or she thinks the claims present in view the state of the art disclosed by the references cited or the objections made. The applicant or patent owner must also show how the amendments avoid such references or objections. Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to TITUS WONG whose telephone number is (571)270-1627. The examiner can normally be reached Monday-Friday, 10am-6pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Idriss Alrobaye can be reached on (571) 270-1023. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TITUS WONG/Primary Examiner, Art Unit 2181
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Prosecution Timeline

May 28, 2024
Application Filed
Jun 25, 2025
Non-Final Rejection — §103
Sep 18, 2025
Applicant Interview (Telephonic)
Sep 18, 2025
Examiner Interview Summary
Sep 29, 2025
Response Filed
Jan 10, 2026
Final Rejection — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
78%
Grant Probability
98%
With Interview (+20.6%)
3y 0m
Median Time to Grant
Moderate
PTA Risk
Based on 587 resolved cases by this examiner. Grant probability derived from career allow rate.

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