Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 2 is objected to because of the following informalities: Claim 2 recites the limitation “wherein the piezoelectric elements is [sic] configured…” The limitation has been construed to be “wherein the piezoelectric elements are configured…” Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2 and 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over Kobata (US 20210237224 A1) in view of Barkam (US 11731231 B2).
Regarding claim 1, Kobata discloses a system for manufacturing a semiconductor device, (see Abstract) the system comprising: a processor; (operation controller 10; see ¶[0078]-[0080])
a stage for supporting a first wafer, (see FIG. 29: carrier 45 supporting workpiece W; see also ¶[0206])
the stage being configured to sense [characteristic data], (carrier 45 is configured to measure the reaction forces imparted on workpiece W; see ¶[0138])
wherein the stage is electrically coupled to the processor and configured to transmit the sensed [characteristic data] to the processor; (carrier 45 is electrically coupled to operation controller 10 and configured to send the reaction forces to operation controller 10; see ¶[0139])
and a polishing device electrically coupled to the processor and configured to remove foreign objects from the first surface of the first wafer based on the sensed characteristic data (polishing head 7 is electrically coupled to operation controller 10 and is configured to remove foreign objects from the top surface of workpiece W based on the reaction forces; see ¶[0133]-[0134]).
Kobata does not disclose that the characteristic data is of the first surface of the first wafer.
However, Barkam (US11731231B2), in the same or similar field of endeavor related to wafer manufacturing systems incorporating piezoelectric sensors, teaches that a stage supporting a first wafer (polishing pad 102 for supporting wafer 112; see Barkam FIG. 1 and Col. 3, Lines 28-48) is configured to sense characteristic data of a first surface of the first wafer (polishing pad 102 is configured to sense surface topography of a first surface of the wafer 112; see Col. 4, Lines 7-29),
wherein the stage is electrically coupled to the processor (polishing pad 102 is coupled to processor 120; see FIG. 1 and Col. 3, Lines 49—Col. 4, Line 6) and configured to transmit the sensed characteristic data of the first surface of the first wafer to the processor; (polishing pad 102 is configured to send topography data of wafer 112 to processor 120; see Col. 3, Line 49—Col. 4, Line 6).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the stage of Kobata to sense characteristic data of a first surface of the first wafer, as taught by Barkam. One would have been motivated to make such a modification to “reduce the area and degree of over-polished and under-polished regions of the surface of wafer 112 during a CMP process” (Barkam Col. 9, Line 51-Col. 10, Line 18).
Regarding claim 2, the rejection of claim 1 is incorporated in this rejection. Kobata, as modified, further teaches that the stage includes piezoelectric elements disposed on a top surface of the stage and in contact with the first surface of the first wafer when the first wafer is placed on the stage (see Kobata FIG. 29: carrier 45 includes piezoelectric elements 47 disposed on a top surface of carrier 45 and in contact with the first surface of workpiece W when workpiece W is placed on carrier 45).
Kobata, as modified, does not teach that the piezoelectric elements are configured to sense the characteristic data of the first surface of the first wafer.
However, in another embodiment, Kobata teaches that the piezoelectric elements are configured to sense the characteristic data (see Kobata ¶[0141]: piezoelectric elements 47 may measure the reaction forces instead of measuring devices 57).
Additionally, Barkam further teaches that the piezoelectric elements are configured to sense the characteristic data of the first surface of the first wafer (piezoelectric actuators 202 are configured to sense the topography of the wafer 112; see also Col. 7, Line 66—Col. 8, Line 28).
Given that both Kobata and Barkam teach piezoelectric elements disposed on the top surface of the stage configured to sense data, It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the piezoelectric elements of Kobata with the piezoelectric elements of Barkam to sense the characteristic data of the first surface of the first wafer, to provide the predictable result of sensing the topographical variations of the wafer.
Regarding claim 7, the rejection of claim 1 is incorporated in this rejection. Kobata, as modified, further teaches that the foreign objects are introduced by an etching process, a deposition process, or a diffusion process that has performed on the first wafer (see Kobata ¶[0005]: extra film thickness is introduced by deposition processes performed on wafer W).
Regarding claim 8, the rejection of claim 1 is incorporated in this rejection. Kobata, as modified, further teaches that the polishing device is configured to perform a physical polishing process (polishing head 7 is configured to physically polish workpiece W; see Kobata ¶[0206]).
Claims 3-4 are rejected under 35 U.S.C. 103 as being unpatentable over Kobata (US 20210237224 A1) in view of Barkam (US 11731231 B2), further in view of GanapathiSubramanian (US 7307697 B2).
Regarding claim 3, the rejection of claim 2 is incorporated in this rejection. Kobata, as modified, does not teach that each of the piezoelectric elements has an area in a range of 1 mm2 to 100 mm2 in a top view.
However, GanapathiSubramanian, in the same or similar field of endeavor related to wafer manufacturing systems involving piezoelectric elements, teaches that each of the piezoelectric elements has an area in a range of 1 mm2 to 100 mm2 in a top view (each piezo pin 81 has a square cross-sectional area of 3 mm2; see Col. 4, Line 57—Col. 5, Line 25).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the piezoelectric elements of Kobata, as modified, to have an area in the range of 1 mm2 to 100 mm2 in a top view, as taught by GanapathiSubramanian. One would have been motivated to make such a modification to provide high precision and minimize error of the sensors (Col. 4, Line 57—Col. 5, Line 25).
Regarding claim 4, the rejection of claim 2 is incorporated in this rejection. Kobata, as modified, does not teach that the piezoelectric elements are configured to sense a deformation on the first wafer in a nanometer scale.
However, GanapathiSubramanian teaches that the piezoelectric elements are configured to sense a deformation on the first wafer in a nanometer scale (“sub-100 nanometer variations in substrate surface topology”; see Col. 5, Lines 56-65).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the piezoelectric elements of Kobata, as modified, to sense a deformation on the first wafer in a nanometer scale to provide smooth and continuous data across the surface of the wafer (Col. 5, Lines 56-65).
Claims 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over Kobata (US 20210237224 A1) in view of Barkam (US 11731231 B2), further in view of Yamanaka (CN110193774A).
Regarding claim 5, the rejection of claim 2 is incorporated in this rejection. Kobata teaches in another embodiment an exhaust vent recessed from the top surface of the stage and disposed between the piezoelectric elements (see ¶[0106] and Kobata FIG. 5: one end of vacuum line 60 recessed from the top surface of carrier 45 and disposed between piezoelectric elements 47), but Kobata, as modified, does not teach that the stage comprises a plurality of exhaust vents recessed from the top surface of the stage, and wherein the piezoelectric elements are disposed on the top surface of the stage between the plurality of exhaust vents.
However, Yamanaka, in the same or similar field of endeavor related to wafer manufacturing systems incorporating piezoelectric elements, teaches that a stage comprises a plurality of exhaust vents recessed from the top surface of the stage, (see Yamanaka FIG. 3 and Pg. 4, Lines 24-35: holding surface 111 comprises a plurality of suction holes 101)
and wherein piezoelectric elements are disposed on the top surface of the stage between the plurality of exhaust vents (piezoelectric elements 110 are disposed on the top surface of holding surface 111 between the plurality of suction holes 101).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the stage of Kobata, as modified, to comprise a plurality of exhaust vents recessed from the top surface with the piezoelectric elements disposed between the plurality of exhaust vents, as taught by Yamanaka. One would have been motivated to make such a modification so that “the height of the wafer W to be polished is adjusted in accordance with the thickness of each position, and the specific position of the wafer W adjusted to the higher position is more focused, and the entire wafer W is polished to a uniform thickness” (Yamanaka Trans. Pg. 5, Line 54—Pg. 6, Line 10).
Regarding claim 6, the rejection of claim 2 is incorporated in this rejection. Kobata teaches in another embodiment that an exhaust channel is recessed from the top surface of the stage and disposed between the piezoelectric elements (see ¶[0106] and Kobata FIG. 5: vacuum line 60 recessed from the top surface of carrier 45 and disposed between piezoelectric elements 47), but Kobata, as modified, does not teach that the stage comprises a plurality of exhaust channels recessed from the top surface of the stage, and wherein the piezoelectric elements are disposed on the top surface of the stage between adjacent exhaust channels.
However, Yamanaka teaches that the stage comprises a plurality of exhaust channels recessed from the top surface of the stage, (see Yamanaka FIG. 3 and Pg. 4, Lines 24-35: holding surface 111 comprises a plurality of suction holes 101)
and wherein the piezoelectric elements are disposed on the top surface of the stage between adjacent exhaust channels (piezoelectric elements 110 are disposed on the top surface of holding surface 111 between the plurality of suction holes 101).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the stage of Kobata, as modified, to comprise a plurality of exhaust channels recessed from the top surface with the piezoelectric elements disposed between the plurality of exhaust channels, as taught by Yamanaka. One would have been motivated to make such a modification so that “the height of the wafer W to be polished is adjusted in accordance with the thickness of each position, and the specific position of the wafer W adjusted to the higher position is more focused, and the entire wafer W is polished to a uniform thickness” (Yamanaka Trans. Pg. 5, Line 54—Pg. 6, Line 10).
Claims 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Kobata (US 20210237224 A1) in view of Barkam (US 11731231 B2), further in view of Yasuda (US20180236630A1).
Regarding claim 9, the rejection of claim 1 is incorporated in this rejection. the polishing device (polishing head 7) comprises: a polishing head (polishing head 7) and a controller coupled to the polishing head, (operation controller 10 is coupled to polishing head 7)
wherein the controller is configured to control the polishing head to apply a first pressure to a first location of the first wafer in response to the sensed characteristic data (see Kobata FIG. 4 and ¶[0213]-[0214]: operation controller 10 is configured to control the piezoelectric elements 47 on polishing head 7 to apply a first pressure to a first location of workpiece W in response to the sensed characteristic data).
Kobata teaches in an embodiment shown in FIG. 1 that the polishing head moves along the vertical Z-axis, but Kobata, as modified, does not teach that the polishing head is movable in three-dimension.
However, Yasuda, in the same or similar field of endeavor related to wafer polishing devices, teaches a polishing head movable in three-dimension (see Yasuda FIG. 1: holding arm 600, which holds the polishing head 500, is movable in the x, y, and z directions; see also ¶[0115]-[0116]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the polishing head of Kobata, as modified, to be movable in three-dimension, as taught by Yasuda. One would have been motivated to make such a modification to provide “the effect of homogenizing the shapes of the processed marks can be provided” (¶[0116]).
Regarding claim 10, the rejection of claim 9 is incorporated in this rejection. Kobata, as modified, further teaches that the polishing device further comprises a rotatable supporting element configured to hold the first wafer (see Kobata FIG. 29: polishing head 7 further comprises rotatable head shaft 18 configured to hold workpiece W).
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Kobata (US 20210237224 A1) in view of Barkam (US 11731231 B2), further in view of Shibue (US 20220219283 A1).
Regarding claim 11, the rejection of claim 1 is incorporated in this rejection. Kobata, as modified, does not explicitly teach that the polishing device is configured to flatten the first wafer before an exposure process to be conducted on the first wafer.
However, Shibue, in the same or similar field of endeavor related to systems for polishing wafers incorporating piezoelectric elements, teaches that the polishing device is configured to flatten the first wafer before an exposure process to be conducted on the first wafer (see Shibue ¶[0097]: polishing head 1 is configured to flatten wafer W before the polished wafer W is subjected to the next exposure process; see also FIG. 4C and ¶[0061]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the polishing device of Kobata, as modified, to be configured to flatten the first wafer before an exposure process is conducted on the first wafer, as taught by Shibue. Shibue teaches that having a plurality of sensors and piezoelectric elements in the polishing table “reduce the variation in film thickness in the circumferential direction as compared with the initial film thickness distribution” (see FIG. 4C and ¶[0059]-[0061]). Shibue further teaches that such “variations in the film thickness distribution may cause the focus to be out of focus in the next exposure process, resulting in a decrease in the yield of semiconductor manufacturing,” so flattening the wafer before the wafer is subjected to a subsequent exposure process would maximize the product yield (¶[0060]).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Poiesz (US 10310393 B2) teaches a substrate support incorporating piezoelectric elements.
Hariharan (US 20190240802 A1) teaches a method of polishing a substrate using piezoelectric sensors.
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/C.J./Examiner, Art Unit 3723
/DAVID S POSIGIAN/Supervisory Patent Examiner, Art Unit 3723
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