DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This non-final office action is in response to the application filed 29 May 2024.
Claims 1-20 are pending. Claims 1, 8, and 15 are independent claims.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 10 February 2025 and 29 August 2024 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Drawings
The examiner accepts the drawings filed on 29 May 2024.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 4, 5, 11, 12, 18, and 19 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Step 1:
According to Step 1 of the two Step analysis, claims 1-7 are directed toward processor (machine). Claims 8-14 are directed toward a system (machine). Claims 15-20 are directed toward a method (process). Therefore, each of these claims falls within one of the four statutory categories.
Claim 4:
Step 2A, Prong 1:
The claim recites:
identify a number of times one or more weight tensors are to be multiplied by one or more activation values in order to adjust the one or more architectures (mental process; As drafted and under its broadest reasonable interpretation, this limitation covers performance of the limitation in the mind (including an observation, evaluation, judgement, opinion) or with the aid of pencil and paper but for the recitation of generic computer components. For example, this limitation encompasses an observation of parameters of a training dataset to identify which parameters are to be multiplied in order to adjust one or mor architectures)
Step 2A, Prong 2:
The judicial exception is not integrated into a practical application.
The claim recites the additional elements:
a processor comprising: one or more circuits to adjust one or more architectures of one or more neural networks based, at least in part, on one or more computing resources to use the one or more neural networks (claim 1)
The additional elements are recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Accordingly, at Step 2A, prong two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B:
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception.
The judicial exception is not integrated into a practical application.
The claim recites the additional elements:
a processor comprising: one or more circuits to adjust one or more architectures of one or more neural networks based, at least in part, on one or more computing resources to use the one or more neural networks (claim 1)
The additional elements are recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
Claim 5:
Step 2A, Prong 1:
The claim recites:
identify a parameter corresponding to the processor that indicates an architecture of the portion (mental process; As drafted and under its broadest reasonable interpretation, this limitation covers performance of the limitation in the mind (including an observation, evaluation, judgement, opinion) or with the aid of pencil and paper but for the recitation of generic computer components. For example, this limitation encompasses an observation of parameters of a processor to identify an architecture of a portion of a neural network)
Step 2A, Prong 2:
The judicial exception is not integrated into a practical application.
The claim recites the additional elements:
a processor comprising: one or more circuits to adjust one or more architectures of one or more neural networks based, at least in part, on one or more computing resources to use the one or more neural networks (claim 1)
The additional elements are recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Accordingly, at Step 2A, prong two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B:
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception.
The judicial exception is not integrated into a practical application.
The claim recites the additional elements:
a processor comprising: one or more circuits to adjust one or more architectures of one or more neural networks based, at least in part, on one or more computing resources to use the one or more neural networks (claim 1)
The additional elements are recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
Claim 11:
With respect to claim 11, the claim recites the limitations substantially similar to those in claim 4. The analysis of claim 4 is incorporated herein by reference.
Claim 12:
With respect to claim 12, the claim recites the limitations substantially similar to those in claim 5. The analysis of claim 5 is incorporated herein by reference.
Claim 18:
Step 2A, Prong 1:
The claim recites:
identify a number of times one or more weight tensors are to be multiplied by one or more activation values in order to adjust the one or more architectures (mental process; As drafted and under its broadest reasonable interpretation, this limitation covers performance of the limitation in the mind (including an observation, evaluation, judgement, opinion) or with the aid of pencil and paper but for the recitation of generic computer components. For example, this limitation encompasses an observation of parameters of a training dataset to identify which parameters are to be multiplied in order to adjust one or mor architectures)
Step 2A, Prong 2:
The judicial exception is not integrated into a practical application.
The claim recites the additional elements:
adjusting one or more architectures of one or more neural networks based, at least in part, on one or more computing resources to use the one or more neural networks (claim 15)
The additional elements are recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Accordingly, at Step 2A, prong two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B:
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception.
The judicial exception is not integrated into a practical application.
The claim recites the additional elements:
adjusting one or more architectures of one or more neural networks based, at least in part, on one or more computing resources to use the one or more neural networks (claim 15)
The additional elements are recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
Claim 19:
Step 2A, Prong 1:
The claim recites:
identify a parameter corresponding to the processor that indicates an architecture of the portion (mental process; As drafted and under its broadest reasonable interpretation, this limitation covers performance of the limitation in the mind (including an observation, evaluation, judgement, opinion) or with the aid of pencil and paper but for the recitation of generic computer components. For example, this limitation encompasses an observation of parameters of a processor to identify an architecture of a portion of a neural network)
Step 2A, Prong 2:
The judicial exception is not integrated into a practical application.
The claim recites the additional elements:
adjusting one or more architectures of one or more neural networks based, at least in part, on one or more computing resources to use the one or more neural networks (claim 15)
The additional elements are recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Accordingly, at Step 2A, prong two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B:
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception.
The judicial exception is not integrated into a practical application.
The claim recites the additional elements:
adjusting one or more architectures of one or more neural networks based, at least in part, on one or more computing resources to use the one or more neural networks (claim 15)
The additional elements are recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-5, 7-10, 11-16, and 17-20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Huang (US 20230185761, published 15 June 2023, hereafter Huang).
As per independent claims 1, Huang discloses a processor comprising: one or more circuits to adjust one or more architectures of one or more neural networks based, at least in part, on one or more computing resources to use the one or more neural networks (paragraph 0065: Here, a reconfigurable computing chip that adjusts computation paths and/or data paths during the training and reasoning of the convolution layer of the neural network to perform the convolution process is disclosed).
As per dependent claims 2, Huang discloses the limitations similar to those in claim 1, and the same rejection is incorporated herein. Huang discloses wherein the one or more circuits are to adjust the one or more architecture based, at least in part, on one or more dynamic parameters corresponding to the one or more computing (paragraph 0065: Here, the reconfiguration of the computation and/or data paths is based at least in part on individual dimensions).
As per dependent claims 3, Huang discloses the limitations similar to those in claim 1, and the same rejection is incorporated herein. Huang discloses wherein the processor comprises the one or more computing resources (paragraph 0053: Here, the reconfigurable computing chip is comprised of a processing module including a plurality of processing cores).
As per dependent claims 4, Huang discloses the limitations similar to those in claim 1, and the same rejection is incorporated herein. Huang discloses wherein the one or more circuits are to identify a number of times one or more weight tensors are to be multiplied by one or more activation values in order to adjust the one or more architectures (paragraph 0007: Here, each of the plurality of processing elements of the reconfigurable computing chip performs a multiplication-plus-addition process on parts of the input feature map and convolution kernel to get a part of the output feature map).
As per dependent claims 5, Huang discloses the limitations similar to those in claim 1, and the same rejection is incorporated herein. Huang discloses wherein the one or more circuits are to, for each portion of one or more portions of the neural network, identify, a parameter corresponding to the processor that indicates an architecture of the portion (paragraph 0011: Here, the reconfigurable chip determines a mapping relationship from the convolution process to data paths and/or computation paths of the reconfigurable computing chip).
As per dependent claims 7, Huang discloses the limitations similar to those in claim 1, and the same rejection is incorporated herein. Huang discloses wherein at least one or more neural networks comprises a dynamic architecture (paragraph 0044: Here, the neural network contains a convolutional layer and the convolutional layer can vary in size based on the size of the convolution kernel).
As per independent claim 8, Huang discloses a system comprising: one or more processors to adjust one or more architectures of one or more neural networks based, at least in part, on one or more computing resources to use the one or more neural networks (paragraph 0065: Here, a reconfigurable computing chip that adjusts computation paths and/or data paths during the training and reasoning of the convolution layer of the neural network to perform the convolution process is disclosed).
With respect to claims 9-12 and 14, the claims recites the limitations substantially similar to those in claims 2-5 and 7, respectively. The analysis of claims 2-5and 7 are incorporated herein by reference.
As per independent claim 15, Huang discloses a method comprising: adjusting one or more architectures of one or more neural networks based, at least in part, on one or more computing resources to use the one or more neural networks (paragraph 0065: Here, a process in which computation/data paths are adjusted during the convolution layer of a neural network is disclosed).
With respect to claims 16-19, the claims recites the limitations substantially similar to those in claims 2-5, respectively. The analysis of claims 2-5 are incorporated herein by reference.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 6, 13, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Huang and further in view of Eberhart et al. (US 6,516,309, published 4 February 2003, hereafter Eberhart).
As per dependent claims 6, Huang discloses the limitations similar to those in claim 1, and the same rejection is incorporated herein.
Huang fails to specifically disclose wherein the one or more circuits are to adjust the one or more architectures based, at least in part, on one or more dynamic parameters each indicating how many times a corresponding portion of the neural network is to be performed
However, Eberhart, which is analogous to the claimed invention because it is directed toward evolving/improving a neural network, discloses wherein the one or more circuits are to adjust the one or more architectures based, at least in part, on one or more dynamic parameters each indicating how many times a corresponding portion of the neural network is to be performed (Sections 2, lines 50-67-Section 3, lines 1-10: Here, the process of evaluating and updating the attributes of a dynamic parameter until it meets the termination criteria is disclosed).
It would have been obvious to one of ordinary skill in the art at the time of the applicant’s effective filing date to have combined Eberhart’s teaching of terminating training once a condition is met with Huang’s teaching of a trainable neural network, with a reasonable expectation of success, because it would have allowed for training a neural network until a termination criteria is met (Eberhart: Section 2, line 50- Section 3, line 10).
With respect to claims 13 and 20, the applicant discloses the limitations substantially similar to those in claim 6. Claims 13 and 20 are rejected under similar rationale.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Mital et al. (US 2023/0120227): Discloses the use of an integrated circuit which has adapted artificial intelligence with the use of a neural network. Further, Mital discloses: “The integrated circuit contains a scheduler, one or more arithmetic logic units (ALUs), a communication bus, a mode controller and one or more random access memories…” The collection of these components can be referred to as computational resources as they make up parts of the processor being disclosed [Paragraph 0025].
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KYLE R STORK whose telephone number is (571)272-4130. The examiner can normally be reached 8am - 2pm; 4pm - 6pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Omar Fernandez Rivas can be reached at 571/272-2589. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KYLE R STORK/Primary Examiner, Art Unit 2128
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