Prosecution Insights
Last updated: July 17, 2026
Application No. 18/678,885

DUAL LATCH FLIP FLOP DEVICE

Final Rejection §102
Filed
May 30, 2024
Examiner
CHO, SUNG IL
Art Unit
2825
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
UNTETHER AI CORPORATION
OA Round
2 (Final)
91%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
541 granted / 592 resolved
+23.4% vs TC avg
Moderate +8% lift
Without
With
+8.3%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
31 currently pending
Career history
619
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
65.0%
+25.0% vs TC avg
§102
26.8%
-13.2% vs TC avg
§112
2.9%
-37.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 592 resolved cases

Office Action

§102
DETAILED ACTION The Applicant Arguments/Remarks filed January 23, 2026 has been entered. Claims 1-10 are pending. Claims 1, 4 and 8 are independent. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of AIA 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Morley (US 5,774,080). Regarding claims 1-10, the claimed limitation(s) of parallel latches (including D-type flip-flops) with alternating divide by 2 clocking is a well-known technology for a type of data system for its purpose. For support, of the above asserted facts, see for example, Morley, FIGS. 4-12 and accompanying disclosure, including data path logic array consists of address, ram, etc. described in background of the invention. Further, see other examples, Hargis et al. (US 2002/0172079), FIG. 5; JP-2009077058, FIG. 1 and accompanying disclosure, with combination of double clocking in FIG. 5 of Foley et al. (US 6,696,995). Response to Argument Applicant’s arguments filed 01/23/2026, with respect to the rejection(s) of claims under 35 USC 102, have been fully considered but are not persuasive. The claimed limitation(s) of parallel latches (including D-type flip-flops) with alternating divide by 2 clocking is a well-known technology for a type of data system for its purpose. The prior art cited in the aforementioned art rejection reads on all the element of the claimed limitations. The following concerns independent claim 1, a prior art of Morley teaches a device (see e.g., FIG. 4) comprising: a first latch (see EXMINER’S MARKUP below) configured to receive data (In) and a half-clock signal (CLOCK/2); a second latch in parallel with the first latch, the second latch (see EXAMINER’S MARKUP below) configured to receive the data (In) and an inverted half-clock signal (/Clock/2); and an output circuit (see EXMINER’S MARKUP below) connected to data outputs of the first and second latches, the output circuit to provide the data alternately from the first latch and the second latch according to the half-clock signal (see FIGS. 4-5 and accompanying disclosure). PNG media_image1.png 508 746 media_image1.png Greyscale Morley discloses all other claimed limitations. Further, see other references, Hargis et al. (US 2002/0172079), JP-2009077058, and Foley et al. (US 6,696,995). Therefore, it is respectfully submitted that the examiner maintains the rejection. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SUNG IL CHO whose telephone number is (571)270-0137. The examiner can normally be reached on M-Th, 7:30AM-5PM; Every other F, 7:30AM-4PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexander G Sofocleous can be reached on 571-272-0635. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SUNG IL CHO/ Primary Examiner, Art Unit 2825
Read full office action

Prosecution Timeline

May 30, 2024
Application Filed
Oct 23, 2025
Non-Final Rejection mailed — §102
Jan 23, 2026
Response Filed
Jun 08, 2026
Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
91%
Grant Probability
99%
With Interview (+8.3%)
2y 0m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 592 resolved cases by this examiner. Grant probability derived from career allowance rate.

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