Prosecution Insights
Last updated: July 17, 2026
Application No. 18/679,212

Diamond Wafer Based Electronic Component and Method of Manufacture

Non-Final OA §103§112
Filed
May 30, 2024
Priority
Dec 10, 2021 — provisional 63/288,066 +1 more
Examiner
DINKE, BITEW A
Art Unit
Tech Center
Assignee
Diamond Foundary Incorporated
OA Round
1 (Non-Final)
73%
Grant Probability
Favorable
1-2
OA Rounds
1m
Est. Remaining
85%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
561 granted / 771 resolved
+12.8% vs TC avg
Moderate +12% lift
Without
With
+11.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
43 currently pending
Career history
810
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
91.7%
+51.7% vs TC avg
§102
3.1%
-36.9% vs TC avg
§112
1.6%
-38.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 771 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 1, 12, and 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites the limitation “the metallic layer" in line 3. There is insufficient antecedent basis for this limitation in the claim because it is unclear whether “the metallic layer” relates back to “a metallic layout layer” in line 3. For purpose of compact prosecution, “the metallic layer” will be treated as if it were “the metallic layout layer.” Claim 1 recites the limitation “the substrate" in line 6. There is insufficient antecedent basis for this limitation in the claim because it is unclear whether “the substrate” relates back to “a metallic substrate” in line 2. For purpose of compact prosecution, “the substrate” will be treated as if it were “the metallic substrate.” Claim 12 recites the limitation “the metallic layer" in line 3. There is insufficient antecedent basis for this limitation in the claim because it is unclear whether “the metallic layer” relates back to “a metallic layout layer” in line 2-3. For purpose of compact prosecution, “the metallic layer” will be treated as if it were “the metallic layout layer.” Claim 20 recites the limitation “the substrate" in line 3. There is insufficient antecedent basis for this limitation in the claim because it is unclear whether “the substrate” relates back to “a metallic substrate” in line 2. For purpose of compact prosecution, “the substrate” will be treated as if it were “the metallic substrate.” Claim 20 recites the limitation “the metallic layer" in line 5. There is insufficient antecedent basis for this limitation in the claim because it is unclear whether “the metallic layer” relates back to “a metallic layout layer” in line 2-3. For purpose of compact prosecution, “the metallic layer” will be treated as if it were “the metallic layout layer.” Claim(s) 2-11, 13-15, and 17are rejected as it depending on rejected claim 1. Claim(s) 16 and 18-19 are rejected as it depending on rejected claim 12. Claim(s) 21-33 are rejected as it depending on rejected claim 20. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1-5, 7, 9, 12-13, 15-25, and 32-33 are rejected under 35 U.S.C. 103 as being unpatentable over Zimmer et al. (U.S. 2012/0231216 A1, hereinafter refer to Zimmer). Regarding Claim 1: Zimmer discloses a method for manufacturing an electronic component (see Zimmer, Fig.5 as shown below and ¶ [0102]- ¶ [0103]), comprising: PNG media_image1.png 332 561 media_image1.png Greyscale PNG media_image2.png 458 562 media_image2.png Greyscale PNG media_image3.png 483 521 media_image3.png Greyscale forming a stack having a metallic substrate (48), a single crystal diamond (SCD) wafer (49), and a metallic layout layer (50) (see Zimmer, Fig.5 as shown above and ¶ [0102]- ¶ [0103]), subjecting the stack to heat and pressure for a sufficient time to bond the metallic layout layer (50) to the SCD wafer (49) and the SCD wafer (49) to the substrate (48) (see Zimmer, Fig.5 as shown above and ¶ [0102]- ¶ [0103]). Zimmer is silent upon explicitly disclosing wherein the metallic layer is thinner than the metallic substrate. However, Zimmer teaches wherein the thickness of the metallic layer (50) is equal to the thickness of the metallic substrate (48) (note: Zimmer teaches “each adhesion layer is preferably relatively thin (less than 10%) compared to the thickness of each of the outer metal layers. The thickness of each outer metal layer is determined by the thickness of the adjacent diamond layer and the properties of the diamond and metal layers such as Young's modulus and the CTE difference between the metal and diamond layers. The thickness of the inner metal layer is equal or greater than the sum of the two outer metal layers multiplied by the ratio of the CTE between the inner and outer metal layers”) (see Zimmer, Fig.5 as shown above, ¶ [0039], and ¶ [0046]- ¶ [0049]). Hence, it would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal value for the thickness of the metallic layer with respect to the thickness of the metallic substrate through routine experimentation and optimization to obtain high thermal conductivity and a high reliability bond between the semiconductor device and the multilayered structure because the thickness of the metallic layer with respect to the thickness of the metallic substrate is a result-effective variable and there is no evidence indicating that it is critical or produces any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05 Regarding Claim 2: Zimmer as modified teaches a method for manufacturing an electronic component as set forth in claim 1 as above. Zimmer further teaches wherein the metallic substrate (48) is made of copper (see Zimmer, Fig.5 as shown above and ¶ [0102]- ¶ [0104]). Regarding Claim 3: Zimmer as modified teaches a method for manufacturing an electronic component as set forth in claim 1 as above. Zimmer further teaches wherein the metallic layout layer (50) is made of copper (see Zimmer, Fig.5 as shown above and ¶ [0102]- ¶ [0104]). Regarding Claim 4: Zimmer as modified teaches a method for manufacturing an electronic component as set forth in claim 1 as above. Zimmer further teaches wherein the metallic substrate (48) and the metallic layout layer (50) are both made of copper (see Zimmer, Fig.5 as shown above and ¶ [0102]- ¶ [0104]). Regarding Claim 5: Zimmer as modified teaches a method for manufacturing an electronic component as set forth in claim 1 as above. Zimmer further teaches wherein the stack includes a layer of metal sintering paste (coats/adhesion layer 12 such as NiCr or Cr) between the metallic substrate (11) and the SCD wafer (13) (see Zimmer, Fig.3 as shown above and ¶ [0100]). Regarding Claim 7: Zimmer as modified teaches a method for manufacturing an electronic component as set forth in claim 1 as above. Zimmer further teaches wherein the stack includes a layer of metal sintering paste (coats/adhesion layer 16 such as NiCr or Cr) between the SCD wafer (15) and the metallic layout layer (17) (see Zimmer, Fig.3 as shown above and ¶ [0100]). Regarding Claim 9: Zimmer as modified teaches a method for manufacturing an electronic component as set forth in claim 1 as above. Zimmer further teaches wherein the stack includes a first layer of metal sintering paste (coats/adhesion layer 4 such as NiCr or Cr) between the metallic substrate (5) and the SCD wafer (3) and a second layer of metal sintering paste (coats/adhesion layer 2 such as NiCr or Cr) between the SCD wafer (3) and the metallic layout layer (1) (see Zimmer, Fig.1 as shown above). Regarding Claim 12: Zimmer discloses an electronic component at an intermediate stage of manufacture (see Zimmer, Fig.5 as shown above and ¶ [0102]- ¶ [0103]), comprising: a stack having a metallic substrate (48), a single crystal diamond (SCD) wafer (49), and a metallic layout layer (50) (see Zimmer, Fig.5 as shown above and ¶ [0102]- ¶ [0103]). Zimmer is silent upon explicitly disclosing wherein the metallic layer is thinner than the metallic substrate. However, Zimmer teaches wherein the thickness of the metallic layer (50) is equal to the metallic substrate (48) (note: Zimmer teaches “each adhesion layer is preferably relatively thin (less than 10%) compared to the thickness of each of the outer metal layers. The thickness of each outer metal layer is determined by the thickness of the adjacent diamond layer and the properties of the diamond and metal layers such as Young's modulus and the CTE difference between the metal and diamond layers. The thickness of the inner metal layer is equal or greater than the sum of the two outer metal layers multiplied by the ratio of the CTE between the inner and outer metal layers”) (see Zimmer, Fig.5 as shown above, ¶ [0039], and ¶ [0046]- ¶ [0049]). Hence, it would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal value for the thickness of the metallic layer with respect to the thickness of the metallic substrate through routine experimentation and optimization to obtain high thermal conductivity and a high reliability bond between the semiconductor device and the multilayered structure because the thickness of the metallic layer with respect to the thickness of the metallic substrate is a result-effective variable and there is no evidence indicating that it is critical or produces any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05 Regarding Claim 13: Zimmer as modified teaches a method for manufacturing an electronic component as set forth in claim 9 as above. Zimmer further teaches wherein the substrate (48) is made of copper (see Zimmer, Fig.5 as shown above and ¶ [0102]- ¶ [0103]). Regarding Claim 15: Zimmer as modified teaches a method for manufacturing an electronic component as set forth in claim 9 as above. Zimmer further teaches wherein the metallic layout layer (50) is made of copper (see Zimmer, Fig.5 as shown above and ¶ [0102]- ¶ [0103]). Regarding Claim 16: Zimmer as modified teaches an electronic component as set forth in claim 12 as above. Zimmer is silent upon explicitly disclosing wherein the metallic layout layer is about 30 μm to about 300 μm thick. However, Zimmer teaches wherein the thickness of the metallic layout layer (50) (note: Zimmer teaches “each adhesion layer is preferably relatively thin (less than 10%) compared to the thickness of each of the outer metal layers. Thickness of the adhesion layer may be between 10-1000 nanometers, and preferably between 50-500 nanometers. The thickness of each outer metal layer is determined by the thickness of the adjacent diamond layer and the properties of the diamond and metal layers such as Young's modulus and the CTE difference between the metal and diamond layers. The thickness of the inner metal layer is equal or greater than the sum of the two outer metal layers multiplied by the ratio of the CTE between the inner and outer metal layers”) (see Zimmer, Fig.5 as shown above, ¶ [0039], and ¶ [0046]- ¶ [0049]). Hence, it would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal value for the thickness of the metallic layout layer through routine experimentation and optimization to obtain high thermal conductivity and a high reliability bond between the semiconductor device and the multilayered structure because the thickness of the metallic layout layer is a result-effective variable and there is no evidence indicating that it is critical or produces any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05 Regarding Claim 17: Zimmer as modified teaches a method for manufacturing an electronic component as set forth in claim 9 as above. Zimmer further teaches wherein the metallic substrate (49) and the metallic layout layer (50) are both made of copper (see Zimmer, Fig.5 as shown above and ¶ [0102]- ¶ [0103]). Regarding Claim 18: Zimmer as modified teaches an electronic component as set forth in claim 12 as above. Zimmer further teaches wherein the SCD wafer (49) is about 50 μm to 1000 μm thick (340 micron diamond layer requires a 120 micron copper layer for a silicon device. In another example, a 90 micron diamond layer requires a 160 micron copper layer for a GaAs device) (see Zimmer, Fig.5 as shown above and ¶ [0040]). Regarding Claim 19: Zimmer as modified teaches an electronic component as set forth in claim 18 as above. Zimmer is silent upon explicitly disclosing wherein the SCD wafer is about 18 mm long by about 18 mm wide. However, Zimmer teaches the thickness of 340 micron diamond layer requires a 120 micron copper layer for a silicon device. In another example, a 90 micron diamond layer requires a 160 micron copper layer for a GaAs device) (see Zimmer, Fig.5 as shown above and ¶ [0040]). Hence, it would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal value for the width of SCD wafer through routine experimentation and optimization to obtain high thermal conductivity and a high reliability bond between the semiconductor device and the multilayered structure because the width of SCD wafer is a result-effective variable and there is no evidence indicating that it is critical or produces any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05 Regarding Claim 20: Zimmer discloses an electronic component, comprising: a stack having a metallic substrate (5), a single crystal diamond (SCD) wafer (3), and a metallic layout layer (1), a first sintered metal layer (coats/adhesion layer 4 such as NiCr or Cr) forming a bond between the substrate (5) and the SCD wafer (3), and a second sintered metal layer (coats/adhesion layer 2 such as NiCr or Cr) forming a bond between the SCD wafer (3) and the metallic layer (1) (see Zimmer, Fig.1 as shown above and ¶ [0094]- ¶ [0095]). Note: patentability of a product does not depend on its method of production. Zimmer is silent upon explicitly disclosing wherein the metallic layout layer is thinner than the metallic substrate. However, Zimmer teaches wherein the thickness of the metallic layout layer (1) is equal to the metallic substrate (5) (note: Zimmer teaches “each adhesion layer is preferably relatively thin (less than 10%) compared to the thickness of each of the outer metal layers. The thickness of each outer metal layer is determined by the thickness of the adjacent diamond layer and the properties of the diamond and metal layers such as Young's modulus and the CTE difference between the metal and diamond layers. The thickness of the inner metal layer is equal or greater than the sum of the two outer metal layers multiplied by the ratio of the CTE between the inner and outer metal layers”) (see Zimmer, Fig.1 as shown above, ¶ [0039], and ¶ [0046]- ¶ [0049]). Hence, it would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal value for the thickness of the metallic layout layer with respect to the thickness of the metallic substrate through routine experimentation and optimization to obtain high thermal conductivity and a high reliability bond between the semiconductor device and the multilayered structure because the thickness of the metallic layout layer with respect to the thickness of the metallic substrate is a result-effective variable and there is no evidence indicating that it is critical or produces any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05 Regarding Claim 21: Zimmer as modified teaches an electronic component as set forth in claim 20 as above. Zimmer further teaches wherein the substrate (5) is made of copper (see Zimmer, Fig.1 as shown above and ¶ [0094]- ¶ [0095]). Regarding Claim 22: Zimmer as modified teaches an electronic component as set forth in claim 21 as above. Zimmer is silent upon explicitly disclosing wherein the metallic substrate is between about 0.5 mm and about 1 mm thick. However, Zimmer teaches wherein the thickness of the metallic substrate (5) (note: Zimmer teaches “340 micron diamond layer requires a 120 micron copper layer for a silicon device. In another example, a 90 micron diamond layer requires a 160 micron copper layer for a GaAs device; each adhesion layer is preferably relatively thin (less than 10%) compared to the thickness of each of the outer metal layers. Thickness of the adhesion layer may be between 10-1000 nanometers, and preferably between 50-500 nanometers. The thickness of each outer metal layer is determined by the thickness of the adjacent diamond layer and the properties of the diamond and metal layers such as Young's modulus and the CTE difference between the metal and diamond layers. The thickness of the inner metal layer is equal or greater than the sum of the two outer metal layers multiplied by the ratio of the CTE between the inner and outer metal layers”) (see Zimmer, Fig.5 as shown above, ¶ [0039]- ¶ [0040], and ¶ [0046]- ¶ [0049]). Hence, it would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal value for the thickness of the metallic substrate through routine experimentation and optimization to obtain high thermal conductivity and a high reliability bond between the semiconductor device and the multilayered structure because the thickness of the metallic substrate is a result-effective variable and there is no evidence indicating that it is critical or produces any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05 Regarding Claim 23: Zimmer as modified teaches an electronic component as set forth in claim 20 as above. Zimmer further teaches wherein the metallic layout layer (1) is made of copper (see Zimmer, Fig.1 as shown above and ¶ [0094]- ¶ [0095]). Regarding Claim 24: Zimmer as modified teaches an electronic component as set forth in claim 23 as above. Zimmer is silent upon explicitly disclosing wherein the metallic layout layer is about 30 μm to about 300 μm thick. However, Zimmer teaches wherein the thickness of the metallic layout layer (1) (note: Zimmer teaches “340 micron diamond layer requires a 120 micron copper layer for a silicon device. In another example, a 90 micron diamond layer requires a 160 micron copper layer for a GaAs device; each adhesion layer is preferably relatively thin (less than 10%) compared to the thickness of each of the outer metal layers. Thickness of the adhesion layer may be between 10-1000 nanometers, and preferably between 50-500 nanometers. The thickness of each outer metal layer is determined by the thickness of the adjacent diamond layer and the properties of the diamond and metal layers such as Young's modulus and the CTE difference between the metal and diamond layers. The thickness of the inner metal layer is equal or greater than the sum of the two outer metal layers multiplied by the ratio of the CTE between the inner and outer metal layers”) (see Zimmer, Fig.5 as shown above, ¶ [0039]- ¶ [0040], and ¶ [0046]- ¶ [0049]). Hence, it would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal value for the thickness of the metallic layout layer through routine experimentation and optimization to obtain high thermal conductivity and a high reliability bond between the semiconductor device and the multilayered structure because the thickness of the metallic layout layer is a result-effective variable and there is no evidence indicating that it is critical or produces any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05 Regarding Claim 25: Zimmer as modified teaches an electronic component as set forth in claim 20 as above. Zimmer further teaches wherein the metallic substrate (5) and the metallic layout layer (1) are both made of copper (see Zimmer, Fig.1 as shown above and ¶ [0094]- ¶ [0095]). Regarding Claim 32: Zimmer as modified teaches an electronic component as set forth in claim 20 as above. Zimmer further teaches wherein the SCD wafer (3) is about 50 μm to 1000 μm thick (340 micron diamond layer requires a 120 micron copper layer for a silicon device. In another example, a 90 micron diamond layer requires a 160 micron copper layer for a GaAs device) (see Zimmer, Fig.1 as shown above and ¶ [0040]). Regarding Claim 33: Zimmer as modified teaches an electronic component as set forth in claim 32 as above. Zimmer is silent upon explicitly disclosing wherein the SCD wafer is about 18 mm long by about 18 mm wide. However, Zimmer teaches the thickness of 340 micron diamond layer requires a 120 micron copper layer for a silicon device. In another example, a 90 micron diamond layer requires a 160 micron copper layer for a GaAs device) (see Zimmer, Fig.5 as shown above and ¶ [0040]). Hence, it would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal value for the width of SCD wafer through routine experimentation and optimization to obtain high thermal conductivity and a high reliability bond between the semiconductor device and the multilayered structure because the width of SCD wafer is a result-effective variable and there is no evidence indicating that it is critical or produces any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05 Claim(s) 6, 8, 10-11, 14, and 26-31 are rejected under 35 U.S.C. 103 as being unpatentable over Zimmer et al. (U.S. 2012/0231216 A1, hereinafter refer to Zimmer) as applied to claims 5, 7, 9, 20, and 21 above, and further in view of Park et al. (KR 2020-0023101 A, hereinafter refer to Park). Regarding Claim 6: Zimmer as modified teaches a method for manufacturing an electronic component as applied to claim 5 above. Zimmer is silent upon explicitly disclosing wherein the layer of metal sintering paste includes a silver paste. For support see Park, which teaches wherein the layer of metal sintering paste (130) includes a silver paste (see Park, Fig.1, abstract, and page.6). Zimmer teaches the claimed invention except for the material of metal sintering paste. Thus, it would have been obvious to one having ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of Zimmer and Park to enable the metal sintering paste to include a silver paste as taught by Park in order to improve high-temperature operation durability by increasing adhesion, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416. Regarding Claim 8: Zimmer as modified teaches a method for manufacturing an electronic component as applied to claim 7 above. Zimmer is silent upon explicitly disclosing wherein the layer of metal sintering paste includes a silver paste. For support see Park, which teaches wherein the layer of metal sintering paste (130) includes a silver paste (see Park, Fig.1, abstract, and page.6). Zimmer teaches the claimed invention except for the material of metal sintering paste. Thus, it would have been obvious to one having ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of Zimmer and Park to enable the metal sintering paste to include a silver paste as taught by Park in order to improve high-temperature operation durability by increasing adhesion, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416. Regarding Claim 10: Zimmer as modified teaches a method for manufacturing an electronic component as applied to claim 9 above. Zimmer is silent upon explicitly disclosing wherein the first and second layers of metal sintering paste both include silver sintering paste. For support see Park, which teaches wherein the layer of metal sintering paste (130) includes a silver paste (see Park, Fig.1, abstract, and page.6). Zimmer teaches the claimed invention except for the material of metal sintering paste. Thus, it would have been obvious to one having ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of Zimmer and Park to enable the Zimmer’s first and second layers of metal sintering paste both to include silver sintering paste as taught by Park in order to improve high-temperature operation durability by increasing adhesion, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416. Regarding Claim 11: Zimmer as modified teaches a method for manufacturing an electronic component as applied to claim 9 above. Zimmer further teaches wherein the metallic substrate (48) and the metallic layout layer (50) are both made of copper (see Zimmer, Fig.1 as shown above and ¶ [0094]- ¶ [0095]). Zimmer is silent upon explicitly disclosing wherein the first and second layers of metal sintering paste both include silver sintering paste. For support see Park, which teaches wherein the layer of metal sintering paste (130) includes a silver paste (see Park, Fig.1, abstract, and page.6). Zimmer teaches the claimed invention except for the material of metal sintering paste. Thus, it would have been obvious to one having ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of Zimmer and Park to enable the Zimmer’s first and second layers of metal sintering paste both to include silver sintering paste as taught by Park in order to improve high-temperature operation durability by increasing adhesion, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416. Regarding Claim 14: Zimmer as modified teaches a method for manufacturing an electronic component as set forth in claim 10 as above. The combination of Zimmer and Park is silent upon explicitly disclosing wherein the metallic substrate is between about 0.5 mm and about 1 mm thick. However, Zimmer teaches wherein the thickness of the metallic substrate (5) (note: Zimmer teaches “340 micron diamond layer requires a 120 micron copper layer for a silicon device. In another example, a 90 micron diamond layer requires a 160 micron copper layer for a GaAs device; each adhesion layer is preferably relatively thin (less than 10%) compared to the thickness of each of the outer metal layers. Thickness of the adhesion layer may be between 10-1000 nanometers, and preferably between 50-500 nanometers. The thickness of each outer metal layer is determined by the thickness of the adjacent diamond layer and the properties of the diamond and metal layers such as Young's modulus and the CTE difference between the metal and diamond layers. The thickness of the inner metal layer is equal or greater than the sum of the two outer metal layers multiplied by the ratio of the CTE between the inner and outer metal layers”) (see Zimmer, Fig.5 as shown above, ¶ [0039]- ¶ [0040], and ¶ [0046]- ¶ [0049]). Hence, it would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal value for the thickness of the metallic substrate through routine experimentation and optimization to obtain high thermal conductivity and a high reliability bond between the semiconductor device and the multilayered structure because the thickness of the metallic substrate is a result-effective variable and there is no evidence indicating that it is critical or produces any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05 Regarding Claim 26: Zimmer as modified teaches an electronic component as applied to claim 21 above. Zimmer is silent upon explicitly disclosing wherein the first sintered metal layer includes silver. For support see Park, which teaches wherein the first sintered metal layer (130) includes silver (see Park, Fig.1, abstract, and page.6). Zimmer teaches the claimed invention except for the material of metal sintering paste. Thus, it would have been obvious to one having ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of Zimmer and Park to enable the Zimmer’s first sintered metal layer to include silver sintering paste as taught by Park in order to improve high-temperature operation durability by increasing adhesion, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416. Regarding Claim 27: Zimmer as modified teaches an electronic component as set forth in claim 26 as above. The combination of Zimmer and Park further teaches wherein the first sintered metal layer (130) is about 6 μm to about 10 μm thick (see Park, Fig.1, abstract, and page.6). Regarding Claim 28: Zimmer as modified teaches an electronic component as applied to claim 20 above. Zimmer is silent upon explicitly disclosing wherein the second sintered metal layer includes silver. For support see Park, which teaches wherein the second sintered metal layer (130) includes silver (see Park, Fig.1, abstract, and page.6). Zimmer teaches the claimed invention except for the material of metal sintering paste. Thus, it would have been obvious to one having ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of Zimmer and Park to enable the Zimmer’s second sintered metal layer to include silver sintering paste as taught by Park in order to improve high-temperature operation durability by increasing adhesion, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416. Regarding Claim 29: Zimmer as modified teaches an electronic component as set forth in claim 28 as above. The combination of Zimmer and Park further teaches wherein the second sintered metal layer (130) is about 6 μm to about 10 μm thick (see Park, Fig.1, abstract, and page.6). Regarding Claim 30: Zimmer as modified teaches an electronic component as applied to claim 20 above. Zimmer is silent upon explicitly disclosing wherein the first and second sintered metal layers include silver. For support see Park, which teaches wherein the layer of metal sintering paste (130) includes a silver paste (see Park, Fig.1, abstract, and page.6). Zimmer teaches the claimed invention except for the material of metal sintering paste. Thus, it would have been obvious to one having ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of Zimmer and Park to enable the Zimmer’s first and second layers of metal sintering paste both to include silver sintering paste as taught by Park in order to improve high-temperature operation durability by increasing adhesion, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416. Regarding Claim 31: Zimmer as modified teaches an electronic component as applied to claim 20 above. Zimmer further teaches wherein the metallic substrate (5) and the metallic layer (1) are both made of copper ((see Zimmer, Fig.1 as shown above and ¶ [0094]- ¶ [0095]). Zimmer is silent upon explicitly disclosing wherein the first and second sintered metal layers both include silver. For support see Park, which teaches wherein the layer of metal sintering paste (130) includes a silver paste (see Park, Fig.1, abstract, and page.6). Zimmer teaches the claimed invention except for the material of metal sintering paste. Thus, it would have been obvious to one having ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of Zimmer and Park to enable the Zimmer’s first and second sintered metal layers both to include silver sintering paste as taught by Park in order to improve high-temperature operation durability by increasing adhesion, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to BITEW A DINKE whose telephone number is (571)272-0534. The examiner can normally be reached M-F 7 a.m. - 5 p.m.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at (571)272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BITEW A DINKE/Primary Examiner, Art Unit 2812
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Prosecution Timeline

May 30, 2024
Application Filed
Jul 02, 2026
Non-Final Rejection mailed — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
73%
Grant Probability
85%
With Interview (+11.9%)
2y 3m (~1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 771 resolved cases by this examiner. Grant probability derived from career allowance rate.

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