Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 6 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 6 is rejected specifically in view of the limitation an interlayer dielectric (ILD) in direct contact to exposed sidewalls of the plurality of nanosheets, a frontside surface of the source/drain, and a sidewall of the plurality of nanosheets. As noted in the claim, the limitation “sidewall of the plurality of nanosheets.” A person having ordinary skills in the art will find the claim to be indefinite because unclear if the repetition is in error –meaning that the second recitation of sidewall of the plurality of nanosheets is intended to be another layer of the device, or it is not intended to be recited, or if it is the same layer but not clearly defined.
For the purpose of examination of the present application, the claim cannot be effectively interpreted or understood for examination.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 and 3-4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Masuoka et al. [US PGPUB 20170345909] (hereinafter Masuoka).
Regarding claim 1, Masuoka teaches a semiconductor device comprising:
a substrate (101/102, Fig. 22C);
a plurality of nanosheets (103-105, Para 110, wherein the structure is a nano-scale, Para 3) located parallel to the substrate (Fig. 22C); and
a silicon backbone (116, Para 89) extending upwards from the substrate through the plurality of nanosheets (Fig. 22C), wherein the plurality of nanosheets extend laterally from lower sidewalls of the silicon backbone (Fig. 22C).
Regarding claim 3, Masuoka teaches a semiconductor device wherein the substrate, the plurality of nanosheets, and the silicon backbone are joined in a forksheet structure (Fig. 22C).
Regarding claim 4, Masuoka teaches a semiconductor device further comprising:
a plurality of dielectric fins (109-111, Para 114, Fig. 22C) on upper sidewalls of the silicon backbone (Fig. 22C).
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-5 and 7 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Mehta et al. [US Patent 12563810] (hereinafter Mehta).
Regarding claim 1, Mehta teaches a semiconductor device comprising:
a substrate (201, Col. 8, lines 20-21, Fig. 10A);
a plurality of nanosheets (4 lower structures 902 (2 to the left and 2 to the right), Col.11, lines 5-6, Fig. 10A) located parallel to the substrate (Fig. 10A); and
a silicon backbone (802, Col. 10, lines 44-45) extending upwards from the substrate through the plurality of nanosheets (Fig. 10A), wherein the plurality of nanosheets extend laterally from lower sidewalls of the silicon backbone (Fig. 10A).
Regarding claim 2, Mehta teaches a semiconductor device comprising wherein the substrate, the plurality of nanosheets, and the silicon backbone are comprised of silicon (201, Col. 8, lines 20-21, 201, Col. 10, lines 66-67/Col. 11, lines 1-2 –where sacrificial layers 202 are selectively removed to leave behind nanoribbons 902, and Col. 10, lines 44-45).
Regarding claim 3, Mehta teaches a semiconductor device comprising wherein the substrate, the plurality of nanosheets, and the silicon backbone are joined in a forksheet structure (Fig. 10A).
Regarding claim 4, Mehta teaches a semiconductor device comprising further comprising:
a plurality of dielectric fins (404, Col. 9, lines 42-43) on upper sidewalls of the silicon backbone (Fig. 10A).
Regarding claim 5, Mehta teaches a semiconductor device comprising further comprising:
a source/drain (802, Col. 10, lines 44-45 --wherein structure 802 is also the source/drain,) in direct contact with a frontside surface of the substrate (Fig. 10A).
Regarding claim 7, Mehta teaches a semiconductor device comprising further comprising:
a gate (1002/1004, Col. 11, lines 18-19) between the plurality of nanosheets (Fig. 10A) and in direct contact with a frontside surface and exposed sidewalls of the plurality of dielectric fins (Fig. 10A, frontside based on the opening in which material 1002/1004/1006 are formed compared to the side in contact with material 802/1008).
Allowable Subject Matter
Claims 8-20 are allowed.
The following is a statement of reasons for the indication of allowable subject matter:
Claims 1 and 3-4 are allowed because all prior arts of record and related prior arts not of record either singularly or in combination fail to anticipate or render obvious a semiconductor device comprising:
a first dielectric pillar extending downwards through the silicon backbone and a portion of the substrate. (as claimed in claims 8 and 15), in combination with the rest of claim limitations as claimed and defined by the Applicant.
Conclusion
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/ISMAIL A MUSE/Primary Examiner, Art Unit 2812
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