DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 05/31/2024 has been considered by the examiner.
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 10-13 are rejected under 35 U.S.C. 102(a)(1) as being anticpated by Halg (US 4,970,411).
Regarding claim 10, Halg teaches an integrated circuit (IC) in fig. 8 comprising:
a sensor cell (1) on a semiconductor substrate (14), the sensor cell (refer to sensor region 1) comprising: a magnetic field sensor (1) comprising a first sensor doped well (refer to N/N+ of sensor region 1) in the semiconductor substrate (14); and
a resistor (R1/Rf and R2/Ri) comprising a first resistor doped well (refer to N/N+ of region R1/Rf/R2/Ri) in the semiconductor substrate (14).
Regarding claim 11, Halg teaches all the limitations of claimed invention for the same reasons as set forth above. Besides, Halg teaches the first sensor doped well (refer to N/N+ of sensor region 1) and the first resistor doped well (refer to N/N+ of region R1/Rf/R2/Ri) have a same doping profile.
Regarding claim 12, Halg teaches all the limitations of claimed invention for the same reasons as set forth above. Besides, Halg teaches the first sensor doped well (refer to one of N/N+ regions of region 1) has a first lateral length (refer to lateral length of one of N/N+ regions of sensor region 1) and a first lateral width (refer to lateral width of one of N/N+ regions of sensor region 1), the first sensor doped well (refer to one of N/N+ regions of sensor region 1) extending to a first depth (refer to a depth of one of N/N+ of sensor region 1) in the semiconductor substrate (14); the first resistor doped well (refer to one of N/N+ regions of R1/Rf and R2/Ri) has a second lateral length (refer to length of one of N/N+ regions of R1/Rf and R2/Ri) and a second lateral width (refer to width of one of N/N+ regions of R1/Rf and R2/Ri), the first resistor doped well (refer to one of N/N+ regions of region 1) extending to a second depth (refer to the depth of one of N/N+ regions of sensor region 1) in the semiconductor substrate (14); the first lateral length and the second lateral length being parallel and equal to each other (see fig. 8: note the length of one of N/N+ regions of sensor region 1 is parallel to the length of one of N/N+ regions of R1,Rf, R2,Ri); the first lateral width and the second lateral width being equal to each other (NOTE: fig. 8 shows the width of one of N/N+ regions of sensor region 1 is about the same the width of one of N/N+ regions of R1,Rf, R2,Ri); and the first depth and the second depth being equal to each other (see fig. 8).
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Regarding claim 13, Halg teaches all the limitations of claimed invention for the same reasons as set forth above. Besides, Halg teaches the sensor cell includes a deep trench isolation (16), the deep trench isolation being along a periphery of the sensor cell (see fig. 8).
Allowable Subject Matter
Claim 14 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art of record and considered pertinent to the applicant’s disclosure does not teach or suggest “the magnetic field sensor comprises a second sensor doped well in the semiconductor substrate; the first sensor doped well, the second sensor doped well, and the first resistor doped well are longitudinally parallel to each other; and a spacing between the first sensor doped well and the second sensor doped well is equal to a spacing between the first sensor doped well and the first resistor doped well.”
Claim 15 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art of record and considered pertinent to the applicant’s disclosure does not teach or suggest “the sensor cell comprises a dummy doped well in the semiconductor substrate, the dummy doped well being electrically isolated from the first sensor doped well and the first resistor doped well.”
Claim 16 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art of record and considered pertinent to the applicant’s disclosure does not teach or suggest “the magnetic field sensor comprises a second sensor doped well in the semiconductor substrate; the resistor comprises a second resistor doped well in the semiconductor substrate; the first sensor doped well, the second sensor doped well, the first resistor doped well, and the second resistor doped well being longitudinally parallel to each other; and the first sensor doped well and the second sensor doped well being laterally between the first resistor doped well and the second resistor doped well.”
Claim 17 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art of record and considered pertinent to the applicant’s disclosure does not teach or suggest “the magnetic field sensor comprises a second sensor doped well in the semiconductor substrate; the resistor comprises a second resistor doped well in the semiconductor substrate; the first sensor doped well and the first resistor doped well being longitudinally parallel to each other; the second sensor doped well and the second resistor doped well being longitudinally parallel to each other; the first sensor doped well and the second sensor doped well being longitudinally aligned; and the first resistor doped well and the second resistor doped well being longitudinally aligned.”
Claim 18 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art of record and considered pertinent to the applicant’s disclosure does not teach or suggest “ the magnetic field sensor comprises a second sensor doped well, a third sensor doped well, and a fourth sensor doped well in the semiconductor substrate; the resistor comprises a second resistor doped well in the semiconductor substrate; the first sensor doped well, the second sensor doped well, the third sensor doped well, the fourth sensor doped well, the first resistor doped well, and the second resistor doped well are longitudinally parallel to each other; the first sensor doped well and the third sensor doped well being longitudinally aligned; and the second sensor doped well and the fourth sensor doped well being longitudinally aligned.”
Claims 1-9 and 19-20 are allowed.
The following is an examiner’s statement of reasons for allowance:
Regarding claim 1, the prior art of record alone or in combination neither teaches nor makes obvious the invention of an integrated circuit (IC) comprising “a magnetic field sensor comprising a first doped well and a second doped well, the first doped well and the second doped well being in a semiconductor substrate, a first spacing being between the first doped well and the second doped well;.., a second spacing being between the first doped well and the third doped well, the second spacing being equal to the first spacing” in combination of all of the limitations of claim 1. Claims 2-9 include all of the limitations of claim 1.
Regarding claim 19, the prior art of record alone or in combination neither teaches nor makes obvious the invention of a method of manufacturing an integrated circuit (IC), the method comprising: “…, a first spacing being between the first doped well and the second doped well, a second spacing being between the first doped well and the third doped well, the second spacing being equal to the first spacing; electrically connecting the first doped well and the second doped well in a magnetic field sensor in the IC;…” in combination of all of the limitations of claim 19. Claim 20 include all of the limitations of claim 19.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Niki Tram Nguyen whose telephone number is (571) 272-5526. The examiner can normally be reached on 6:00am-4:00pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Steven Loke can be reached on (703)872-9306. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/NIKI H NGUYEN/ Primary Examiner, Art Unit 2818
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