Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Detailed Action
Claim Rejections – 35 U.S.C. 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AlA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claims 1-3, 7-9 and 20 rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee (U.S. Patent Pub. No. 2024/0128195).
Regarding Claim 1
FIG. 1B of Lee discloses a package comprising: a first substrate (110); an integrated device (120) coupled to the first substrate; a second substrate (251) coupled to the first substrate through at least a plurality of solder interconnects (145), wherein the second substrate is located over a portion of the integrated device; and a heat sink (281) coupled to a back side of the integrated device through a thermal interface material (282), wherein the heat sink is located over another portion of the integrated device, wherein the heat sink is located laterally to the second substrate.
Regarding Claim 2
FIG. 1B of Lee discloses an encapsulation layer (160) located between the first substrate and the second substrate.
Regarding Claim 3
FIG. 1B of Lee discloses the encapsulation layer (160) is further located between the first substrate and the heat sink.
Regarding Claim 7
FIG. 1B of Lee discloses the second substrate is coupled to the first substrate through a plurality of ball interconnects and/or the plurality of solder interconnects (145).
Regarding Claim 8
FIG. 1B of Lee discloses an underfill (146) located between the integrated device and the first substrate.
Regarding Claim 9
FIG. 1B of Lee discloses the underfill includes a different material or a different composition from an encapsulation layer located between the first substrate and the second substrate [0027, 0031].
Regarding Claim 20
FIG. 1B of Lee discloses the integrated device (130) is coupled to the first substrate (110) through a plurality of pillar interconnects (125) and/or a first plurality of solder [0031] interconnects (145).
Claim Rejections – 35 U.S.C. 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 4 rejected under 35 U.S.C. 103 as being unpatentable over Lee, in view of Vakanas (U.S. Patent Pub. No. 2020/0043894).
Regarding Claim 4
Lee discloses Claim 1.
Lee is silent with respect to “the second substrate is coupled to the back side of the integrated device through the thermal interface material”.
FIG. 1 of Vakanas discloses a similar package, wherein the second substrate (159) is coupled to the back side of the integrated device (167) through the thermal interface material (141).
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Lee, as taught by Vakanas. The ordinary artisan would have been motivated to modify Lee in the above manner for purpose of improving thermal dissipation ([0002] of Vakanas).
Claims 5 and 14-17 rejected under 35 U.S.C. 103 as being unpatentable over Lee, in view of Shin (U.S. Patent Pub. No. 2022/0045010).
Regarding Claim 5
Lee discloses Claim 1.
Lee is silent with respect to “the second substrate is coupled to the back side of the integrated device through another thermal interface material”.
FIG. 2 of Shin discloses a similar package, wherein the second substrate (S2) is coupled to the back side of the integrated device (CH1) through another [0046] thermal interface material (550).
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Lee, as taught by Shin. The ordinary artisan would have been motivated to modify Lee in the above manner for purpose of improving performance ([0004] of Shin).
Regarding Claim 14
FIG. 2 of Shin discloses another package coupled to the second substrate (S2), wherein the another package comprises: a package substrate; and a second integrated device (CH2) coupled to the package substrate.
Regarding Claim 15
FIG. 2 of Shin discloses the second integrated device is configured to be electrically coupled to the package substrate through a plurality of wire bonds.
Regarding Claim 16
FIG. 2 of Shin discloses the another package further comprises a package encapsulation layer (MD2).
Regarding Claim 17
FIG. 2 of Shin discloses the another package is located laterally to the heat sink (HS2).
Claims 6, 11-13, 18 and 19 rejected under 35 U.S.C. 103 as being unpatentable over Lee, in view of Fu (U.S. Patent Pub. No. 2019/0273044).
Regarding Claim 6
Lee discloses Claim 1.
Lee is silent with respect to “the second substrate is coupled to the back side of the integrated device through an adhesive”.
FIG. 5 of Fu discloses a similar package, wherein the second substrate (31) is coupled to the back side of the integrated device through an adhesive (38) [0148].
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Lee, as taught by Fu. The ordinary artisan would have been motivated to modify Lee in the above manner for purpose of fastening the target chip ([0147] of Fu).
Regarding Claim 11
FIG. 5 of Fu discloses the second substrate is an interposer [0183].
Regarding Claim 12
FIG. 5 of Fu discloses the interposer comprises: an interposer dielectric layer (32); and a plurality of interposer interconnects.
Regarding Claim 13
FIG. 5 of Fu discloses the interposer dielectric layer includes silicon, glass or an organic dielectric layer [0183].
Regarding Claim 18
FIG. 12 of Fu discloses a second integrated device (80) coupled to the second substrate (31) through a second plurality of solder interconnects (42).
Regarding Claim 19
FIG. 12 of Fu discloses another package coupled to the second substrate (31) through a second plurality of solder interconnects (42).
Claim 10 rejected under 35 U.S.C. 103 as being unpatentable over Lee, in view of Negoro (U.S. Patent Pub. No. 2011/0049702).
Regarding Claim 10
Lee discloses Claim 1.
Lee is silent with respect to “the heat sink includes a metal slug”.
FIG. 1 of Negoro discloses a similar package, wherein the heat sink includes a metal slug [0005].
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Lee, as taught by Negoro. The ordinary artisan would have been motivated to modify Lee in the above manner for purpose of releasing heat ([0005] of Negoro).
Pertinent Art
Mun (U.S. Patent Pub. No. 2024/0120280) and Huang (U.S. Patent Pub. No. 2019/0355687).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHENG-BAI ZHU whose telephone number is (571)270-3904. The examiner can normally be reached on 11am – 7pm EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chad Dicke can be reached on (571)270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SHENG-BAI ZHU/Primary Examiner, Art Unit 2897
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