DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-7 are pending in this office action and presented for examination. Claims 1-7 are newly amended, and claims 8-9 are newly cancelled, by the response received September 17, 2025.
In the marked-up specification, page 12, sixth-to-last line, a hyphen appears to be deleted using a strikethrough. Examiner requests that similar amendments in the future use double brackets rather than strikethrough for clarity.
Specification
The disclosure is objected to because of the following informalities. Appropriate correction is required.
The amended abstract discloses “to improve prediction accuracy”; however, the abstract should not refer to purported merits of the invention.
In the marked-up specification, page 4, line 2, “An Pseudo” should be “A Pseudo”.
In the marked-up specification, page 5, line 15, discloses “and not a second prediction result is provided”; it is unclear as to whether the limitation is conveying a) a second prediction result is not provided, or b) some entity is provided, but that entity is not a second prediction result.
In the marked-up specification, page 6, lines 6-7, discloses “taking PHR[47:0] as an index of the THT1, performing a hash calculation on a second branch address of a corresponding branch instruction …” However, Page 12, lines 14-15, discloses “taking PHR[47:0] as an index of the THT1, performing a hash calculation on the branch address (BA) of the corresponding branch instruction …” As both disclosures appear to be directed to the subject matter of claim 7, and the disclosure from pages 3-6 otherwise generally appears to be analogous to the disclosure from pages 8-13, it is unclear as to whether one of the aforementioned citations should be amended to track the other of the aforementioned citations.
In the marked-up specification, page 8, lines 19-20, discloses “in a case where the L1BTPT is not hit (that is, in a case where the L1BTPT is not hit), proceeding to step S4”. However, it is unclear as to whether the explanatory phrase inside the parentheses is intended to be the same as the language prior to the parentheses.
In the marked-up specification, page 8, last line, a word followed by a period is not capitalized.
In the marked-up specification, page 8, last line, “the first and second corresponding branch instructions in Steps S3-S4” is disclosed; however, the previous disclosure regarding steps S3 and S4 do not mention first and second corresponding branch instructions.
In the marked-up specification, page 9, second line, an ending quotation mark should directly follow “instruction” rather than precede “of”.
In the marked-up specification, page 9, line 9, “accesed” should be “accessed”.
In the marked-up specification, page 9, line 17, “An Pseudo” should be “A Pseudo”.
The marked-up specification, page 9, line 17, discloses “An Pseudo Least Recently Used (PLRU) replacement policy (also called pseudo LRU policies)”; however, it is unclear as to how a policy (singular) is equivalent to policies (plural).
In the marked-up specification, page 11, lines 22-23, discloses “and not a second prediction result is provided”; it is unclear as to whether the limitation is conveying a) a second prediction result is not provided, or b) some entity is provided, but that entity is not a second prediction result.
The amendment filed September 17, 2025, is objected to under 35 U.S.C. 132(a) because it introduces new matter into the disclosure. 35 U.S.C. 132(a) states that no amendment shall introduce new matter into the disclosure of the invention. Examples of added material which is not supported by the original disclosure follow; however, Examiner notes that many other changes nevertheless still change the scope of the specification in various ways. Examiner recommends amending the specification to revert all changes except the changes made to address the previously presented objections to the specification and drawings. Examiner recommends not propagating amendments made to the claims to the specification to preclude potential new matter issues.
In the marked-up specification, page 2, line 17, is newly amended to disclose (in two instances) “Instruction Pipeline (IP)”; however, the original disclosure does not appear to provide support for “IP” particularly meaning “Instruction Pipeline”.
In the marked-up specification, page 6, lines 22-23, is newly amended to disclose “Instruction Pipeline (IP)”; however, the original disclosure does not appear to provide support for “IP” particularly meaning “Instruction Pipeline”.
In the marked-up specification, page 13, line 13, is newly amended to disclose “Instruction Pipeline (IP)”; however, the original disclosure does not appear to provide support for “IP” particularly meaning “Instruction Pipeline”.
In the marked-up specification, page 3, line 9, is newly amended with “includes” language in the context of Step S1. However, this added material is not supported by the original disclosure. Also see the associated written description rejection below.
In the marked-up specification, page 3, line 16, is newly amended with “includes” language in the context of Step S3. However, this added material is not supported by the original disclosure. Also see the associated written description rejection below.
In the marked-up specification, page 3, line 22, is newly amended with “includes” language in the context of Step S4. However, this added material is not supported by the original disclosure. Also see the associated written description rejection below.
In the marked-up specification, page 3, lines 25-26, newly discloses “wherein the corresponding branch instruction in Steps S3-S4 refers to the any branch instruction accessing the L1BTPT in Step S2”. However, this added material is not supported by the original disclosure. Also see the associated written description rejection below.
In the marked-up specification, page 8, line 30, to page 9, line 1, newly discloses “wherein the first and second corresponding branch instructions in Steps S3-S4 refer to the any branch instruction accessing the L1BTPT in Step S2”. However, this added material is not supported by the original disclosure. Also see the associated written description rejection below.
In the marked-up specification, page 3, lines 28-30, newly discloses “configuring an index in the L1BTPT to match an address of the any branch instruction with the L1BTPT according to the index in the L1BTPT”. However, this added material is not supported by the original disclosure. Also see the associated written description rejection below.
In the marked-up specification, page 9, lines 12-14, newly discloses “An index is configured in the L1BTPT, to match an address of the any branch instruction with the L1BTPT according to the index in the L1BTPT”. However, this added material is not supported by the original disclosure. Also see the associated written description rejection below.
Drawings
The drawings are objected to because:
All drawings must be made by a process which will give them satisfactory reproduction characteristics. Every line, number, and letter must be durable, clean, black (except for color drawings), sufficiently dense and dark, and uniformly thick and well-defined. The weight of all lines and letters must be heavy enough to permit adequate reproduction. This requirement applies to all lines however fine, to shading, and to lines representing cut surfaces in sectional views. However, the drawings in the file wrapper do not meet this requirement.
Numbers, letters, and reference characters must measure at least .32 cm. (1/8 inch) in height.
MPEP 608.02, section V, states that “[l]ead lines are required for each reference character except for those which indicate the surface or cross section on which they are placed. Such a reference character must be underlined to make it clear that a lead line has not been left out by mistake." However, in amended FIG. 2, each of reference characters S1, S2, S3, and S4 are both underlined and associated with a lead line.
In amended FIG. 2, step S3, line 2, a space appears to be present between the “L” and the “T” in “FILTERED”.
In amended FIG. 2, step S4, line 1, a space appears to be missing following a comma.
Numbers, letters, and reference characters should not cross or mingle with the lines. However, in amended Figure 5, two arrows originating from the “BRANCH ADDRESS (BA)” block respectively mingle with an “H” and a parenthesis in the “PATH HISTORY REGISTER (PHR)” block.
In amended FIG. 5, “THT (S)” should be “THT(S)”.
The amendment filed September 17, 2025, is objected to under 35 U.S.C. 132(a) because it introduces new matter into the disclosure. 35 U.S.C. 132(a) states that no amendment shall introduce new matter into the disclosure of the invention. The added material which is not supported by the original disclosure is as follows. Applicant is required to cancel the new matter in the reply to this Office Action.
In amended FIG. 3, two sets of ellipses have been deleted between Entry 0 and Entry 15, thereby newly introducing an embodiment that does not entail Entries 1-14.
In amended FIG. 5, “THT0” and “THT1” have been respectively amended to “TH0” and “TH1”, thereby newly introducing an embodiment in which the labels TH0 and TH1 (rather than “THT0” and “THT1”) may characterize the associated blocks.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claims 2-4 are objected to because of the following informalities. Appropriate correction is required.
In claim 2, line 7, recites the limitation “an Pseudo Least Recently Used (PLRU) replacement policy” should be “a Pseudo Least Recently Used (PLRU) replacement policy” for grammatical clarity.
Claims 3-4 are objected to for failing to alleviate the objection of claim 2 above.
In claim 3, lines 6-7, “high bits of the address of the any branch instruction is judged” should be “high bits of the address of the any branch instruction are judged” for grammatical clarity.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-7 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 1 recites the limitation “Step S1 including: configuring a level 1 branch target prediction table (L1BTPT) and a level 2 branch target prediction table (L2BTPT)” in lines 3-5. However, the original disclosure does not appear to provide support for this limitation. For example, the original disclosure (e.g., page 7) does not appear to provide support for Step S1 including both the aforementioned configuring sub-step as well as another sub-step, which is a scenario encompassed by the claim language in view of the recited open-ended “including” language.
Claim 1 recites the limitation “Step S3 including: judging whether a currently predicted branch instruction is filtered out by the L1BTPT; in a case where the currently predicted branch instruction is filtered out by the L1BTPT, proceeding to step S4; in a case where the currently predicted branch instruction is not filtered out by the L1BTPT, taking a first prediction result provided by the L1BTPT as a first predicted address of a first corresponding branch instruction” in lines 10-15. However, the original disclosure does not appear to provide support for this limitation. For example, the original disclosure (e.g., page 7) does not appear to provide support for Step S3 including not only the recited sub-steps but also another sub-step, which is a scenario encompassed by the claim language in view of the recited open-ended “including” language.
Claim 1 recites the limitation “Step S4 including: accessing the L2BTPT, and taking a second prediction result provided by the L2BTPT as a second predicted address of a second corresponding branch instruction” in lines 16-18. However, the original disclosure does not appear to provide support for this limitation. For example, the original disclosure (e.g., page 7) does not appear to provide support for Step S4 including not only the recited accessing and taking but also another sub-step, which is a scenario encompassed by the claim language in view of the recited open-ended “including” language.
Claim 1 recites the limitation “Step S3 including: judging whether a currently predicted branch instruction is filtered out by the L1 BTPT; in a case where the currently predicted branch instruction is filtered out by the L1 BTPT, proceeding to step S4; in a case where the currently predicted branch instruction is not filtered out by the L1 BTPT, taking a first prediction result provided by the L1 BTPT as a first predicted address of a first corresponding branch instruction; and Step S4 including: accessing the L2BTPT, and taking a second prediction result provided by the L2BTPT as a second predicted address of a second corresponding branch instruction; wherein the first and second corresponding branch instructions in Steps S3-S4 refer to the any branch instruction accessing the L1 BTPT in Step S2” in lines 10-18. However, the original disclosure (e.g., FIG. 2; pages 3-4; and page 7) does not appear to provide support for providing different prediction results for different branch instructions (i.e., a first corresponding branch instruction and a second corresponding branch instruction), or branch instructions referring to other branch instructions.
Claims 2-7 are rejected for failing to alleviate the rejections of claim 1 above.
Claim 7 recites the limitation “a first branch address of a second corresponding branch instruction” in line 6. Claim 7 further recites the limitation “a second branch address of a second corresponding branch instruction” in line 15. However, the original disclosure does not appear to provide support for these limitations. For example, the original disclosure (e.g., page 10) does not appear to provide support for a same second corresponding branch instruction having two different branch addresses.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-7 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation “Step S3 including: judging whether a currently predicted branch instruction is filtered out by the L1 BTPT; in a case where the currently predicted branch instruction is filtered out by the L1 BTPT, proceeding to step S4; in a case where the currently predicted branch instruction is not filtered out by the L1 BTPT, taking a first prediction result provided by the L1 BTPT as a first predicted address of a first corresponding branch instruction” in lines 10-15. However, it is unclear as to whether “taking a first prediction result provided by the L1 BTPT as a first predicted address of a first corresponding branch instruction” is part of Step S3. For example, while the aforementioned “taking” limitation appears in the paragraph that begins “Step S3 including”, FIG. 2 appears to show the analogous subject matter as being separate from Step S3.
Claim 1 recites the limitation “a first corresponding branch instruction” in line 15. However, it is indefinite as to whether this first corresponding branch instruction is the same as, or different from “a currently predicted branch instruction” of claim 1, line 10. Similarly, it is indefinite as to whether this first corresponding branch instruction is the same as, or different from “any branch instruction” of claim 1, line 6. To any extent to which different language may imply “a first corresponding branch instruction” is different from other recited branch instructions, it is unclear as to how the claimed invention, which appears to be directed to prediction of an instance of a branch instruction, involves the various different instances of branch instructions as recited. Note that this limitation is also recited in claim 3, lines 10-11, and claim 3, line 12. Note that the limitation “the first … corresponding branch instruction[]” is recited in claim 1, line 19.
Claim 1 recites the limitation “a second corresponding branch instruction” in line 18. However, it is indefinite as to whether this second corresponding branch instruction is the same as, or different from “a currently predicted branch instruction” of claim 1, line 10. Similarly, it is indefinite as to whether this corresponding branch instruction is the same as, or different from “any branch instruction” of claim 1, line 6. Similarly, it is indefinite as to whether this second corresponding branch instruction is the same as, or different from “a first corresponding branch instruction” of claim 1, line 15. To any extent to which different language may imply “a second corresponding branch instruction” is different from other recited branch instructions, it is unclear as to how the claimed invention, which appears to be directed to prediction of an instance of a branch instruction, involves the various different instances of branch instructions as recited. Note that this limitation is also recited in claim 7, line 6, and claim 7, line 15. Note that the limitation “the … second corresponding branch instruction[]” is recited in claim 1, line 19.
Claim 1 recites the limitation “Step S3 including: judging whether a currently predicted branch instruction is filtered out by the L1 BTPT; in a case where the currently predicted branch instruction is filtered out by the L1 BTPT, proceeding to step S4; in a case where the currently predicted branch instruction is not filtered out by the L1 BTPT, taking a first prediction result provided by the L1 BTPT as a first predicted address of a first corresponding branch instruction; and Step S4 including: accessing the L2BTPT, and taking a second prediction result provided by the L2BTPT as a second predicted address of a second corresponding branch instruction” in lines 10-18. However, it is indefinite, in the context of the instant invention, as to how the branch prediction of an instance of a particular branch instruction (corresponding to “any branch instruction” in claim 1, line 6) can entail providing different prediction results for different branch instructions (i.e., a first corresponding branch instruction and a second corresponding branch instruction).
Claim 1 recites the limitation “wherein the first and second corresponding branch instructions in Steps S3-S4 refer to the any branch instruction accessing the L1 BTPT in Step S2” in lines 19-20. However, the metes and bounds of this limitation are indefinite. For example, it is indefinite as to whether the first and second corresponding branch instructions in Steps S3-S4 each point to the any branch instruction accessing the L1 BTPT (in which case it is unclear in the context of the instant invention as to what it means for a branch instruction to point to a branch instruction, in a contextual manner that does not entail a branch instruction branching to a branch instruction); whether the first and second corresponding branch instructions in Steps S3-S4 are the any branch instruction accessing the L1 BTPT in Step S2 (in which case it is unclear as to how a plurality of branch instructions are a single branch instruction, and unclear as to why three different limitations are being used to describe a same entity); or whether another interpretation is intended.
Claims 2-7 are rejected for failing to alleviate the rejections of claim 1 above.
Claim 2 recites the limitation “configuring an index in the L1BTPT to match an address of the any branch instruction with the L1BTPT according to the index in the L1BTPT” in lines 3-5. However, the metes and bounds of this limitation are indefinite. For example, it is indefinite as to what it means to “configure” an index in the L1BTPT in the context of the instant invention. For example, if indexes are used to access particular entries in a table, it is unclear as to what it means for such indexes to be “configured”. It is further indefinite as to how such configuring results in the recited matching. It is further indefinite as to what it means to match an address with “the L1BTPT” (rather than, for example, another address), and how such matching is “according to the index in the L1BTPT”.
Claim 2 recites the limitation “The multi-level hybrid algorithm filter branch prediction method of claim 1, wherein step S2 further comprises: … providing credibility predictions in the L1BTPT for prediction difficulty filtering” in lines 1-6. Claim 1, upon which claim 2 is dependent, recites the limitation “Step S2 including: accessing the L1 BTPT by any branch instruction, and judging whether the L1 BTPT is hit by the any branch instruction; in a case where the L1 BTPT is hit, proceeding to step S3; and in a case where the L1 BTPT is not hit, proceeding to step S4; Step S3 including: judging whether a currently predicted branch instruction is filtered out by the L1BTPT; in a case where the currently predicted branch instruction is filtered out by the L1 BTPT, proceeding to step S4; in a case where the currently predicted branch instruction is not filtered out by the L1BTPT, taking a first prediction result provided by the L1 BTPT as a first predicted address of a first corresponding branch instruction” in lines 6-15. However, the metes and bounds of the limitation of claim 2 are indefinite. For example, it is indefinite as to whether multiple credibility predictions are provided for an access of the L1BTPT by a branch instruction. For example, it is indefinite as to whether the limitations merely necessitate that credibility predictions are present in the L1BTPT during step S2, or whether the limitations necessitate that the credibility predictions are actively being provided elsewhere during step S2. For example, it is indefinite as to whether the credibility predictions are still provided even if step S2 entails a miss in the L1BTPT.
Claim 2 recites the limitation “The multi-level hybrid algorithm filter branch prediction method of claim 1, wherein step S2 further comprises: … adopting an Pseudo Least Recently Used (PLRU) replacement policy in the L1BTPT to retain history records of recently executed branch instructions” in lines 1-8. Claim 1, upon which claim 2 is dependent, recites the limitation “Step S2 including: accessing the L1 BTPT by any branch instruction, and judging whether the L1 BTPT is hit by the any branch instruction; in a case where the L1 BTPT is hit, proceeding to step S3; and in a case where the L1 BTPT is not hit, proceeding to step S4; Step S3 including: judging whether a currently predicted branch instruction is filtered out by the L1BTPT; in a case where the currently predicted branch instruction is filtered out by the L1 BTPT, proceeding to step S4; in a case where the currently predicted branch instruction is not filtered out by the L1BTPT, taking a first prediction result provided by the L1 BTPT as a first predicted address of a first corresponding branch instruction” in lines 6-15. However, the metes and bounds of the limitation of claim 2 are indefinite. For example, it is indefinite as to whether the limitation of claim 2 requires the aforementioned adoption to occur, in particular in step S2 (such that, for example, prior to step S2, there is no PLRU replacement policy). For example, it is indefinite as to whether the limitation necessitates that step S2 entails actively performing some form of sub-step associated with a PLRU replacement policy.
Claims 3-4 are rejected for failing to alleviate the rejections of claim 2 above.
Claim 3 recites the limitation “the FullTag is a part configured for address matching, and high bits of the address of the any branch instruction is judged whether matched with the FullTag according to the index in the L1BTPT” in lines 5-8. However, the metes and bounds of this limitation are indefinite. For example, it is unclear as to what is being grammatically conveyed by the “judged whether matched” language. For example, it is unclear as to how a match between high bits of the address of the any branch instruction and the FullTag can be “according to the index in the L1BTPT”.
Claim 3 recites the limitation “an initial value of the Conf is a two-digit binary expression 10, if the prediction is wrong, then the Conf becomes Conf-1, and if the prediction is correct, then the Conf becomes Conf+1” in lines 13-15. However, it is indefinite as to whether the claim is implicitly conveying that the “Conf-1” and “Conf+1” results are, in particular, results in the scenario where Conf is the initial value of 10; or whether, regardless of the value of Conf, if the prediction is wrong, then the Conf becomes Conf-1, and if the prediction is correct, then the Conf becomes Conf+1.
Claim 3 recites the limitation “each PLRU replacement policy” in line 18. However, this limitation has insufficient antecedent basis in the claims, as parent claim 2, line 7, for example, only recites “an Pseudo Least Recently Used (PLRU) replacement policy”, but not multiple PLRU replacement policies.
Claim 3 recites the limitation “the PLRU replacement policy” in lines 18-19. However, it is indefinite as to whether this limitation has antecedent basis back to “an Pseudo Least Recently Used (PLRU) replacement policy” in claim 2, line 7, or “each PLRU replacement policy” in claim 3, line 18. Note that this limitation is also recited in claim 4, line 2.
Claim 3 recites the limitation “such as: Entry0-Entry15” in line 20. However, the phrase "such as" renders the claim indefinite because it is unclear whether the limitations following the phrase are part of the claimed invention. See MPEP § 2173.05(d).
Claim 3 recites the limitation “the PLRU is a part that identifies each PLRU replacement policy, and the PLRU replacement policy is a four-digit binary expression configured to identify a replacement order of the 16 entries such as: Entry0-Entry15” in lines 18-20. However, the metes and bounds of this limitation are indefinite. For example, it is unclear what “each” PLRU replacement policy is, that the PLRU of an entry identifies. For example, it is unclear as to whether each PLRU in each entry is the same value as each other. For example, it is unclear as to whether a PLRU in a particular entry identifies the replacement order of all 16 entries. For example, it is unclear as to whether there are multiple different PLRU replacement policies.
Claim 3 recites the limitation “the PLRU replacement policy is a four-digit binary expression” in lines 18-19. However, it is indefinite as to how a “policy” can be a four-digit binary expression. Additionally, note that claim 4 recites “the PLRU replacement policy is: when a new L1BTPT entry needs to be established, a Least Recently Used (LRU) entry is first replaced, and an age order of the 16 entries such as: Entry0-Entry15 is identified by a four-digit binary expression PLRU[3:0]…” in lines 2-5. It is indefinite as to how a four-digit binary expression can be “when a new L1BTPT entry needs to be established, a Least Recently Used (LRU) entry is first replaced, and an age order of the 16 entries such as: Entry0-Entry15 is identified by a four-digit binary expression PLRU[3:0]…”. In addition, it is indefinite as to how a PLRU replacement policy can both be a four-digit binary expression itself (as per claim 3) and use a four-digit binary expression as a part of implementation of the policy in the manner conveyed in claim 4.
Claim 4 is rejected for failing to alleviate the rejections of claim 3 above.
Claim 4 recites the limitation “wherein the PLRU replacement policy is: when a new L1BTPT entry needs to be established, a Least Recently Used (LRU) entry is first replaced, and an age order of the 16 entries such as: Entry0-Entry15 is identified by a four-digit binary expression PLRU[3:0], wherein: PLRU[0] is adopted to identify a piece of information of a node L1, if PLRU[0]==1, then an entry identifying the LRU entry is in Entry{0,1,2,3,4,5,6,7}; PLRU[1] is adopted to identify a piece of information of a node L2, if PLRU[1]==1, then the entry identifying the LRU entry is in Entry{0,1,2,3,8,9,10,11}; PLRU[2] is adopted to identify a piece of information of a node L3, if PLRU[2]==1, then the entry identifying the LRU entry is in Entry{0,1,4,5,8,9,12,13}; and PLRU[3] is adopted to identify a piece of information of a node L4, if PLRU[3]==1, then the entry identifying the LRU entry is in Entry{0,2,4,6,8,10,12,14}” in lines 2-13. However, the metes and bounds of this limitation are indefinite. For example, it is unclear as to whether a PLRU replacement policy or an LRU replacement policy is being recited, in view of the references both to PLRU and LRU. For example, it is indefinite as to whether LRU and PLRU is intended to be synonymous in some manner. For example, it is indefinite as to whether each of the recited adoptions is intended to correspond to a distinct replacement policy, in view of the recitation “the PLRU is a part that identifies each PLRU replacement policy” in claim 3, line 18. For example, it is unclear as to whether the nodes L1-L4 are physical elements. For example, it is unclear as to the metes and bounds of Entry{0,1,2,3,4,5,6,7}, Entry{0,1,2,3,8,9,10,11}, Entry{0,1,4,5,8,9,12,13}, and Entry{0,2,4,6,8,10,12,14}; for example, it is unclear as to whether the entries within the curly braces all identify the LRU entry.
Claim 4 recites the limitation “such as: Entry0-Entry15” in line 4. However, the phrase "such as" renders the claim indefinite because it is unclear whether the limitations following the phrase are part of the claimed invention. See MPEP § 2173.05(d).
Claim 5 recites the limitation “the THT0 and the THT1 correspond to the PHR respectively” in lines 4-5. However, the metes and bounds of this limitation are indefinite. For example, while respectively can be defined as “(of two or more things, with reference to two or more things previously mentioned) referring or applying to in a parallel or sequential way”, the recited PHR does not appear to be two things.
Claim 5 recites the limitation “a data structure of the L2BTPT comprises: a Path History Register (PHR); at least two Tag History Tables (THT) … and the L2BTPT uses …” in lines 2-8. However, it is indefinite as to how a data structure itself comprises a step (“the L2BTPT uses…”).
Claim 5 recites the limitation “the L2BTPT uses the data structure with the PHR, the THT0, and the THT1” in lines 8-9. However, it is indefinite as to whether this limitation is intended to be parsed such that “the data structure with the PHR, the THT0, and the THT1” is to be interpreted as a unit and intended to have antecedent basis to “a data structure of the L2BTPT comprises: a Path History Register (PHR); at least two Tag History Tables (THT), including a THT0 and a THT1” in claim 5, lines 2-5, or whether the limitation is intended to be parsed such that “the data structure” is used with the PHR, the THT0, and the THT1.
Claim 5 recites the limitation “and not a second prediction result is provided” in lines 12-13. However, it is unclear as to whether the limitation is conveying a) a second prediction result is not provided, or b) some entity is provided, but that entity is not a second prediction result.
Claims 6-7 are rejected for failing to alleviate the rejections of claim 5 above.
Claim 7 recites the limitation “a second corresponding branch instruction” in line 6. However, it is indefinite as to whether this second corresponding branch instruction is the same as, or different from “a second corresponding branch instruction” as recited in claim 1, line 18.
Claim 7 recites the limitation “a second corresponding branch instruction” in line 15. However, it is indefinite as to whether this second corresponding branch instruction is the same as, or different from “a second corresponding branch instruction” as recited in claim 1, line 18. In addition, it is indefinite as to whether this second corresponding branch instruction is the same as, or different from “a second corresponding branch instruction” as recited in claim 7, line 6.
Claim 7 recites the limitation “a first branch address of a second corresponding branch instruction” in line 6. Claim 7 further recites the limitation “a second branch address of a second corresponding branch instruction” in line 15. However, it is indefinite as to how a same second corresponding branch instruction can have two different branch addresses.
Response to Arguments
Applicant on page 9 argues: “The specification is objected to because of certain informalities as indicated in the the Office action. A substitute specification is submitted herein to address the informalities, and withdrawal of the objection to the specification is requested.”
In view of the amendments to the specification, the previously presented objections to the specification are withdrawn. However, the amendments to the specification catalyze additional objectionable issues, including many instances of new matter — see the specification section above.
Applicant on page 9 argues: “The Abstract stands objected to for formal reasons. In response, a revised Abstract is submitted herein to remove the grounds for objection raised in the Office action. Accordingly, withdrawal of the objection to the Abstract is requested.”
In view of the amendments to the abstract, the previously presented objection to the specification is withdrawn. However, the amendments to the abstract introduces an additional objectionable issue — see the specification section above.
Applicant on page 9 argues: “The claim objections made by the Examiner have been reviewed and addressed herein by the amendments to the claims. Accordingly, it is respectfully requested that the claim objections be withdrawn.”
In view of the amendments to the claims, the previously presented objections to the claims are withdrawn. However, the amendments to the claims introduce additional objectionable issues — see the specification section above.
Applicant on page 11 argues: ‘Claim 2 is amended herein. "configuring the index to match an address of a branch instruction" means configuring the index as a memory pointer that maps to high-order bits of the branch instruction address, wherein the index is compared with the FullTag field of each entry in the L1BTPT to determine a hit. Paragraph [0074]) can be referred.
The L1BTPT locates a corresponding entry via the index without full-content search.’
However, to the extent to which Applicant is arguing that the index is a memory pointer, it is unclear as to how such is the case given that claim 2, for example, discloses the index is in the L1BTPT. Examiner notes that paragraph [0074] does not appear to provide support for “configuring the index as a memory pointer that maps to high-order bits of the branch instruction address, wherein the index is compared with the FullTag field of each entry in the L1BTPT to determine a hit”. Examiner submits that high-order bits of the branch instruction address are not themselves an address. Examiner further submits that one of ordinary skill in the art at the time of the invention would not understand the metes and bounds of "configuring the index to match an address of a branch instruction" to be the entirety of “configuring the index as a memory pointer that maps to high-order bits of the branch instruction address, wherein the index is compared with the FullTag field of each entry in the L1BTPT to determine a hit”.
Applicant on page 11 argues: “Credibility predictions are present only in the L1BTPT during step S2”.
However, it is unclear as to how a credibility prediction can be present only during step S2, but not, for example, step S1 or S3, in the context of branch prediction and the disclosed Conf field. It is unclear as to how paragraph [0080], as reproduced, supports such behavior.
Applicant on page 12 argues: ‘Step S2 does not "adopt" the policy for the first time, but only updates the PLRU tag to reflect the latest branch execution history.’
However, claim 2 appears to recite that step S2 further comprises adopting a PLRU replacement policy.
Applicant on page 12 argues: “When step S2 updates the PLRU tag (e.g., adjusting PLRU[3:0] values based on entry access), it is the same single policy applied repeatedly to different entries—not multiple distinct policies.”
However, claim 3, line 18, recites “each PLRU replacement policy”, which appears to imply multiple policies. In addition, page 7 of the original disclosure discloses “various replacement policies”, and page 8 of the original disclosure discloses “Pseudo Least Recently Used (PLRU) replacement policies (also called pseudo LRU policies) are adopted”.
Applicant on page 14 argues: ‘Clarifying PLRU vs. LRU: The term "Least Recently Used (LRU) entry" in claim 4 refers to the entry that is, in effect, the entry that has not been accessed for the longest time. PLRU is a pseudo-LRU policy that implements LRU logic (not a separate "LRU policy"). "the PLRU replacement policy... first replaces the Least Recently Used (LRU) entry"—this confirms PLRU is a technical means to achieve LRU replacement (avoiding the high hardware complexity of full LRU tracking).’
However, Examiner first notes that it is unclear as to what the qualifier “in effect” is intended to convey in the first sentence above. It is further unclear as to how a pseudo-LRU policy can implement LRU logic (as opposed to pseudo-LRU logic), and similar unclear as to how PLRU can achieve LRU replacement (as opposed to pseudo-LRU replacement).
Applicant across pages 14-15 argues: ‘2. a Single Policy (not multiple distinct policies): PLRU[0]-PLRU[3] are four bits of the same PLRU expression (not separate "adoptions of distinct policies"). Each bit (PLRU[0]-PLRU [3]) corresponds to a logical node (L1-L4) for stepwise locating the LRU entry— this is a single, unified PLRU policy, not multiple policies. For example, PLRU[0] narrows down the LRU to 8 entries, PLRU[1] further
narrows it, and identity which entry to replace. The four-bit state vector PLRU[3:0] works together as a cohesive unit to manage the replacement order of all 16 entries. (Spec. Para. [0076]).’
However, claim 3, line 18, recites “each PLRU replacement policy”, which appears to imply multiple policies. In addition, page 7 of the original disclosure discloses “various replacement policies”, and page 8 of the original disclosure discloses “Pseudo Least Recently Used (PLRU) replacement policies (also called pseudo LRU policies) are adopted”. Examiner further submits that one reason that the metes and bounds of claim 4 are indefinite is that it is unclear as to what it means for a information to be “of a node” if such a node is merely a logical node and not a physical entity. For example, it is unclear as to how it could be determined whether a piece of information is or isn’t “of a node” if a node is effectively an aid for conceptualization.
Applicant on page 15 argues: ‘3. Nodes L1-L4 are logical Components (not physical
Components) The nodes L1-L4 refer to logical decision nodes within the binary tree structure that the PLRU algorithm mimics. (not physical hardware elements) As explained in paragraph [0077], these nodes L1-L4 are part of the PLRU algorithm’s decision tree for efficiently locating the LRU entry (e.g., node L1 splits the 16 entries into two 8-entry subsets): there are no physical components labeled "L1-L4" in the L1BTPT. The specification, at paragraph [0078], supports this by describing the "tree structure” of the algorithm.’
However, as noted above, Examiner submits that one reason that the metes and bounds of claim 4 are indefinite is that it is unclear as to what it means for information to be “of a node” if such a node is merely a logical node and not a physical entity. For example, it is unclear as to how it could be determined whether a piece of information is or isn’t “of a node” if a node is effectively an aid for conceptualization. Examiner submits that one of ordinary skill in the art would not necessarily understand the metes and bounds of claim 4 to entail the subject matter described by Applicant.
Applicant on page 15 argues: ‘4. Meaning of the Entry Sets {...}: the curly braces "{}" denote subsets that contain the LRU entry (not that all entries in the subset are LRU
entries). The entry sets within the curly braces (e.g., Entry{0,1,2,3,4,5,6, 7}) define
the search scope at each logical node of the binary tree. They do not all identify the LRU
simultaneously. Instead, the algorithm uses the binary value of each PLRU bit to iteratively narrow the search from the full set of 16 entries down to a single entry designated for replacement.’
However, Examiner notes that the claims do not incorporate the aforementioned subject matter. Examiner submits that one of ordinary skill in the art would not necessarily understand the metes and bounds of claim 4 to entail the aforementioned subject matter.
Applicant across pages 16-17 argues: ‘A step (“selecting a final prediction result”) refers to a dynamic operation performed by the L2BTPT using the data structure—not a component of the data structure itself. The amendment clarifies this distinction by: First listing only static components (PHR, THT0, THT1) under "data structure"; Then explicitly stating that "the L2BTPT uses the data structure to perform the selecting step"— this establishes a clear "tool (data structure) vs. action (step)" relationship, eliminating the Examiner's confusion about "a data structure comprising a step." The amendment aligns with the original disclosure (paras. [0085]- [0090]), which repeatedly distinguishes the L2BTPT’s data structure from its operational steps: Para. [0085] defines the L2BTPT’s data structure as "including a PHR and two THTs'"; Para. [0088] describes the "selecting step" as "the L2BTPT using the PHR and THTs to determine the final prediction result.’
However, Examiner submits that the lack of “and” language at the end of line 3 of claim 5 (to precede the last recited element of the data structure) contributes to the claim appearing to convey that the data structure comprises a step.
Applicant on page 17 argues: ‘The “branch address” has same meaning. However, one is compared with THT0, the other is compared with THT1.’
However, Examiner submits that the claims do not make it sufficiently clear that “a first branch address” and a “a second branch address” are a same branch address despite the different “first” and “second” labels and lack of antecedent basis language.
Applicant on page 18 argues: “Accordingly, Applicant respectfully requests that the §112(b) rejections against the claims be withdrawn.”
Various previously pending rejections of the claims under 35 U.S.C. §112(b) are withdrawn in view of the amendments to the claims. However, other previously presented rejections under 35 U.S.C. §112(b) remain applicable, and in various cases the amendments to the claims introduce additional indefinite subject matter and written description issues; see the Claim Rejections - 35 USC § 112 section above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/KEITH E VICARY/Primary Examiner, Art Unit 2182