Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species II, Figure 19 in the reply filed on 06/01/2026 is acknowledged. Claims 1-4, 6, 12-16, as well as newly added claims 22-26 read on the elected species.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-4, 6, 12-14, 16, 23 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Park et al. (US 20190181300 A1; hereinafter “Park”).
In re claim 1, Park discloses in figs. 24-26, a semiconductor light emitting device comprising:
a light emitting part (127, 124, 126) (hereinafter “LED”) (¶195-198);
a first electrode including a bonding layer (160, 165, 142) (hereinafter “BondL”) (¶241, 255-256) below the light emitting part;
a barrier 127b around the bonding layer (BondL) (a patterned portion of the semiconductor layer 127b forms a barrier around the bonding layer);
a second electrode 246 (¶240-241) on the light emitting part LED (a second electrode 150 is on the bottom side of the light emitting part);
a passivation layer (passivation layer comprising insulating layers 180, 131) (¶246-249) to surround the light emitting part LED and the second electrode 246; and
a third semiconductor layer 127b below a first conductivity type semiconductor layer 127a (¶198),
wherein a material of the barrier 127b comprises a part of the third semiconductor layer 127b.
In re claim 2, Park discloses in figs. 24-26, the semiconductor light emitting device according to claim 1,
wherein the light emitting part comprises a first area A1 and a second area S2 to surround the first area (see the annotated fig. 24 below),
wherein the bonding layer (BondL) is disposed below the first area A1, and wherein the barrier 127b is disposed below the second area A2.
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In re claim 3, Park discloses in figs. 24-26, the semiconductor light emitting device according to claim 1, wherein the light emitting part LED comprises a plurality of semiconductor layers 127a, 127b, 124 (¶194, 197-198), and wherein the barrier 127b is one semiconductor layer among the plurality of semiconductor layers.
In re claim 4, Park discloses in figs. 24-26, the semiconductor light emitting device according to claim 1,
wherein the light emitting part comprises the first conductivity type semiconductor layer 127a, an active layer 126 on the first conductivity type semiconductor layer, and a second conductivity type semiconductor layer 124 on the active layer (¶194-198), and
wherein the barrier 127b is disposed along an edge area of the active layer 126.
In re claim 6, Park discloses in figs. 24-26, the semiconductor light emitting device according to claim 1,
wherein the third semiconductor layer 127b comprises a groove (a groove formed in the surface 127G; hereinafter “G”) corresponding to a first region and is disposed to correspond to a second region in the first conductivity type semiconductor layer 127a, and
wherein the bonding layer is disposed in the groove.
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In re claim 12, Park discloses in figs. 24-26, the semiconductor light emitting device according to claim 1, wherein a thickness of the bonding layer (BondL) is greater than a thickness of the barrier 127b (fig. 24 shows a thickness of the bonding layer 160, 165, 142 is greater than a thickness of the barrier 127b).
In re claim 13, Park discloses in figs. 24-26, the semiconductor light emitting device according to claim 1, wherein the barrier 127b comprises an inwardly inclined surface (see fig. 24 annotated below).
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In re claim 14, Park discloses in figs. 24-26, the semiconductor light emitting device according to claim 13, wherein the passivation layer 180, 131 in contact with outer surface of the barrier 127b has an outward slope (e.g., a slope of the lower horizontal portion of the passivation layer 180 is 1800 which has been interpreted as an outward slope).
In re claim 16, Park discloses in figs. 24-26, the semiconductor light emitting device according to claim 1, comprising a vertical type semiconductor light emitting device (first and second semiconductor layer 127a, 124 and the active layer 126 are stacked vertically).
In re claim 23, Park discloses in figs. 24-26, the semiconductor light emitting device according to claim 1, wherein the barrier 127b comprises an inner inclined surface. Park discloses the bonding material (160, 165, 142) is being guided toward a central region wherein the central region is surrounded by the inclined surface of the barrier 127b.
The claim limitation “the inner inclined surface configured to guide a molten bonding material toward a central region" pertains to be a product-by-process limitation and the process of forming the bonding material does not distinguish the product from the prior art. Referring to MPEP §2113, regarding Product-by-Process Claims:
“[E]ven though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985).”
“Once the examiner provides a rationale tending to show that the claimed product appears to be the same or similar to that of the prior art, although produced by a different process, the burden shifts to applicant to come forward with evidence establishing an unobvious difference between the claimed product and the prior art product. In re Marosi, 710 F.2d 798, 802, 218 USPQ 289, 292 (Fed. Cir. 1983)”.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 6, 24-26 is/are rejected under 35 U.S.C. 103 as being unpatentable over Altieri-Weimar et al. (US 20200227604 A1; hereinafter “Altieri-Weimar”) in view of Park.
In re claim 1, Altieri-Weimar discloses in fig. 7B, a semiconductor light emitting device comprising:
a light emitting part 2 (¶53);
a first electrode (70, 71) including a bonding layer 70 (¶59-60) below the light emitting part 2;
a barrier 22 around the bonding layer 70;
a second electrode 72 (¶55) on the light emitting part 2 (the second electrode 72 on the lower surface of the light emitting part 2); and
a third semiconductor layer 22 below a first conductivity type semiconductor layer 21,
wherein a material of the barrier 22 comprises a part of the third semiconductor layer 22.
Altieri-Weimar does not expressly disclose a passivation layer to surround the light emitting part and the second electrode;
In the same field of endeavor, Park discloses in figs. 24-26, a semiconductor light emitting device comprising a passivation layer (passivation layer comprising insulating layers 180, 131) (¶246-249) to surround the light emitting part LED and the second electrode 246.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of Park into the LED device of Altieri-Weimar to protect the device from external moisture or foreign substances and enhance electrical an optical reliability of the device (¶144 of Park).
In re claim 6, Altieri-Weimar as modified by Park discloses the semiconductor light emitting device according to claim 1.
Altieri-Weimar further discloses in fig. 7B, wherein the third semiconductor layer 22 comprises a groove (groove into which layer 70 is formed; hereinafter “G”) corresponding to a first region and is disposed to correspond to a second region in the first conductivity type semiconductor layer 21, and
wherein the bonding layer 70 is disposed in the groove G.
In re claim 24, Altieri-Weimar as modified by Park discloses the semiconductor light emitting device according to claim 1.
Altieri-Weimar further discloses in fig. 7B, wherein the barrier 22 is integrally formed with the third semiconductor layer 22 without an interface therebetween.
In re claim 25, Altieri-Weimar as modified by Park discloses the semiconductor light emitting device according to claim 6.
Altieri-Weimar further discloses in fig. 7B, wherein the barrier 22 is disposed along a boundary of the groove G such that the bonding layer 70 is confined within the groove G by the barrier 22.
In re claim 26, Altieri-Weimar as modified by Park discloses the semiconductor light emitting device according to claim 1.
Altieri-Weimar further discloses in fig. 7B, wherein the barrier (1, 22) (¶47, 53) is configured to electrically isolate the bonding layer 71 from an adjacent electrode region 72 (¶70).
Claim(s) 15, 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park and further in view of Pynn et al. (US 11195973 B1; hereinafter “Pynn”).
In re claim 15, Park discloses the semiconductor light emitting device according to claim 14 outlined above. Park does not expressly disclose wherein a peak point below the barrier and a peak point below the passivation layer are located on a same horizontal line.
In the same field of endeavor, Pynn discloses in fig. 10, a semiconductor light emitting device, wherein a peak point below the barrier 1025 and a peak point below the passivation layer 1055 are located on a same horizontal line (Col. 21, last para. And col. 22, first para).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of Pynn into the LED device of Park and arrived at the claimed invention to improve light emission efficiency.
It has been held to be within the general skill of a worker in the art to select disposition of the passivation layer and the lower semiconductor layer in a light emitting device on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. In Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984), the Federal Circuit held that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device.
In re claim 22, Park discloses the semiconductor light emitting device according to claim 1 outlined above. Park does not expressly disclose wherein the barrier has a height greater than a maximum thickness of the bonding layer.
In the same field of endeavor, Pynn discloses in fig. 10, a semiconductor light emitting device, wherein the barrier 1025 has a height greater than a maximum thickness of the bonding layer 1070 (Col. 21, last para. And col. 22, first para).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of Pynn into the LED device of Park and arrived at the claimed invention to improve light emission efficiency.
It has been held to be within the general skill of a worker in the art to select disposition of the passivation layer and the lower semiconductor layer in a light emitting device on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. In Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984), the Federal Circuit held that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NILUFA RAHIM whose telephone number is (571)272-8926. The examiner can normally be reached M-F 9am-5:30pm EST.
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/NILUFA RAHIM/Primary Examiner, Art Unit 2893
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