Prosecution Insights
Last updated: April 19, 2026
Application No. 18/686,213

INDUCTIVE POSITION SENSOR FOR SMALL APPLICATIONS

Final Rejection §102§103§112
Filed
Mar 26, 2024
Examiner
ZAKARIA, AKM
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
UNIVERSIDADE DO MINHO
OA Round
2 (Final)
82%
Grant Probability
Favorable
3-4
OA Rounds
2y 7m
To Grant
98%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allow Rate
653 granted / 794 resolved
+14.2% vs TC avg
Strong +16% interview lift
Without
With
+16.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
47 currently pending
Career history
841
Total Applications
across all art units

Statute-Specific Performance

§101
3.3%
-36.7% vs TC avg
§103
52.7%
+12.7% vs TC avg
§102
21.2%
-18.8% vs TC avg
§112
19.9%
-20.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 794 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendments Entry of Amendments Claim(s) 1 and 10-12 have been amended. Claim(s) 3-9 and 13-14 have been canceled. New Claim(s) 16-17 have been added. Rejections under 35 USC 112 Previous 112 rejections for Claim(s) 1-15 are now withdrawn as amendments made to claim(s) have overcome the previous 112 rejections. However, additional 112 rejection(s) have been necessitated by the amendments. Rejections under 35 USC 102 and 103 Applicant’s amendments filed 03/11/2026 with respect to Claim(s) 1-2, 10-12 and 15-17 have been fully considered but they are not persuasive. Applicant's arguments with respect to Claim(s) 1-2, 10-12 and 15-17 have been considered but are moot because the arguments do not apply to the reference(s) and/or ground(s) being used in the current rejection. For further details see the rejections/objections for Claim(s) 1-2, 10-12 and 15-17 herein. Claim Objections Claim 17 is objected to because of the following informalities: Claim 17 recites a limitation “routed traces between layers are disposed in an edge shaped connection forming an independent cross shaped connection between stacked traces” Examiner suggests amending the limitation to recite “routed traces between the adjacent layers are disposed in an edge shaped connection forming an independent cross shaped connection between the stacked traces” to restore antecedent clarity. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim(s) 10-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. The rationale for this finding is explained below: Claim(s) 10-12 depend on claim 8 which has been cancelled. Hence, there is improper dependency/insufficient antecedent basis of claim 8 in the claim(s). Appropriate correction is required. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-2, 10-12 and 15 are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by AUSSERLECHNER et al. (US 20210190543; hereinafter AUSSERLECHNER). Regarding claim 1, AUSSERLECHNER discloses in figure(s) 1-9 An inductive positioning sensor (100), arranged in a multi- layer printed circuit board, comprising at least one excitation coil (1) (111; fig. 1A); and at least one receiver coil system (112), comprising a receiver coil (2) and a corresponding duplicated receiver coil (22) (112A,112B) arranged on different overlapped layers; wherein the receiver coil (2) and the corresponding duplicated receiver coil (22) are connected in series (para. 82 - receiving coils 112A, 112B can be configured can be galvanically connected to at least one of the contact sections 210 on the opposite first chip surface 113a using a chip via 204 extending through the semiconductor chip 113 between the first chip surface 113a and the second chip surface 113b; figs. 2) at a main convergence point (106) (center 204,210; fig. 2C) comprising first, second, and third convergence points (101, 102, 103) (3-landing points on 204,210 connection) formed by a single connection point (para. 82 - at least one of the contact sections 210; fig. 2C) arrangement of three through-hole vias (through vias 204). wherein the multi-layer printed circuit board comprises traces (para. 83 - electrically conductive structure 205 can be a conductor track trace) in at least four overlapped layers (111, 111’, 112A, 112A’, 112B, 112B’; fig. 1B) and a trace layout comprises at least two stacked traces (111, 111’; 112A, 112A’; 112B, 112B’) in different overlapped layers; and wherein the first, second, and third convergence points (101, 102, 103) are adapted to route and de-interlace the stacked traces between each other along the at least four overlapped layers (connection points of 111, 111’, 112A, 112A’, 112B, 112B’) of the multi-layer printed circuit board (para. 11 - structured conductor tracks on printed circuit boards). Regarding claim 2, AUSSERLECHNER discloses in figure(s) 1-9 the inductive positioning sensor (100) according to claim 1, wherein the at least one excitation coil (1) circularly surrounds (111 encircles 112; figs. 1) the limits defined by the at least one receiver coil system. Regarding claim 10, AUSSERLECHNER discloses in figure(s) 1-9 the inductive positioning sensor (100) according to claim 8, wherein the first convergence point A (101) comprises a through-hole via (204; figs. 1-2) connection between the at least four overlapped layers of the multi-layer printed circuit board (para. 52 - PCB), said via being adapted to allow the trace communication between top layer and bottom layer. Regarding claim 11, AUSSERLECHNER discloses in figure(s) 1-9 the inductive positioning sensor (100) according to claim 8, wherein the second convergence point B (102) comprises a through-hole via connection (left side 204 via) between the at least four overlapped layers of the multi-layer printed circuit board (para. 52 - PCB), said via being adapted to allow the trace communication between top layer (113a), bottom layer (113b), and between intermediate layer one and layer three. Regarding claim 12, AUSSERLECHNER discloses in figure(s) 1-9 the inductive positioning sensor (100) according to claim 8, wherein the third convergence point C (103) comprises a through-hole via connection (right side 204 via) between the at least four overlapped layers of the multi-layer printed circuit board (para. 52 - PCB), said via being adapted to allow the trace communication between top layer (113a), bottom layer (113b), and intermediate layer two. Regarding claim 15, AUSSERLECHNER discloses in figure(s) 1-9 the inductive positioning sensor (100) according to claim 1, comprising at least one application-specific integrated circuit (para. 37 - Application Specific Integrated Circuit)) with at least two interlaced receiver coils connected per-channel (two or more individual receiving coils 112A, 112B). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 16 are rejected under 35 U.S.C. 103 as being unpatentable over AUSSERLECHNER in view of Klein et al. (US 20130057267). Regarding claim 16, AUSSERLECHNER teaches in figure(s) 1-9 the inductive positioning sensor (100) according to claim 1, AUSSERLECHNER does not teach explicitly wherein the multi- layer printed circuit board comprises at least one blind via (104) configured to connect stacked/overlapped traces between adjacent layers of the multilayer printed circuit board. However, Klein teaches in figure(s) 1-9 wherein the multi- layer printed circuit board comprises at least one blind via (104) (para. 121 - vias 161 to 166 can be through holes, blind holes or buried holes; fig. 7) configured to connect stacked/overlapped traces between adjacent layers of the multilayer printed circuit board (para. 5 - different metallization layers of the printed circuit board are mechanically spaced out from one another by insulating layers made of an electrically insulating material.). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of AUSSERLECHNER by having wherein the multi- layer printed circuit board comprises at least one blind via (104) configured to connect stacked/overlapped traces between adjacent layers of the multilayer printed circuit board as taught by Klein in order to provide combining prior art elements according to known methods to yield predictable results as evidenced by "blind holes which open onto only one external face of the printed circuit board" (para. 9). Allowable Subject Matter Claim 17 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 17, the prior arts of record do not fairly teach or suggest “wherein the multi- layer printed circuit board comprises a secondary convergence point (105) comprising two opposite blind vias (104) arranged such that routed traces between layers are disposed in an edge shaped connection forming an independent cross shaped connection between stacked traces.” including all of the limitations of the base claim and any intervening claims. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to AKM ZAKARIA whose telephone number is (571)270-0664. The examiner can normally be reached on 8-5 PM (PST). If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JUDY NGUYEN can be reached on 571-272-2258. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AKM ZAKARIA/ Primary Examiner, Art Unit 2858
Read full office action

Prosecution Timeline

Mar 26, 2024
Application Filed
Nov 28, 2025
Non-Final Rejection — §102, §103, §112
Mar 11, 2026
Response Filed
Mar 28, 2026
Final Rejection — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
82%
Grant Probability
98%
With Interview (+16.3%)
2y 7m
Median Time to Grant
Moderate
PTA Risk
Based on 794 resolved cases by this examiner. Grant probability derived from career allow rate.

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