DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
1. The information disclosure statements (IDS) submitted and are in compliance with the provisions of 37 CFR 1.97. According, the information disclosure statement is being considered by the Examiner.
Claim Objection
2. Claims 1-2, 4, 7 and 9-10 are objected to because of the following informalities: Regarding claim 1, line 1, “is characterized by” should be deleted. Regarding claims 2, 4, 7, line 2, “characterized in that” should be deleted. Regarding claim 9, line1, “is characterized by” should be deleted. Regarding claim 10, line1, “is characterized by” should be deleted.
Examiner Notes
3. Examiner cites particular paragraphs, columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
Claim Rejections - 35 USC § 103
4. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
5. Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Kishimoto (JP2001343401, hereinafter “Kishimoto”) in view of Yan et al. (US. Pub. 20240085495; hereinafter “Yan”).
Regarding claim 1, Kishimoto discloses, in Fig. 1, a current peak value measurement apparatus (a current detector in Fig. 1) is characterized by comprising: a PCB Rogowski coil (1), a sampling resistor (6), 7) and a micro-controller (5); wherein, the PCB Rogowski coil (1) is configured to induce a current signal in a circuit to be detected, and obtain a corresponding induced electromotive force (see paragraph [0009]); the sampling resistor (6) is connected to the PCB Rogowski coil (see Fig. 1), and is configured to obtain sampling voltage corresponding to the induced electromotive force (see [0012]); 7) is connected to the signal amplifying circuit, and is configured to perform integrating processing on the amplified sampling voltage to obtain a voltage signal proportional to the current signal in the circuit to be detected, and to hold a maximum value of the voltage signal (see [0009, 12, 23]); the micro-controller (5) is connected to the integrating and voltage holding circuit and is configured to carry out ADC sampling (4) on the maximum value of the voltage signal and obtain a current peak value of the current signal in the circuit to be detected according to ADC sampling data and preset current calibration data (see [0002, 5, 12]).
Kishimoto does not disclose the signal amplifying circuit is connected to the sampling resistor, and is configured to amplify the sampling voltage and output amplified sampling voltage.
Yan discloses, in Fig. 1, a current detector for detecting a current leakage, comprising signal amplifying circuit is connected to the sampling resistor and is configured to amplify the sampling voltage and output amplified sampling voltage (The sampling resistor is configured to convert a current signal flowing through the leakage current detection coil into a voltage signal. The PGA module is configured to amplify a sampled signal. The gain control module is configured to control a magnification of the PGA module. The ADC module is configured to convert conversion of an amplified sampled signal from digital to analog. See [0009]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the current detection system of Kishimoto by having a signal amplifying circuit is connected to the sampling resistor, and is configured to amplify the sampling voltage and output amplified sampling voltage, as taught by Yan in order to meet the system design and specification requirement.
6. Claims 1 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (CN-201589808, hereinafter “Chen”) in view of Yan.
Regarding claim 1, Kishimoto discloses, in Figs. 1-5, a current peak value measurement apparatus (a current detection device in Fig. 1) is characterized by comprising: a PCB Rogowski coil (2), a sampling resistor (R or 4 in Figs. 1 and 4), 5) and a micro-controller (7-9); wherein, the PCB Rogowski coil (2) is configured to induce a current signal in a circuit to be detected, and obtain a corresponding induced electromotive force (see abstract and [0021]); the sampling resistor (R or 4 in Figs. 1 and 4) is connected to the PCB Rogowski coil, and is configured to obtain sampling voltage corresponding to the induced electromotive force (see [0020] and claim 1); 5) is connected to the signal amplifying circuit, and is configured to perform integrating processing on the amplified sampling voltage to obtain a voltage signal proportional to the current signal in the circuit to be detected, and to hold a maximum value of the voltage signal (see [0020]); the micro-controller (7-9) is connected to the integrating and voltage holding circuit and is configured to carry out ADC sampling (6) on the maximum value of the voltage signal and obtain a current peak value of the current signal in the circuit to be detected according to ADC sampling data and preset current calibration data (see [0005, 8-9, 20]).
Kishimoto does not disclose the signal amplifying circuit is connected to the sampling resistor, and is configured to amplify the sampling voltage and output amplified sampling voltage.
Yan discloses, in Fig. 1, a current detector for detecting a current leakage, comprising signal amplifying circuit is connected to the sampling resistor and is configured to amplify the sampling voltage and output amplified sampling voltage (The sampling resistor is configured to convert a current signal flowing through the leakage current detection coil into a voltage signal. The PGA module is configured to amplify a sampled signal. The gain control module is configured to control a magnification of the PGA module. The ADC module is configured to convert conversion of an amplified sampled signal from digital to analog. See [0009]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the current detection system of Kishimoto by having a signal amplifying circuit is connected to the sampling resistor, and is configured to amplify the sampling voltage and output amplified sampling voltage, as taught by Yan in order to meet the system design and specification requirement.
Regarding claim 11, Chen and Yan disclose the current peak value measurement apparatus according to claim 1, Chen further teaches the current signal is a pulse current signal in the circuit to be detected (see [0005]).
7. Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Yan and further in view of Tang et al. (US. Pub. 2016/0116504; hereinafter “Tang”).
Regarding claim 2, Chen and Yan disclose the current peak value measurement apparatus according to claim 1, except for explicitly specifying that the PCB Rogowski coil comprises a first coil part and a second coil part, the first coil part and the second coil part form a loop-shaped coil whole body, and the first coil part and the second coil part are detachably connected; wherein, the first coil part and the second coil part are respectively provided with conducting wires on a top layer and a bottom layer correspondingly, the corresponding conducting wires are connected through via holes to form wire turns and are provided with return wires.
Tang discloses, in Fig. 3, a current sensor comprising a PCB Rogowski coil, wherein the PCB Rogowski coil comprises a first coil part (305) and a second coil part (310), the first coil part and the second coil part form a loop-shaped coil whole body (see at least in Fig. 3), and the first coil part and the second coil part are detachably connected; wherein, the first coil part and the second coil part are respectively provided with conducting wires on a top layer and a bottom layer correspondingly, the corresponding conducting wires are connected through via holes to form wire turns and are provided with return wires (see [0069]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the current detection system of Kishimoto and Han by having the PCB Rogowski coil comprises a first coil part and a second coil part, the first coil part and the second coil part form a loop-shaped coil whole body, and the first coil part and the second coil part are detachably connected; wherein, the first coil part and the second coil part are respectively provided with conducting wires on a top layer and a bottom layer correspondingly, the corresponding conducting wires are connected through via holes to form wire turns and are provided with return wires, as taught by Tang for purpose of providing the PCB Rogowski coil having outlet wire is connected to the inlet wire of the wire turn of the first coil unit so as to eliminate a need to break the coil and reduce error, thus eliminating interference of an external magnetic field in a better manner and improving anti-external interference capability.
8. Claims 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Yan and further in view of Jakupi et al. (US. Pub. 2020/0182921; hereinafter “Jakupi”).
Regarding claim 5, Chen and Yan disclose the current peak value measurement apparatus according to claim 1, except for specifying that further comprising a filter circuit disposed between the PCB Rogowski coil and the signal amplification circuit.
Jakupi discloses, in Fig.2A-C, a current sensor comprising a filter circuit (a band pass filter BPF) disposed between the PCB Rogowski coil (100) and a signal amplification circuit (an amplifier).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the current detection system of Kishimoto and Han by having a filter circuit disposed between the PCB Rogowski coil and the signal amplification circuit as taught by Jakupi for purpose of providing the current sensor low cost solution for sensing both high frequency arc faults, low frequency over-current faults, and for low frequency current measurement.
Regarding claim 6, Chen and Yan and Jakupi disclose the current peak value measurement apparatus according to claim 5, wherein said filter circuit comprises a common-mode inductor disposed between an output terminal of the PCB Rogowski coil and the sampling resistor (see Fig. 4 of Chen).
Allowable Subject Matter
9. Claims 3-4, 7-10 and 12-13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
9. Any inquiry concerning this communication or earlier communications from the examiner should be directed to THANG LE whose telephone number is (571)272-9349. The examiner can normally be reached on Monday thru Friday 7:30AM-5:00PM EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Huy Phan can be reached on (571) 272-7924. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/THANG X LE/Primary Examiner, Art Unit 2858
9/23/2024