Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Election/Restriction
1. The restriction requirement between inventions, as set forth in the Office action mailed on 04/15/2026, has been reconsidered in view of the applicant’s remarks. The restriction requirement is hereby withdrawn. New claims 36-37 were added.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
2. Claims 16-37 are rejected under 35 U.S.C. 102(a1) as being anticipated by Mastomaki et al. (“InAs nanowire superconducting tunnel junctions: spectroscopy, thermometry and nanorefrigeration”, NANO RESEARCH, vol. 10, pages 3468-3475, 13 June 2017; see IDS dated 02/29/2024; hereinafter Mastomaki).
Regarding claim 16, Mastomaki, in fig. 1, discloses a device comprising: a semiconductor-superconductor hybrid structure comprising a semiconductor component InAs NW and a superconductor component Ti/AlMn, the superconductor component comprising a layer of aluminium AlMn; at least one conductive lead Al in tunnelling communication with the semiconductor-superconductor hybrid structure; and a tunnel barrier AlOx arranged between the semiconductor-superconductor hybrid structure and the at least one conductive lead Al; wherein the at least one conductive lead Al is arranged over the superconductor component Ti/AlMn such that the superconductor component Ti/AlMn shields the semiconductor component InAs NW from the at least one conductive lead Al; wherein the tunnel barrier AlOx is arranged between the superconductor component Ti/AlMn and the at least one conductive lead Al; wherein the tunnel barrier AlOx consists of a native aluminium oxide layer AlOx formed integrally to the superconductor component Ti/AlMn.
Regarding claim 17, Mastomaki discloses wherein the tunnel barrier AlOx does not extend beyond edges of the superconductor component Ti/AlMn (fig. 1).
Regarding claim 18, Mastomaki discloses wherein the semiconductor component InAs NW is in the form of a nanowire (fig. 1).
Regarding claim 19, Mastomaki discloses wherein the nanowire has a diameter in a range of 90 to 100 nm, and a length is about 2.5 µm (page 5, col.1, lines 23-24).
Regarding claim 20, Mastomaki discloses wherein the nanowire InAs NW has a plurality of facets, and the superconductor component Ti/AlMn is arranged over a subset of the plurality of facets (fig. 1).
Regarding claim 21, Mastomaki discloses wherein the device includes a pair of conductive leads Al, each conductive lead of the pair being in communication with a respective end of the semiconductor-superconductor hybrid structure (fig. 1).
Regarding claim 22, Mastomaki discloses wherein the superconductor component Ti/AlMn is an island (fig. 1).
Regarding claim 23, Mastomaki discloses wherein the device includes a conductive lead Al which is in tunnelling communication with a bulk segment of the semiconductor- superconductor hybrid structure (fig. 1).
Regarding claim 24, Mastomaki discloses wherein the semiconductor- superconductor hybrid structure and the at least one conductive lead Al are arranged on a substrate Si/SiOx, and wherein at least one shadow wall is arranged on the substrate (fig. 1).
Regarding claim 25, Mastomaki discloses wherein: the at least one shadow wall includes a supporting portion and a hanging portion; and the hanging portion overhangs the substrate and is supported by the supporting portion (fig. 1).
Regarding claim 26, Mastomaki discloses wherein the semiconductor component comprises a material of formula: InAsxSb1-x where x=1 (fig. 1).
Regarding claim 35, the limitations “which method comprises: cooling the device to a temperature below a critical temperature of the superconductor component such that the superconductor component displays superconductivity; applying a magnetic field to the semiconductor-superconductor hybrid structure; electrostatically gating the semiconductor-superconductor hybrid structure; and measuring a tunnelling current through the at least one conductive lead” are directed to function, operation, intent-of-use of the nanodevice. It has been held that when the claimed and prior art products are identical in structure or composition, a prima facie case of either anticipation or obviousness has been established. See MPEP § 2112.01. While features of an apparatus may be recited either structurally or functionally, claims directed to an apparatus must be distinguished from the prior art in terms of structure rather than function. In re Schreiber, 128 F.3d 1473, 1477-78, 44 USPQ2d 1429, 1431-32 (Fed. Cir. 1997). Moreover, the claiming of a new use, new function or unknown property which is inherently present in the prior art does not necessarily make the claim patentable." In re Best, 562 F.2d 1252, 1254, 195 USPQ 430, 433 (CCPA 1977). (MPEP 2112).
Regarding claim 36, Mastomaki discloses wherein: the semiconductor-superconductor hybrid structure and the at least one conductive lead Al are arranged on a substrate Si/SiOx, and at least one shadow wall is arranged on the substrate Si/SiOx; the at least one conductive lead Al comprises first, second, and third conductive leads Al, the first conductive lead Al being in communication with a first end of the semiconductor- superconductor hybrid structure, the second conductive lead Al being in communication with a second end of the semiconductor-superconductor hybrid structure, and the third conductive lead being in tunnelling communication with a bulk segment of the semiconductor-superconductor hybrid structure; and the device further includes a metal contact extending under a shadow wall (fig. 1).
Regarding claim 27, Mastomaki, in fig. 1, discloses a method of fabricating a device, which method comprises: preparing a semiconductor component on a substrate Si/SiOx;forming a semiconductor-superconductor hybrid structure by fabricating a superconductor component Ti/AlMn over the semiconductor component InAs NW, the superconductor component Ti/AlMn comprising a layer of aluminium; partially oxidizing the aluminium to form a tunnel barrier AlOx consisting of native aluminium oxide AlOx on the superconductor component Ti/AlMn (page 2, col.1, lines 15-16); and fabricating at least one conductive lead Al on the tunnel barrier AlOx.
Regarding claim 37, Mastomaki, in fig. 1, discloses a method of fabricating a device including a semiconductor-superconductor hybrid structure comprising a semiconductor component InAs NW and a superconductor component Ti/AlMn, which method comprises: preparing the semiconductor component InAs NW on a substrate Si/SiOx; fabricating a superconductor component Ti/AlMn over the semiconductor component InAs NW, the superconductor component Ti/AlMn comprising a layer of aluminium; fabricating at least one conductive lead Al in tunnelling communication with the semiconductor-superconductor hybrid structure; and partially oxidizing the aluminium to form a tunnel barrier AlOx (page 2, col.1, lines 15-16) arranged between the semiconductor-superconductor hybrid structure and the at least one conductive lead Al, the tunnel barrier AlOx consisting of native aluminium oxide AlOx formed integrally to the superconductor component Ti/AlMn, wherein: the at least one conductive lead Al is arranged over the superconductor component Ti/AlMn such that the superconductor component Ti/AlMn shields the semiconductor component InAs NW from the at least one conductive lead Al.
Regarding claim 28, Mastomaki discloses wherein the substrate includes a pre-patterned gate electrode (fig. 1).
Regarding claim 29, Mastomaki discloses wherein partially oxidizing the aluminium comprises exposing the aluminium to dioxygen and/or ozone (page 2, col.2, lines 21-24).
Regarding claim 30, Mastomaki discloses wherein: the method further comprises, before fabricating the superconductor component Ti/AlMn, fabricating at least one shadow wall on the substrate Si/SiOx; and fabricating the superconductor component Ti/AlMn comprises directionally depositing the aluminium from a first direction selected such that the at least one shadow wall defines a shadow region in which superconductive metal is not deposited (fig. 1).
Regarding claim 31, Mastomaki discloses wherein: the at least one shadow wall includes a supporting portion and a hanging portion; the hanging portion overhangs the substrate and is supported by the supporting portion; and fabricating the at least one conductive lead Al comprises directionally depositing conductive material from a second direction, different from the first direction, the second direction being selected such that the at least one shadow wall controls the deposition of the conductive material (fig. 1).
Regarding claim 32, Mastomaki discloses wherein the superconductor component Ti/AlMn, the tunnel barrier AlOx, and the at least one conductive lead Al are fabricated without etching (fig. 1).
Regarding claim 33, Mastomaki discloses wherein the method is performed in a sealed apparatus (vacuum chamber), and wherein the substrate is not removed from the sealed apparatus until fabrication of the device is complete (page 2, col. 2, lines 7-33).
Regarding claim 34, Mastomaki discloses wherein preparing the semiconductor component InAs NW comprises growing the semiconductor component InAs NW on the substrate Si/SiOx by selective area growth (page 1, col. 2, lines 26-30).
Conclusion
3. Any inquiry concerning this communication or earlier communications from the examiner should be directed to David Vu whose telephone number is (571) 272-1798. The examiner can normally be reached on Monday-Friday from 8:00am to 5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempt to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Steven Loke H can be reached on (571) 272-1657. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
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/DAVID VU/
Primary Examiner, Art Unit 2818
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