DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
2. The information disclosure statement (IDS) submitted on April 6, 2026 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner except as otherwise indicated.
Drawings
3. The drawings are objected to because shading is used improperly in the drawing, reducing its reproducibility. 37 CFR 1.84(m) requires that shading should not reduce legibility, solid black shading is not used except for bar graphs and color, and that shading with spaced lines is preferred. Specifically, Figs. 3A and 4 have reduced legibility.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
4. Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, the term “substantial mirror symmetry” in claim 1 is a relative term which renders the claim indefinite. The term “substantial” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. The limitation renders the claim indefinite because this limitation does not quantify how much (i.e. a percentage) qualifies as substantial in terms of mirror symmetry. For examination purposes, this limitation will be interpreted as “mirror symmetry”, where any amount of mirror symmetry will be considered.
Regarding claims 2-19, claims 2-19 are also rejected for containing the same limitation because claims 2-19 are dependent on 1. Claims 7, 9, 11-12, 14, and 17-18 also recite the same aforementioned limitation, and will be interpreted the same.
Regarding claim 20, claim 20 is also rejected for the aforementioned reasoning rejecting claim 1.
Regarding claim 5, the term “substantially symmetrical manner” in claim 5 is a relative term which renders the claim indefinite. The term “substantially” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. The limitation renders the claim indefinite because this limitation does not quantify how much (i.e. a percentage) qualifies as substantially symmetrical. For examination purposes, this limitation will be interpreted as “symmetrical manner”, where any amount of symmetry will be considered.
Regarding claim 14, claim 14 recites the limitation "the third signal line layer" in lines 6, 10, and 13. There is insufficient antecedent basis for this limitation in the claim.
For examination purposes, “the third signal line layer” in lines 6, 10, and 13 will be interpreted to read as “the signal line layer”.
Claim Rejections - 35 USC § 102
5. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
6. Claims 1-2, 4-11, 15-17, and 19-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al (US 2023/0143745 A1, hereafter Lee).
Regarding claim 1, Lee discloses an array substrate (Fig. 2 DA; [0071]), comprising:
a base substrate (Fig. 20 110);
a signal line layer (Fig. 16; [0196], [0198]) closest to an anode (Fig. 18 R) on the base substrate (110);
an anode layer (Fig. 18, Fig. 20 Anode) on a side of the signal line layer (Fig. 16) closest to the anode (R) away from the base substrate (110);
a pixel definition layer (Fig. 20 380);
and a plurality of subpixel apertures (Fig. 18 OP, Fig. 20 OP) extending through the pixel definition layer (380);
wherein the anode layer (Fig. 18, Fig. 20 Anode) comprises a plurality of anodes (Fig. 18);
the signal line layer (Fig. 16) closest to the anode (R) comprises a plurality of signal lines (Fig. 16 171, 172);
an orthographic projection of a portion of a respective anode (R) of the plurality of anodes (Fig. 18) in a respective subpixel aperture (Fig. 18 OP) of the plurality of subpixel apertures (Fig. 18) on the base substrate (110) at least partially overlaps (Fig. 19) with an orthographic projection of the signal line layer (Fig. 16) closest to the anode (R) on the base substrate (110), forming one or more overlapping areas (Fig. 19);
and the one or more overlapping areas have a substantial mirror symmetry (Fig. 19) with respect to a plane perpendicular (Fig. 19 plane DR2-DR3) to the respective anode (R) and intersecting the respective anode (R).
Regarding claim 2, Lee discloses the array substrate of claim 1, wherein the signal line layer (Fig. 16) closest to the anode (R) comprises a plurality of planarization enhancing blocks (Fig. 16 FL-SD2; [0206])
and an orthographic projection of a respective planarization enhancing block (FL-SD2) of the plurality of planarization enhancing blocks (Fig. 19) on the base substrate (110) substantially covers (Fig. 19) an orthographic projection of at least a main anode part (Fig. 18 Anode, Fig. 19) of a respective anode (R) of the plurality of anodes (Fig. 18) on the base substrate (110).
Regarding claim 4, Lee discloses the array substrate of claim 2, wherein the plurality of planarization enhancing blocks (FL-SD2) are parts of a unitary structure (Fig. 16, Fig. 19).
Regarding claim 5, Lee discloses the array substrate of claim 1, wherein an orthographic projection of at least a main anode part (Fig. 19) of a respective anode (R) of the plurality of anodes (Fig. 18) on the base substrate (110) is at least partially surrounded by an orthographic projection of portions of the signal line layer (Fig. 16) closest to the anode (R) on the base substrate (110) in a substantially symmetrical manner (Fig. 19; i.e. left and right sides are symmetrical through plane DR2-DR3). Refer to Claim Rejections - 35 USC § 112 for claim interpretation.
Regarding claim 6, Lee discloses the array substrate of claim 1, wherein the anode layer (Fig 18, Fig. 20 Anode) comprises a first respective anode (G);
the signal line layer (Fig. 16) closest to the anode comprises multiple signal lines (171, 172);
an orthographic projection of the first respective anode (G) on the base substrate (110) at least partially overlaps (Fig. 19) with each of orthographic projections of the multiple signal lines (171, 172) on the base substrate (110);
and the multiple signal lines (171, 172) are substantially evenly distributed along a first direction (Fig. 19 DR1) with respect to a first main anode part (Fig. 18 Anode, Fig. 19) of the first respective anode (G).
Regarding claim 7¸ Lee discloses the array substrate of claim 6, wherein portions of the multiple signal lines (171, 172), in a region crossing over the first respective anode (G), have a substantial mirror symmetry (Fig. 19) with respect to a plane perpendicular (plane DR2-DR3) to the first respective anode (G), intersecting the first respective anode (G), and substantially parallel to a second direction (DR2).
Regarding claim 8, Lee discloses the array substrate of claim 6, wherein the multiple signal lines comprise a first signal line (171), a second signal line (172), and a third signal line (171; [0205]);
the first signal line (171) and the third signal line (171; [0205]) are two adjacent data lines (Fig. 16) of a plurality of data lines (171, 172) configured to provide data signals to two adjacent columns of subpixels (Fig. 19 two columns of G going in direction DR1), respectively;
and the second signal line (172) is a low voltage signal line ([0126]) configured to provide a low voltage signal ([0126]) to a cathode (Fig. 20 Cathode) of a light emitting element ([0126]).
Regarding claim 9, Lee discloses the array substrate of claim 1, wherein the anode layer (Fig. 18) comprises a third respective anode (Fig. 18 B);
the signal line layer (Fig. 16, Fig. 19) closest to the anode (B) comprises a fourth signal line (Fig. 16 172; [0205]);
an orthographic projection of the third respective anode (B) on the base substrate (110) at least partially overlaps (Fig. 19) with an orthographic projection of the fourth signal line (172) on the base substrate (110);
and a portion of the fourth signal line (172), in a region crossing over the third respective anode, have a substantial mirror symmetry (Fig. 19) with respect to a plane perpendicular (plane DR2-DR3) to the third respective anode (B), intersecting the third respective anode (B), and substantially parallel to a second direction (DR2).
Regarding claim 10, Lee discloses the array substrate of claim 9, wherein the fourth signal line (172) is a voltage supply line ([0126]) configured to provide a voltage supply signal ([0126]) to a pixel driving circuit (Fig. 6).
Regarding claim 11, Lee discloses the array substrate of claim 1, wherein the anode layer (Fig. 18, Fig. 20 Anode) comprises a plurality of anodes (Fig. 19);
the signal line layer (Fig. 16) closest to the anode (R) comprises a signal line (172);
an orthographic projection of a respective anode (R) of the plurality of anodes (Fig. 18) on the base substrate (110) at least partially overlaps (Fig. 19) with an orthographic projection of the signal line (172) on the base substrate (110);
a portion of the signal line (172), in a region crossing over the respective anode (R), have a substantial mirror symmetry (Fig. 19) with respect to a plane perpendicular (plane DR2-DR3) to the respective anode (R), intersecting the respective anode (R), and substantially parallel to a second direction (DR2);
the signal line layer (Fig. 16) closest to the anode further comprises a first portion (annotated Fig. 19 172L) and a second portion (annotated Fig. 19 172R);
an orthographic projection of the first portion (172L) on the base substrate (110) is on a first side (S1) of the orthographic projection of at least a main anode part (Fig. 18 Anode) of an individual anode (R) on the base substrate (110);
an orthographic projection of a second portion (172R) on the base substrate is on a second side (S2) of the orthographic projection of at least the main anode part (Fig. 18 Anode) of the individual anode (R) on the base substrate (110), the first side (S1) being opposite to the second side (S2);
[AltContent: textbox (For the record, the inserted figure (annotated Fig. 19 of Lee) of Lee depicts an overlay of several layers in a display device. Several subpixels (R, G, B) comprised of a subpixel aperture (i.e. OPb, OPr2, OPb2) and a main anode part (i.e. Anode_b, Anode_r2, Anode_b2) are overlayed over a signal line layer comprised of several signal lines (i.e. 171, 172-e) and planarization enhancing blocks (i.e. FD-SL2b, FD-SL2r, FD-SL2b2). Each anode has four sides (S1-4) with an edge (E1-4). )]
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and the orthographic projection of the first portion (172L) on the base substrate (110) and the orthographic projection of the second portion (172R) on the base substrate (110) have a substantial mirror symmetry (Fig. 19) with respect to a plane perpendicular (plane DR2-DR3) to the individual anode (R), intersecting the individual anode (R), and substantially parallel to the second direction (DR2).
Regarding claim 15, Lee discloses the array substrate of claim 1, wherein the signal line layer (Fig. 16) closest to the anode (R) comprises a plurality of planarization enhancing blocks (Fig 16 FL-SD2, Fig. 19);
and an orthographic projection of a respective planarization enhancing block (Fig. 16 FD-SL2, Fig. 19) of the plurality of planarization enhancing blocks (Fig. 19) on the base substrate substantially covers (Fig. 19) an orthographic projection of a respective subpixel aperture (Fig. 18 OP) of the plurality of subpixel apertures (Fig. 18) on the base substrate (110).
Regarding claim 16, Lee discloses the array substrate of claim 15, wherein an orthographic projection of the respective planarization enhancing block (Fig. 16 FD-SL2, Fig. 19) on the base substrate (110) substantially covers (Fig. 19) an orthographic projection of at least a main anode part (Fig. 18 Anode) of the respective anode (R) on the base substrate (110).
Regarding claim 17, Lee discloses the array substrate of claim 15, wherein the anode layer (Fig. 18) comprises a first respective anode (Fig. 18 B);
the plurality of planarization enhancing blocks (Fig. 16 FDSL-2, Fig. 19) comprise a first planarization enhancing block (annotated Fig. 19 FD-SL2b);
the plurality of subpixel apertures (Fig. 18 OP) comprises a first subpixel aperture (annotated Fig. 19 OPb);
a first main anode part (annotated Fig. 19 Anode_b) of the first respective anode (B) is in contact with organic materials (Fig. 20 183; [0196]) through the first subpixel aperture (OP);
an orthographic projection of the first planarization enhancing block (FD-SL2b) on the base substrate completely covers (Fig. 19) an orthographic projection of the first subpixel aperture (OPb) on the base substrate (110), and partially overlaps (Fig. 19) with an orthographic projection of a first main anode part (Anode_b) of the first respective anode (B) on the base substrate (110);
the first main anode part (Anode_b) comprises a first edge portion (annotated Fig. 19 E1) on a first side (annotated Fig. 19 S1 of B) of the first subpixel aperture (OPb, a second edge portion (annotated Fig. 19 E2) on a second side (annotated Fig. 19 S2 of B) of the first subpixel aperture, a third edge portion (annotated Fig. 19 E3) on a third side (annotated Fig. 19 S3 of B) of the first subpixel aperture, and a fourth edge portion (annotated Fig. 19 E4) on a fourth side (annotated Fig. 19 S4 of B) of the first subpixel aperture;
the first side (S1 of B) and the second side (S2 of B) are opposite to each other;
the third side (S3 of B) and the fourth side (S4 of B) are opposite to each other;
the orthographic projection of the first planarization enhancing block (FD-SL2b) on the base substrate (110) is non-overlapping with an orthographic projection of the first edge portion (E1) on the base substrate (110), is non-overlapping with an orthographic projection of the second edge portion (E2) on the base substrate (110), is non-overlapping with an orthographic projection of the third edge portion (E3) on the base substrate (110), and is non-overlapping with an orthographic projection of the fourth edge portion (E4) on the base substrate (110); the first edge portion (E1) and the second edge portion (E2) have a substantial mirror symmetry (Fig. 19) with respect to a plane perpendicular (plane DR2-DR3) to the first main anode part (Anode_b), intersecting the first main anode part (Anode_b), and substantially parallel to a second direction (DR2);
and the third edge portion (E3) and the fourth edge portion (E4) have a substantial mirror symmetry (Fig. 19) with respect to a plane perpendicular (plane DR1-DR3) to the first main anode part (Anode_b), intersecting the first main anode part (Anode_b), and substantially parallel to a first direction (DR1).
Regarding claim 19¸ Lee discloses a display apparatus (Fig. 2 1000; [0061]), comprising the array substrate of claim 1, and one or more integrated circuits (Fig. 2; [0082]-[0085]) connected to the array substrate.
Regarding claim 20, Lee discloses an array substrate (Fig. 2 DA; [0071]), comprising:
a base substrate (Fig 20 110);
a first signal line layer (Fig. 9 151+155; [0148]) on the base substrate (110);
a first planarization layer (Fig. 20 141; [0152]) on a side of the first signal line layer (151+155) away from the base substrate (110);
a second signal line layer (Fig. 14; [0184]) on a side of the first planarization layer (142) away from the first signal line layer (151+155);
a second planarization layer (Fig. 20 181; [0195]) on a side of the second signal line layer (Fig. 14) away from the first planarization layer (142);
a third signal line layer (Fig. 16; [0196]) on a side of the second planarization layer (181) away from the second signal line layer (Fig. 14);
an anode layer (Fig 18, Fig. 20 Anode) on a side of the third signal line layer (Fig. 16) away from the base substrate (110);
a pixel definition layer (Fig. 20 380);
and a plurality of subpixel apertures (Fig. 18 OP, Fig. 20 OP) extending through the pixel definition layer (380);
wherein the third signal line layer (Fig. 16) is a signal line layer closest to the anode layer (Fig. 19);
and wherein the anode layer (Fig. 18) comprises a plurality of anodes (Fig. 18);
the second signal line layer (Fig. 14) comprises a plurality of a first voltage supply line (Fig. 14 128) extends along a first direction (Fig. 14. DR1);
third signal line layer (Fig. 16) comprises a plurality of a first voltage supply line (Fig. 16 172) extends along a second direction (DR2);
the third signal line layer (Fig. 16) comprises a plurality of signal lines (Fig. 16 171+172);
an orthographic projection of a portion of a respective anode (Fig. 18 B, Anode) of the plurality of anodes (Fig. 18 Anode) in a respective subpixel aperture (Fig. 18 B, OP) of the plurality of subpixel apertures (Fig. 18 OP) on the base substrate (110) at least partially overlaps (Fig. 19) with an orthographic projection of the signal line layer (Fig. 16) closest to the anode (B) on the base substrate (110), forming one or more overlapping areas (Fig. 19);
and the one or more overlapping areas have a substantial mirror symmetry (Fig. 19) with respect to a plane perpendicular (plane DR2-DR3) to the respective anode (B) and intersecting the respective anode (B).
7. Claim 1-3 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Guo et al (US 2021/0288294 A1, hereafter Guo).
Regarding claim 1, Guo discloses an array substrate (Fig. 2), comprising:
a base substrate (Fig. 9 10; [0052]);
a signal line layer (Fig. 2, Fig. 9 20; [0056]) closest to an anode (Fig. 9 31; [0033], [0052]) on the base substrate (10);
an anode layer (Fig. 9 31; [0052]) on a side of the signal line layer (20) closest to the anode (31) away from the base substrate (10);
a pixel definition layer (Fig. 9 60; [0052]);
and a plurality of subpixel apertures (Fig. 2, Fig. 9 61; [0052]) extending through the pixel definition layer (60);
wherein the anode layer (31) comprises a plurality of anodes (Fig. 2, Fig. 9 31);
the signal line layer (20) closest to the anode (31) comprises a plurality of signal lines (Fig. 2, Fig. 9 20);
an orthographic projection of a portion of a respective anode (Fig. 10 31) of the plurality of anodes (Fig. 2, Fig. 9 31) in a respective subpixel aperture (61) of the plurality of subpixel apertures (Fig. 2, Fig. 9 61) on the base substrate (10) at least partially overlaps (Fig. 10) with an orthographic projection of the signal line layer (Fig. 10 20) closest to the anode (R) on the base substrate (110), forming one or more overlapping areas (Fig. 10);
and the one or more overlapping areas have a substantial mirror symmetry (Fig. 10) with respect to a plane perpendicular to the respective anode (31) and intersecting the respective anode (31).
Regarding claim 2, Guo discloses the array substrate of claim 1, wherein the signal line layer (20) closest to the anode (31) comprises a plurality of planarization enhancing blocks (Fig. 9 20; [0055], “metal 20 part provides relatively flat base”);
and an orthographic projection of a respective planarization enhancing block (20) of the plurality of planarization enhancing blocks (Fig. 2, Fig 10 20) on the base substrate (10) substantially covers (Fig. 10) an orthographic projection of at least a main anode part (Fig. 10 31) of a respective anode (31) of the plurality of anodes (Fig. 2, Fig. 10 31) on the base substrate (10).
Regarding claim 3, Guo discloses the array substrate of claim 2, wherein the orthographic projection of the main anode part (31) on the base substrate substantially overlaps (Fig. 10) with an orthographic projection of a central region of the respective planarization enhancing block (20) on the base substrate (10);
and an orthographic projection of a peripheral region (Fig. 9 20, Fig. 10 20) of the respective planarization enhancing block (20) on the base substrate (10) surrounds (Fig. 9, Fig. 10) the orthographic projection of the main anode part (31) on the base substrate (10).
Claim Rejections - 35 USC § 103
8. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
9. Claims 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over Lee as applied to claim 1 above, and further in view of Fukunaga et al (US 2001/0011868 A1, hereafter Fukunaga).
Regarding claim 12, Lee discloses the array substrate of claim 1, wherein the anode layer (Fig. 20 Anode) comprises a plurality of anodes (Fig. 18);
the signal line layer (Fig. 16) closest to the anode (Fig. 19) comprises a first signal line (annotated Fig. 19 171_1), a second signal line (annotated Fig. 19 171_2), a third signal line (annotated Fig. 19 172-e1)), and a fourth signal line (annotated Fig. 19 172-e2);
an orthographic projection of at least a main anode part (Fig. 18 Anode) of a respective anode (Fig. 18 G) of the plurality of anodes (Fig. 18) on the base substrate at least partially overlaps (Fig. 19) with an orthographic projection of the first signal line (171_1) on the base substrate (110), at least partially overlaps (Fig. 19) with an orthographic projection of the second signal line (171_2) on the base substrate (110), at least partially overlaps (Fig. 19) with an orthographic projection of the third signal line (172-e1) on the base substrate (110), and at least partially overlaps (Fig. 19) with an orthographic projection of the fourth signal line (172-e2) on the base substrate (110).
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[AltContent: textbox (For the record, annotated figure (Fig. 5A of Fukunaga) depicts a layer of signal lines (319, 502) and an anode (329) with sides (S1-4), where the orthographic projection of the signal lines overlaps with the orthographic projection of the anode.)]Lee fails to disclose the first signal line is on a first side of a central point of the main anode part of the respective anode, the second signal line is on a second side of the central point of the main anode part of the respective anode, the third signal line is on a third side of the central point of the main anode part of the respective anode, and the fourth signal line is on a fourth side of the central point of the main anode part of the respective anode;
the first side and the second side are opposite to each other;
the third side and the fourth side are opposite to each other;
the orthographic projection of the first signal line on the base substrate and the orthographic projection of the second signal line on the base substrate have a substantial mirror symmetry with respect to a plane intersecting the central point of the main anode part of the respective anode, perpendicular to the main anode part of the respective anode, and substantially parallel to a second direction;
and the orthographic projection of the third signal line on the base substrate and the orthographic projection of the fourth signal line on the base substrate have a substantial mirror symmetry with respect to a plane intersecting the central point of the main anode part of the respective anode, perpendicular to the main anode part of the respective anode, and substantially parallel to a first direction.
Fukunaga discloses a first signal line (annotated Fig. 5A 319_1) is on a first side (annotated Fig. 5A S1) of a central point of a main anode part of a respective anode (Fig. 5A 329), a second signal line (annotated Fig. 5A 319_2) is on a second side (annotated Fig. 5A S2)of the central point of the main anode part of the respective anode (329), a third signal line (annotated Fig. 5A 502_1) is on a third side (annotated Fig. 5A S3) of the central point of the main anode part of the respective anode (329), and a fourth signal line (annotated Fig. 5A 502_2) is on a fourth side (annotated Fig. 5A S4) of the central point of the main anode part of the respective anode (329);
the first side (S1) and the second side (S2) are opposite to each other (Fig. 5A);
the third side (S3) and the fourth side (S4) are opposite to each other (Fig. 5A);
an orthographic projection of the first signal line (319_1) on the base substrate (Fig. 3A 301) and an orthographic projection of the second signal line (319_2) on the base substrate (301) have a substantial mirror symmetry (Fig. 5A) with respect to a plane (annotated Fig. 5A plane DR2-DR3) intersecting the central point of the main anode part of the respective anode (329), perpendicular to the main anode part of the respective anode (329), and substantially parallel to a second direction (DR2);
and an orthographic projection of the third signal line (502_1) on the base substrate (301) and an orthographic projection of the fourth signal line (502_2) on the base substrate (301) have a substantial mirror symmetry (Fig. 5A) with respect to a plane (annotated Fig. 5A plane DR1-DR3) intersecting the central point of the main anode part of the respective anode (329), perpendicular to the main anode part of the respective anode (329), and substantially parallel to a first direction (DR1). Fukunaga is analogous to Lee in the art of light emitting devices.
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to replace the signal line arrangement of Lee with the arrangement of Fukunaga to reach a symmetrical arrangement of signal lines for providing a flat surface for the anode. Additionally, as the applicant has not specified the criticality of the arrangement of signal lines, one having ordinary skill in the art would reach the claimed arrangement as a potential arrangement for the device to function as intended.
Regarding claim 13, Lee and Fukunaga disclose the array substrate of claim 12, wherein the first signal line (Fukunaga 319_1), the second signal line (Fukunaga 319_2), the third signal line (Fukunaga 502_1), and the fourth signal line (Fukunaga 502_2) are signal lines in an interconnected voltage supply network (Fukunaga Fig. 5B) in the signal line layer (Fukunaga Fig. 5A319+502) closest to the anode (329).
Regarding claim 14, Lee and Fukunaga disclose the array substrate of claim 13, wherein the interconnected voltage supply network (Fukunaga Fig. 5B) in the signal line layer (Fukunaga 319+502) has a substantial mirror symmetry with respect to a plane (plane DR2-DR3) perpendicular to an individual anode (529), intersecting the individual anode (529), and substantially parallel to the second direction (DR2);
wherein the array substrate further comprises:
an encapsulating layer (Lee Fig. 20 550) on a side of the signal line layer (Lee Fig. 16; [0196]) away from the base substrate (Lee 110);
and a black matric (Lee Fig. 20 OPBM) and a color filter (Lee Fig. 20 230) on a side of the encapsulating layer (550) away from the signal line layer (Lee Fig. 16; [0196]).
10. Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Lee as applied to claim 15 above, and further in view of Guo.
Regarding claim 18, Lee discloses the array substrate of claim 15, wherein the anode layer (Fig. 18) further comprises a second respective anode (annotated Fig. 19 B2) and a third respective anode (annotated Fig. 19 R2);
the plurality of planarization enhancing blocks (Fig. 16 FD-SL2, Fig. 19) further comprise a second planarization enhancing block (annotated Fig. 19 FD-SL2b2) and a third planarization enhancing block (annotated Fig. 19 FD-SL2r2);
the plurality of subpixel apertures (Fig. 18 OP, Fig. 19) further comprises a second subpixel aperture (annotated Fig. 19 OPb2) and a third subpixel aperture (annotated Fig. 19 OPr2);
a second main anode part (annotated Fig. 19 Anode_b2) of the second respective anode (B2) is in contact with organic materials (Fig. 20 183; [0196]) through the second subpixel aperture (OPb2);
an orthographic projection of the second planarization enhancing block (FD-SL2b2) on the base substrate (110) completely covers (Fig. 19) an orthographic projection of the second subpixel aperture (OPb2) on the base substrate (110), and completely covers an orthographic projection of the second main anode part on the base substrate;
a third main anode part (annotated Fig. 19 Anode_r2) of the third respective anode (R2) is in contact with organic materials (Fig. 20 183; [0196]) through the third subpixel aperture (OPr2);
an orthographic projection of the third planarization enhancing block (FD-SL2r2) on the base substrate (110) completely covers (Fig. 19) an orthographic projection of the third subpixel aperture (OPr2) on the base substrate (110), and partially overlaps (Fig. 19) with an orthographic projection of the third main anode part (Anode_r2) on the base substrate (110);
the third main anode part comprises a corner portion (Fig. 18 Anode-e of R) on a first side (annotated Fig. 19 S3 of R2) of the third subpixel aperture (OPr2) and a main portion (Anode_b2) connected to the corner portion (Anode-e of R);
the orthographic projection of the third planarization enhancing block (FD-SLr2) on the base substrate (110) is non-overlapping (Fig. 19) with an orthographic projection of the corner portion (Anode-e of R) on the base substrate (110).
the corner portion has a substantial mirror symmetry (Fig. 19) with respect to a plane perpendicular (plane DR2-DR3) to the third main anode part (Anode_r2), intersecting the third main anode part (Anode_r2), and substantially parallel to a second direction (DR2);
and the main portion (Anode_r2) has a substantial mirror symmetry (Fig. 19) with respect to a plane perpendicular (plane DR2-DR3) to the third main anode part (Anode_r2), intersecting the third main anode part (Anode_r2), and substantially parallel to the second direction (DR2).
Lee fails to disclose an orthographic projection of the second planarization enhancing block on the base substrate completely covers an orthographic projection of the second main anode part on the base substrate, and the orthographic projection of the third planarization enhancing block on the base substrate completely covers an orthographic projection of the main portion on the base substrate.
Guo discloses disclose an orthographic projection of the second planarization enhancing block (Fig. 2, Fig. 11 20) on the base substrate (10) completely covers (Fig. 11; [0035]) an orthographic projection of the second main anode part (Fig. 2, Fig. 11 31) on the base substrate (10), and the orthographic projection of the third planarization enhancing block (Fig. 2, Fig. 11 20) on the base substrate completely covers (Fig. 11; [0035]) an orthographic projection of the main portion of the third main anode part (Fig. 2, Fig. 11 31) on the base substrate (10). Guo is analogous to Lee in the field of light emitting devices.
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to substitute the planarization enhancing blocks of Lee with the planarization enhancing blocks of Guo to provide a relatively flat base for the anode, as disclosed by Guo ([0035]), to make the anode flat and prevent reflected light from spreading asymmetrically, as discussed by Lee ([0028]).
Conclusion
11. The following prior art made of record and not relied upon is considered pertinent to applicant’s disclosure.
Hosokawa (US 2002/0011783 A1) discloses a signal line layer with a mesh-like structure for a light emitting device.
Li et al (CN 113078196 A) discloses a display device with symmetrically distributed signal lines under a plurality of electrodes
Yu et al (CN 115398638 A) discloses a display device with an interconnected voltage supply network
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/MICHAEL B SUN/Examiner, Art Unit 2892
/NORMAN D RICHARDS/Supervisory Patent Examiner, Art Unit 2892
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