DETAILED ACTION
This action is responsive to the response filed 15 Mar 2024 and the two filed Information Disclosure Statements. Claims 26-50 are pending. Claims 26 and 47 are independent.
Notice of AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Notice of Foreign Priority Claim
Acknowledgment is made of applicant’s claim for foreign priority. Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 15 Mar 2024 and 8 Apr 2024 are acknowledged. The submissions are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements have been considered by the examiner.
Application Title
In accordance with MPEP 606.01 and MPEP 1302.04(a) to improve the descriptive nature of the application. The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The final title may require more information than this proposed title based on amendments. The following title is suggested:
“MAPPING AND CONTROLLING COMPUTER MEMORY ACCESS BASED ON COINCIDENCES IN ACTIVATION”
Examiner Note
The present application has used several non-standard limitations which have been interpreted in view of applicant’s specification. In this office action:
“Activation Threshold has been interpreted as “a single address decoder element” which could be a row identifier or column identifier for a memory location. See applicant’s paragraph [0024] “The activation threshold may be specific to a single address decoder element or may alternatively apply to two or more address decoder elements.”
“Conditional activation” has been interpreted as either “a first row of the memory lattice” or a first column of the memory array/ lattice. See applicant’s paragraph [0036] “The feature vector 310… depending on the input address connection characteristics such as weights and polarities and to compare the evaluated function with a activation threshold to conditionally activate the address decoder element, such as the address decoder element 222 of the first row of the memory lattice in FIG. 2.”
“Coincidences in activation” has been interpreted as any grouping of data. See applicant’s paragraph [0019]: The storage locations according to the computer memory of the present technique may be arranged in any geometrical configuration and in any number of dimensions provided that the storage locations are written to and read from depending in coincidences in activations of two or more different address decoder elements.
Applicant is invited to further narrow these terms as desired in subsequent amendments.
Claim Rejections - 35 USC § 112(a)
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
Claims 28 and 29 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for pre-AIA the inventor(s), at the time the application was filed, had possession of the claimed invention.
The limitation “longevity” in the specification is not described in such a manner that “one skilled in the relevant art” could distinguish “longevity” from the limitation “weight”. Examiner apologizes in advance, but after reading the specification multiple times, the examiner could not logically describe the difference between a “longevity” and a “weight” in the claims.
From applicant’s specification paragraph [0031]: The input address connection also has at least one further characteristic to be applied to the connected input sample such as a weight, a polarity and a longevity. [0032] The longevities may be dynamically adapted as input data is processed by the memory lattice. … Input address connection longevities, if present, may be initially set to default values for all input address connections and may be adjusted incrementally depending on address decoder activation events… and [0033] A longevity threshold may be set such that, for example, if a given input address connection longevity falls below the longevity threshold value then the input address connection may be discarded and replaced by an input address connection to a different sample of the input data such as a different pixel position in an image or a different element in a one dimensional vector containing the input data entity. This provides a mechanism via which to evolve the memory lattice. And [0048] Furthermore, the input address connection characteristics such as the pixel positions or input vector elements that input address connection clusters of each address decoder element are mapped to and also input address connection longevities and polarities can be dynamically adapted at least during a training phase to home in on features of the input data most likely to provide a good sparse sample for distinguishing between different classes.
Claim Rejections - 35 USC § 112(b)
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claim(s) 27 and 47 is/are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claims 26, 42 and 47 clearly recite the limitation, “an activation threshold” which is not indefinite. However the use of “activation threshold” complicates the multiple uses of the limitation “a threshold…” in claim 27.
Claim 27 recites the limitation, “a threshold characteristic”, “a threshold applying globally…”, and “a threshold having partial contributions”. It is indefinite as to whether these three new thresholds in claim 27 are different from or the same as the “activation threshold” of claim 26. It is further indefinite as to whether or no these threshold are different thresholds from one another.
Claim 47 is rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which applicant regards as the invention. For reference, see MPEP 2173.05(p)II regarding a “single claim which claims both an apparatus and the method steps of using the apparatus is indefinite under 35 U.S.C. 112(b)…”.
Claim(s) 47 states, “wherein decoding by a given one of the plurality of address decoder elements serves to conditionally activate” and also “wherein memory access operations to one of the plurality of storage locations are controlled by two or more distinct ones of the plurality of address decoder elements”, or words to that effect which involve the application of voltages to the device. The method steps listed in these claims render the claims indefinite as stated above.
The “apparatus” of claim 47 could be “configured to…” perform these method steps, but as written the claim is indefinite.
Claim Rejections – 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless —
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claims 26 – 28, 37, 42, and 46 – 50 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Hoang, et al, U.S. Patent Application Publication 2021/0342676 (“Hoang”).
Regarding claim 26, Hoang teaches:
(New) A method for accessing data in a computer memory having a plurality of storage locations, the method comprising: (Hoang, fig 5, “[0037] In one embodiment, memory structure 326 comprises a three dimensional memory array of non-volatile memory cells in which multiple memory levels are formed above a single substrate,”; a memory device with multiple memory cells).
mapping two or more different address decoder elements to a storage location in the computer memory, each address decoder element having one or more input address connection(s) to receive value(s) from a respective one or more data elements of an input data entity; (Hoang, fig 5, “[0033] FIG. 5 is a functional block diagram of one embodiment of a memory die 300. In one embodiment, each memory die 300 includes a memory structure 326, control circuitry 310, and read/write circuits 328. Memory structure 126 is addressable by word lines via a row decoder 324 and by bit lines via a column decoder 332.”; a memory device with multiple memory cells).
decoding by each of the mapped address decoder elements to conditionally activate the address decoder element depending on a function of the received values from the corresponding one or more input address connections and further depending on an activation threshold; and (Hoang, fig 1, 5, “[0026] Controller 102 comprises a Front End Processor (FEP) circuit 110 and one or more Back End Processor (BEP) circuits 112. [0030] FEP circuit 110 can also include a Flash Translation Layer (FTL) or, more generally, a Media Management Layer (MML) 158 that performs memory management (e.g., garbage collection, wear leveling, load balancing, etc.), logical to physical address translation,”; a FEP that translates instructions to access memory from a logical to physical address, the physical address comprising at least two elements: a row and column; as stated in Examiner’s Notes above, the “activation threshold” has been interpreted as a single address decoder element; here Hoang selects data using row and column addresses).
controlling memory access operations to a given storage location depending on coincidences in activation, as a result of the decoding, of the two or more distinct address decoder elements mapped to the given storage location. (Hoang, fig 13, “[0061] Turning now to types of data that can be stored on non-volatile memory devices, a particular example of the type of data of interest in the following discussion is the weights used is in artificial neural networks, … Convolutional networks are neural networks that use convolution in place of general matrix multiplication in at least one of their layers. [0069] FIG. 13 is a schematic representation of a convolution operation between an input image and filter, or set of weights. In this example, the input image is a 6x6 array of pixel values and the filter is a 3x3 array of weights.”; that a matrix of data can be accessed using the row/ column decoders to perform matrix multiplication on data stored in an input image array; as stated above, “coincidences in activation” can broadly be interpreted to access “any geometrical configuration” of data, here Hoang selects a 6x6 matrix).
Regarding claim 27, Hoang teaches:
(New) The method of claim 26, wherein the threshold upon which the conditional activation of the given address decoder element depends is one of: a threshold characteristic to the given address decoder element; (Hoang, fig 1, 5, “[0026] Controller 102 comprises a Front End Processor (FEP) circuit 110 and one or more Back End Processor (BEP) circuits 112. [0030] FEP circuit 110 can also include a Flash Translation Layer (FTL) or, more generally, a Media Management Layer (MML) 158 that performs memory management (e.g., garbage collection, wear leveling, load balancing, etc.), logical to physical address translation,”; a FEP that translates instructions to access memory from a logical to physical address, the physical address comprising at least two elements: a row and column; as stated in Examiner’s Notes above, the “activation threshold” has been interpreted as a single address decoder element; here Hoang selects data using a given row and column addresses).
a threshold applying globally to a given address decoder comprising a plurality of the address decoder elements; and a threshold having partial contributions from different ones of the plurality of input address connections. (Hoang, fig 13, “[0061] Turning now to types of data that can be stored on non-volatile memory devices, a particular example of the type of data of interest in the following discussion is the weights used is in artificial neural networks, … Convolutional networks are neural networks that use convolution in place of general matrix multiplication in at least one of their layers. [0069] FIG. 13 is a schematic representation of a convolution operation between an input image and filter, or set of weights. In this example, the input image is a 6x6 array of pixel values and the filter is a 3x3 array of weights.”; that a matrix of data can be accessed using the row/ column decoders to perform matrix multiplication on data stored in an input image array; as stated above, “coincidences in activation” can broadly be interpreted to access “any geometrical configuration” of data, here Hoang selects a 6x6 matrix or a plurality of addresses).
Regarding claim 28, Hoang teaches (New) The method of claim 26, wherein each of at least a subset of the plurality of input address connections has at least one connection characteristic to be applied to the corresponding data element of the input data entity as part of the conditional activation of the given address decoder element and wherein the at least one input address connection characteristic comprises one or more of: a weight, a longevity and a polarity. (Hoang, fig 13, 14, “[0070] FIG. 14 is a schematic representation of the use of matrix multiplication in a fully connected layer of a neural network. … The input data is represented as a vector of a length corresponding to the number of input nodes. The weights are represented in a weight matrix,”; that “coincidences” (a matrix) can correspond to a “conditional activation” (a matrix of weights). See applicant’s (i.e. 0041) where connection characteristics can be weights).
Regarding claim 37, Hoang teaches:
(New) The method of claim 26, comprising two different address decoders and (Hoang, fig 5, “[0037] In one embodiment, memory structure 326 comprises a three dimensional memory array of non-volatile memory cells in which multiple memory levels are formed above a single substrate,”; a memory device with multiple memory cells and at least two decoders).
wherein a first number of data elements, ND1, of the input address connections supplied to each of the plurality of address decoder elements of a first one of the two address decoders is a different from a second number of input address connections, ND2, supplied to each of the plurality of address decoder elements of a second, different one of the two different address decoders. (Hoang, fig 5, “[0033] FIG. 5 is a functional block diagram of one embodiment of a memory die 300. In one embodiment, each memory die 300 includes a memory structure 326, control circuitry 310, and read/write circuits 328. Memory structure 126 is addressable by word lines via a row decoder 324 and by bit lines via a column decoder 332.”; a memory device with multiple memory cells; the two decoders are for rows and columns).
Regarding claim 42, Hoang teaches:
(New) The method of claim 26, wherein the input data entity is drawn from a training data set and (Hoang, fig 1, 5, “[0066] A supervised artificial neural network is “trained” by supplying inputs and then checking and correcting the outputs. For example, a neural network that is trained to recognize dog breeds will process a set of images and calculate the probability that the dog in an image is a certain breed.”; that training data from dog breeds can be used to determine weights in a neural network).
wherein the activation threshold(s) of the address decoder elements of the one or more address decoder are dynamically adapted during a training phase to achieve a target address decoder element activation rate. (Hoang, fig 1, 5, “[0026] Controller 102 comprises a Front End Processor (FEP) circuit 110 and one or more Back End Processor (BEP) circuits 112. [0030] FEP circuit 110 can also include a Flash Translation Layer (FTL) or, more generally, a Media Management Layer (MML) 158 that performs memory management (e.g., garbage collection, wear leveling, load balancing, etc.), logical to physical address translation,”; a FEP that translates instructions to access memory from a logical to physical address, the physical address comprising at least two elements: a row and column; as stated in Examiner’s Notes above, the “activation threshold” has been interpreted as a single address decoder element; here Hoang selects data using row and column addresses).
Regarding claim 46, Hoang teaches (New) A machine-readable instructions provided on a non-transitory machine-readable medium, the instructions for processing to implement the method of claim 26, wherein the machine-readable medium is a storage medium or a transmission medium. (Hoang, fig 3, “[0031] FIG. 3 shows a PCie Interface 200 for communicating with the FEP circuit 110 (e.g., communicating with one of PCie Interfaces 164 and 166 of FIG. 2). … Each NOC (202/204) is connected to SRAM (230/260), a buffer (232/262), processor (220/250), and a data path controller (222/252). [0034] In one embodiment, state machine 312 is programmable by software. In one embodiment, control circuitry 310 includes buffers such as registers, ROM fuses and other storage devices for storing default values such as base voltages and other parameters.”; a computer driven system with ROM (non-transitory storage) driven by software or hardware).
Regarding claim 47, Hoang teaches:
(New) A computer memory apparatus, comprising: a plurality of storage locations; and (Hoang, fig 5, “[0037] In one embodiment, memory structure 326 comprises a three dimensional memory array of non-volatile memory cells in which multiple memory levels are formed above a single substrate,”; a memory device with multiple memory cells).
a plurality of address decoder elements, each having a one or more input address connections for mapping to a respective one or more data elements of an input data entity; (Hoang, fig 5, “[0033] FIG. 5 is a functional block diagram of one embodiment of a memory die 300. In one embodiment, each memory die 300 includes a memory structure 326, control circuitry 310, and read/write circuits 328. Memory structure 126 is addressable by word lines via a row decoder 324 and by bit lines via a column decoder 332.”; a memory device with multiple memory cells).
wherein decoding by a given one of the plurality of address decoder elements serves to conditionally activate the address decoder element depending on a function of values of the one or more data elements of the input data entity mapped to the one or more input address connection(s) and further depending on an activation threshold; and (Hoang, fig 1, 5, “[0026] Controller 102 comprises a Front End Processor (FEP) circuit 110 and one or more Back End Processor (BEP) circuits 112. [0030] FEP circuit 110 can also include a Flash Translation Layer (FTL) or, more generally, a Media Management Layer (MML) 158 that performs memory management (e.g., garbage collection, wear leveling, load balancing, etc.), logical to physical address translation,”; a FEP that translates instructions to access memory from a logical to physical address, the physical address comprising at least two elements: a row and column; as stated in Examiner’s Notes above, the “activation threshold” has been interpreted as a single address decoder element; here Hoang selects data using row and column addresses).
wherein memory access operations to one of the plurality of storage locations are controlled by two or more distinct ones of the plurality of address decoder elements depending on coincidences in activation of the two or more distinct address decoder elements as a result of the decoding. (Hoang, fig 13, “[0061] Turning now to types of data that can be stored on non-volatile memory devices, a particular example of the type of data of interest in the following discussion is the weights used is in artificial neural networks, … Convolutional networks are neural networks that use convolution in place of general matrix multiplication in at least one of their layers. [0069] FIG. 13 is a schematic representation of a convolution operation between an input image and filter, or set of weights. In this example, the input image is a 6x6 array of pixel values and the filter is a 3x3 array of weights.”; that a matrix of data can be accessed using the row/ column decoders to perform matrix multiplication on data stored in an input image array; as stated above, “coincidences in activation” can broadly be interpreted to access “any geometrical configuration” of data, here Hoang selects a 6x6 matrix).
Regarding claim 48, Hoang teaches (New) A pre-trained machine learning model using the method of claim 26, wherein a computer memory implementing the pre-trained machine learning model is populated by coincidences activated by a set of training data. (Hoang, fig 12, “[0066] For example, a neural network that is trained to recognize dog breeds will process a set of images and calculate the probability that the dog in an image is a certain breed. A user can review the results and select which probabilities the network should display (above a certain threshold, etc.) and return the proposed label. . [0067] FIG. 12A is a flowchart … Once the neural network’s set of weights have been determined, they can be used to “inference,” which is the process of using the determined weights to generate an output result from data input into the neural network. Once the weights are determined at step 1211, they can then be stored in non-volatile memory for later use,”; that a system can be trained on a set of training data; the neural weights can be stored in appropriate matrices for later use).
Regarding claim 49, Hoang teaches:
(New) The pre-trained machine-learning model of claim 48, wherein one or more memory entries indicating a coincidence at the corresponding storage location is deleted from the computer memory when the pre-trained machine learning model is performing inference and (Hoang, fig 12, 13, “[0067] In the dog breed example of the preceding paragraph, the input would be the image data of a number of dogs, and the intermediate layers use the current weight values to calculate the probability that the dog in an image is a certain breed, with the proposed dog breed label returned at step 1205. A user can then review the results at step 1207 to select which probabilities the neural network should return and decide whether the current set of weights supply a sufficiently accurate labelling and, if so, the training is complete (step 1211).”; that training includes steps to verify the inferences drawn, in this case whether the dogs are correctly classified into breeds).
wherein optionally the one or more memory entries deleted from the computer memory during the inference is selected probabilistically. (Hoang, fig 12, 13, “[0067] If the result is not sufficiently accurate, the neural network adjusts the weights at step 1209 based on the probabilities the user selected, followed by looping back to step 1203 to run the input data again with the adjusted weights…. Once the weights are determined at step 1211, they can then be stored in non-volatile memory for later use,”; that dogs incorrectly identified can be “reprocessed”, or looped, back to step 1203, that the newer results, if deemed more accurate can be stored).
Regarding claim 50, Hoang teaches (New) A non-transitory machine-readable medium comprising a data set representing a design for implementing in a computer memory, a machine learning model pre-trained using the method of claim 26, the data set comprising a set of characteristic values for setting up a plurality of address decoder elements of the computer memory and a set of address decoder First Preliminary Amendment element coincidences previously activated by a training data set and corresponding storage locations of the coincident activations for populating the computer memory. (Hoang, fig 12, 13, “[0066] A supervised artificial neural network is “trained” by supplying inputs and then checking and correcting the outputs. For example, a neural network that is trained to recognize dog breeds will process a set of images and calculate the probability that the dog in an image is a certain breed. [0067] Once the weights are determined at step 1211, they can then be stored in non-volatile memory for later use, [0068] For example, on a host processor executing the neural network, the weight could be read out of an SSD in which they are stored and loaded into RAM on the host device. [0069] In this example, the input image is a 6x6 array of pixel values and the filter is a 3x3 array of weights. The convolution operation is performed by a matrix multiplication the 3x3 filter with 3x3 blocks of the input image. For example, the multiplication of the upper-left most 3x3 block of the image with the filter results in the top left value of the output matrix…. Similar operations are performed for each of the layers.”; that trained data can be stored in an Solid State Drive, brought into SRAM for quicker calculations, that the outputs can be determined using the convolution matrix of fig 13, and the output matrix likewise be stored after calculations are performed).
Claim Rejections – 35 USC § 103
The following is a quotation of 35 U.S.C. 103, which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claims 29 – 36, 39, and 43 – 45 are rejected under 35 U.S.C. 103 as being unpatentable over Hoang in view of Dillon, et al, U.S. Patent 12,592,096 (“Dillon”).
Regarding claim 29, Hoang teaches (New) The method of claim 28.
Hoang does not explicitly teach:
wherein the at least one connection characteristic comprises a longevity and
wherein the longevity of the one or more input address connections of the given address decoder element are dynamically adapted during a training phase of the computer memory to change depending on relative contributions of the data elements of the input data entity drawn from the corresponding input address connection..
Dillon teaches:
wherein the at least one connection characteristic comprises a longevity and (Dillon, fig 6D, “[34: line 28] Time series of values of the data regarding the features 640, 642, 644, 646, 648 may be provided to the machine learning system 615 as inputs,”; that time series of data regarding hand gestures can be taken by camera and stored).
wherein the longevity of the one or more input address connections of the given address decoder element are dynamically adapted during a training phase of the computer memory to change depending on relative contributions of the data elements of the input data entity drawn from the corresponding input address connection. (Dillon, fig 6D, “[34: line 17] For example, the machine learning system 615 may be configured to generate one or more outputs, including an output indicating whether an event has occurred, an output identifying the event ( e.g., as neither a taking nor a return of an item), an output identifying an item involved in the event. [34: line 45] The training of the machine learning system 615 may occur for any number of iterations, or until the machine learning system 615 associates the data regarding one or more of the features 640, 642, 644, 646, 648 with neither a taking event nor a return event, with the actor 680, or with the location of the event, to a sufficiently high level of confidence.”; that time series of data can be collected on multiple events (hands, shoulders, proximity to shelf) as input vectors, that the system can learn which inputs are associated with a taking, returning, or not-taking type of event).
In view of the teachings of Dillon it would have been obvious for a person of ordinary skill in the art to apply the teachings of Dillon to Hoang before the effective filing date of the claimed invention in order to teach accessing memory. The teachings of Dillon, in the same or in a similar field of endeavor with Hoang, can combine Dillon’s combination of time and gestures in memory matrices with Hoang’s use of images in memory matrices to “train” systems. The simpler image and more complex, timed sequences merely perform the same functions as they perform separately and being no more “the combining of prior art elements according to known methods to yield predictable results” (KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)).
Regarding claim 30, Hoang teaches (New) The method of claim 28.
Hoang does not explicitly teach:
wherein when the input data entity is at least a portion of a time series of input data and
wherein a connection characteristic comprising a time delay is applied to at least one of the plurality of input address connections of the given address decoder element to make different ones of samples of the time series corresponding to different capture times arrive simultaneously in the address decoder element for evaluation of the conditional activation..
Dillon teaches:
wherein when the input data entity is at least a portion of a time series of input data and (Dillon, fig 6D, “[34: line 28] Time series of values of the data regarding the features 640, 642, 644, 646, 648 may be provided to the machine learning system 615 as inputs,”; that time series of data regarding hand gestures can be taken by camera and stored).
wherein a connection characteristic comprising a time delay is applied to at least one of the plurality of input address connections of the given address decoder element to make different ones of samples of the time series corresponding to different capture times arrive simultaneously in the address decoder element for evaluation of the conditional activation. (Dillon, fig 6D, “[34: line 17] For example, the machine learning system 615 may be configured to generate one or more outputs, including an output indicating whether an event has occurred, an output identifying the event ( e.g., as neither a taking nor a return of an item), an output identifying an item involved in the event. [34: line 45] The training of the machine learning system 615 may occur for any number of iterations, or until the machine learning system 615 associates the data regarding one or more of the features 640, 642, 644, 646, 648 with neither a taking event nor a return event, with the actor 680, or with the location of the event, to a sufficiently high level of confidence.”; that time series of data can be collected on multiple events (hands, shoulders, proximity to shelf) as input vectors, that the system can learn which inputs are associated with a taking, returning, or not-taking type of event).
In view of the teachings of Dillon it would have been obvious for a person of ordinary skill in the art to apply the teachings of Dillon to Hoang before the effective filing date of the claimed invention in order to teach accessing memory. The teachings of Dillon, in the same or in a similar field of endeavor with Hoang, can combine Dillon’s combination of time and gestures in memory matrices with Hoang’s use of images in memory matrices to “train” systems. The simpler image and more complex, timed sequences merely perform the same functions as they perform separately and being no more “the combining of prior art elements according to known methods to yield predictable results” (KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)).
Regarding claim 31, Hoang teaches (New) The method of claim 26.
Hoang does not explicitly teach:
wherein the plurality of storage locations are arranged in a d-dimensional lattice structure and
wherein a number of lattice nodes of a memory lattice in an i-th dimension of the d dimensions, where i is an integer ranging from 1 through to d, is equal to a number of address decoder elements in an address decoder corresponding to the i-th lattice dimension..
Dillon teaches:
wherein the plurality of storage locations are arranged in a d-dimensional lattice structure and (Dillon, fig 6D, “[34: line 28] Time series of values of the data regarding the features 640, 642, 644, 646, 648 may be provided to the machine learning system 615 as inputs,”; that time series of data regarding hand gestures can be taken by camera and stored; Dillon uses at least 5 features with at least 4 times to train the system).
wherein a number of lattice nodes of a memory lattice in an i-th dimension of the d dimensions, where i is an integer ranging from 1 through to d, is equal to a number of address decoder elements in an address decoder corresponding to the i-th lattice dimension. (Dillon, fig 6D, “[34: line 17] For example, the machine learning system 615 may be configured to generate one or more outputs, including an output indicating whether an event has occurred, an output identifying the event ( e.g., as neither a taking nor a return of an item), an output identifying an item involved in the event. [34: line 45] The training of the machine learning system 615 may occur for any number of iterations, or until the machine learning system 615 associates the data regarding one or more of the features 640, 642, 644, 646, 648 with neither a taking event nor a return event, with the actor 680, or with the location of the event, to a sufficiently high level of confidence.”; that time series of data can be collected on multiple events (hands, shoulders, proximity to shelf) as input vectors, that the system can learn which inputs are associated with a taking, returning, or not-taking type of event).
In view of the teachings of Dillon it would have been obvious for a person of ordinary skill in the art to apply the teachings of Dillon to Hoang before the effective filing date of the claimed invention in order to teach accessing memory. The teachings of Dillon, in the same or in a similar field of endeavor with Hoang, can combine Dillon’s combination of time and gestures in memory matrices with Hoang’s use of images in memory matrices to “train” systems. The simpler image and more complex, timed sequences merely perform the same functions as they perform separately and being no more “the combining of prior art elements according to known methods to yield predictable results” (KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)).
Regarding claim 32, Hoang teaches (New) The method of claim 26.
Hoang does not explicitly teach:
wherein the input data entity corresponds to one of a plurality of distinct information classes and
wherein the computer memory is arranged to store class-specific information indicating coincident activations at one or more of the plurality of storage locations by performing decoding of a training data set..
Dillon teaches:
wherein the input data entity corresponds to one of a plurality of distinct information classes and (Dillon, fig 6D, “[34: line 28] Time series of values of the data regarding the features 640, 642, 644, 646, 648 may be provided to the machine learning system 615 as inputs,”; that time series of data regarding hand gestures can be taken by camera and stored; Dillon uses at least 5 features with at least 4 times to train the system).
wherein the computer memory is arranged to store class-specific information indicating coincident activations at one or more of the plurality of storage locations by performing decoding of a training data set. (Dillon, fig 6D, “[34: line 17] For example, the machine learning system 615 may be configured to generate one or more outputs, including an output indicating whether an event has occurred, an output identifying the event ( e.g., as neither a taking nor a return of an item), an output identifying an item involved in the event. [34: line 45] The training of the machine learning system 615 may occur for any number of iterations, or until the machine learning system 615 associates the data regarding one or more of the features 640, 642, 644, 646, 648 with neither a taking event nor a return event, with the actor 680, or with the location of the event, to a sufficiently high level of confidence.”; that time series of data can be collected on multiple events (hands, shoulders, proximity to shelf) as input vectors, that the system can learn which inputs are associated with a taking, returning, or not-taking type of event; the results of the events are then stored in memory).
In view of the teachings of Dillon it would have been obvious for a person of ordinary skill in the art to apply the teachings of Dillon to Hoang before the effective filing date of the claimed invention in order to teach accessing memory. The teachings of Dillon, in the same or in a similar field of endeavor with Hoang, can combine Dillon’s combination of time and gestures in memory matrices with Hoang’s use of images in memory matrices to “train” systems. The simpler image and more complex, timed sequences merely perform the same functions as they perform separately and being no more “the combining of prior art elements according to known methods to yield predictable results” (KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)).
Regarding claim 33, Hoang, as modified by Dillon, teaches (New) The method of claim 32.
Dillon further teaches wherein at least one of the plurality of storage locations has a depth greater than or equal to a total number of the distinct information classes and (Dillon, fig 6D, “[34: line 28] Time series of values of the data regarding the features 640, 642, 644, 646, 648 may be provided to the machine learning system 615 as inputs,”; that time series of data regarding hand gestures can be taken by camera and stored; Dillon uses at least 5 features (i.e. claimed information classes) with at least 4 times to train the system).
Regarding claim 34, Hoang, as modified by Dillon, teaches (New) The method of claim 33.
Dillon further teaches wherein a count of information indicating coincidences in activation stored in class-specific depth locations of the computer memory provides a class prediction in a machine learning inference process. (Dillon, fig 6D, “[34: line 17] For example, the machine learning system 615 may be configured to generate one or more outputs, including an output indicating whether an event has occurred, an output identifying the event ( e.g., as neither a taking nor a return of an item), an output identifying an item involved in the event. [34: line 45] The training of the machine learning system 615 may occur for any number of iterations, or until the machine learning system 615 associates the data regarding one or more of the features 640, 642, 644, 646, 648 with neither a taking event nor a return event, with the actor 680, or with the location of the event, to a sufficiently high level of confidence.”; that time series of data can be collected on multiple events (hands, shoulders, proximity to shelf) as input vectors, that the system can learn which inputs are associated with a taking, returning, or not-taking type of event; the results of the events are then stored in memory; that the results can be collected and stored in the matrix of figure 6D).
In view of the teachings of Dillon it would have been obvious for a person of ordinary skill in the art to apply the teachings of Dillon to Hoang before the effective filing date of the claimed invention in order to teach accessing memory. The teachings of Dillon, in the same or in a similar field of endeavor with Hoang, can combine Dillon’s combination of time and gestures in memory matrices with Hoang’s use of images in memory matrices to “train” systems. The simpler image and more complex, timed sequences merely perform the same functions as they perform separately and being no more “the combining of prior art elements according to known methods to yield predictable results” (KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)).
Regarding claim 35, Hoang, as modified by Dillon, teaches (New) The method of claim 34.
Dillon further teaches wherein the class prediction is one of: a class corresponding to a class-specific depth location in the memory having maximum count of coincidences in activation; (Dillon, fig 6D, “[34: line 28] Time series of values of the data regarding the features 640, 642, 644, 646, 648 may be provided to the machine learning system 615 as inputs,”; that time series of data regarding hand gestures can be taken by camera and stored; Dillon uses at least 5 features (i.e. claimed information classes) with at least 4 times to train the system).
Regarding claim 36, Hoang teaches (New) The method of claim 26.
Hoang does not explicitly teach:
wherein data indicating occurrences of the coincidences in the activations of the two or more distinct address decoder elements are stored in the storage locations in the computer memory whose access is controlled by those two or more distinct address decoder elements in which the coincident activations occurred and
wherein the storage of the data indicating the occurrences of the coincidences is performed one of: invariably; conditionally depending on a global probability; or conditionally depending on a class-dependent probability..
Dillon teaches:
wherein data indicating occurrences of the coincidences in the activations of the two or more distinct address decoder elements are stored in the storage locations in the computer memory whose access is controlled by those two or more distinct address decoder elements in which the coincident activations occurred and (Dillon, fig 6D, “[34: 17] For example, the machine learning system 615 may be configured to generate one or more outputs, including an output indicating whether an event has occurred, an output identifying the event ( e.g., as neither a taking nor a return of an item), an output identifying an item involved in the event. [34: line 45] The training of the machine learning system 615 may occur for any number of iterations, or until the machine learning system 615 associates the data regarding one or more of the features 640, 642, 644, 646, 648 with neither a taking event nor a return event, with the actor 680, or with the location of the event, to a sufficiently high level of confidence.”; that time series of data can be collected on multiple events (hands, shoulders, proximity to shelf) as input vectors, that the system can learn which inputs are associated with a taking, returning, or not-taking type of event; the results of the events are then stored in memory; that the results can be collected and stored in the matrix of figure 6D).
wherein the storage of the data indicating the occurrences of the coincidences is performed one of: invariably; conditionally depending on a global probability; or conditionally depending on a class-dependent probability. (Dillon, fig 6D, “[37: line 28] If the confidence level or confidence score falls below a predetermined threshold or limit, the output may also be used to identify one or more supplemental features for which data that, if provided as inputs along with the baseline features data, would enhance a probability or likelihood that an event may be identified as associated with the actor.”; that time series data of particular actions (hands, shoulders) need augmentation, the system can increase the number of inputs to increase the likelihood of correct identification).
In view of the teachings of Dillon it would have been obvious for a person of ordinary skill in the art to apply the teachings of Dillon to Hoang before the effective filing date of the claimed invention in order to teach accessing memory. The teachings of Dillon, in the same or in a similar field of endeavor with Hoang, can combine Dillon’s combination of time and gestures in memory matrices with Hoang’s use of images in memory matrices to “train” systems. The simpler image and more complex, timed sequences merely perform the same functions as they perform separately and being no more “the combining of prior art elements according to known methods to yield predictable results” (KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)).
Regarding claim 39, Hoang teaches (New) The method of claim 26.
Hoang teaches wherein the input address connections are set using at least one of: a probability distribution associated with an input data set including the input data entity; (Hoang, fig 1, 5, “[0066] For example, a neural network that is trained to recognize dog breeds will process a set of images and calculate the probability that the dog in an image is a certain breed.”; that data can be clustered using probabilities to distinguish between particular characteristics like a dog breed).
Hoang does not explicitly teach clustering characteristics of the input data set; a spatial locality of samples of the input data set; and a temporal locality of samples of the input data set..
Dillon teaches clustering characteristics of the input data set; a spatial locality of samples of the input data set; and a temporal locality of samples of the input data set. (Dillon, fig 6D, “[34: line 17] For example, the machine learning system 615 may be configured to generate one or more outputs, including an output indicating whether an event has occurred, an output identifying the event ( e.g., as neither a taking nor a return of an item), an output identifying an item involved in the event. [34: line 45] The training of the machine learning system 615 may occur for any number of iterations, or until the machine learning system 615 associates the data regarding one or more of the features 640, 642, 644, 646, 648 with neither a taking event nor a return event, with the actor 680, or with the location of the event, to a sufficiently high level of confidence.”; that time series of data can be collected on multiple events (hands, shoulders, proximity to shelf) as input vectors, that the system can learn which inputs can be clustered with a taking, returning, or not-taking type of event; the results of the events are then stored in memory; that the results can be collected and stored in the matrix of figure 6D).
In view of the teachings of Dillon it would have been obvious for a person of ordinary skill in the art to apply the teachings of Dillon to Hoang before the effective filing date of the claimed invention in order to teach accessing memory. The teachings of Dillon, in the same or in a similar field of endeavor with Hoang, can combine Dillon’s combination of time and gestures in memory matrices with Hoang’s use of images in memory matrices to “train” systems. The simpler image and more complex, timed sequences merely perform the same functions as they perform separately and being no more “the combining of prior art elements according to known methods to yield predictable results” (KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)).
Regarding claim 43, Hoang teaches (New) The method of claim 26.
Hoang teaches wherein the input data entity comprises at least one of: sensor data, audio data; image data; (Hoang, fig 1, 5, “[0063] FIG. 10 is a schematic representation of an example of a CNN. Starting from an input image of an array of pixel values, followed by a number convolutional layers, that are in tum followed by a number of fully connected layers, [0066] A supervised artificial neural network is “trained” by supplying inputs and then checking and correcting the outputs. For example, a neural network that is trained to recognize dog breeds will process a set of images and calculate the probability that the dog in an image is a certain breed.”; that image data can be input of an array of pixel values; that the input data can be training data, such as a training set to recognize dog breeds).
Hoang does not explicitly teach video data; machine diagnostic data; biological data from a human, a plant or an animal; medical data from a human or animal; and technical data of a vehicle..
Dillon teaches video data; machine diagnostic data; biological data from a human, a plant or an animal; medical data from a human or animal; and technical data of a vehicle. (Dillon, fig 6D, “[34: line 17] For example, the machine learning system 615 may be configured to generate one or more outputs, including an output indicating whether an event has occurred, an output identifying the event ( e.g., as neither a taking nor a return of an item), an output identifying an item involved in the event. [34: line 45] The training of the machine learning system 615 may occur for any number of iterations, or until the machine learning system 615 associates the data regarding one or more of the features 640, 642, 644, 646, 648 with neither a taking event nor a return event, with the actor 680, or with the location of the event, to a sufficiently high level of confidence.”; that time series of data can be collected on multiple events (hands, shoulders, proximity to shelf) as input vectors, that the system can learn which inputs are associated with a taking, returning, or not-taking type of event).
In view of the teachings of Dillon it would have been obvious for a person of ordinary skill in the art to apply the teachings of Dillon to Hoang before the effective filing date of the claimed invention in order to teach accessing memory. The teachings of Dillon, in the same or in a similar field of endeavor with Hoang, can combine Dillon’s combination of time and gestures in memory matrices with Hoang’s use of images in memory matrices to “train” systems. The simpler image and more complex, timed sequences merely perform the same functions as they perform separately and being no more “the combining of prior art elements according to known methods to yield predictable results” (KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)).
Regarding claim 44, Hoang teaches (New) The method of claim 26.
Hoang teaches wherein the input data entity is drawn from a training data set and (Hoang, fig 1, 5, “[0063] FIG. 10 is a schematic representation of an example of a CNN. Starting from an input image of an array of pixel values, followed by a number convolutional layers, that are in tum followed by a number of fully connected layers, [0066] A supervised artificial neural network is “trained” by supplying inputs and then checking and correcting the outputs. For example, a neural network that is trained to recognize dog breeds will process a set of images and calculate the probability that the dog in an image is a certain breed.”; that image data can be input of an array of pixel values; that the input data can be training data, such as a training set to recognize dog breeds).
Hoang does not explicitly teach wherein the computer memory is populated by memory entries indicating conditional activations triggered by decoding a plurality of different input data entities drawn from the training data set..
Dillon teaches wherein the computer memory is populated by memory entries indicating conditional activations triggered by decoding a plurality of different input data entities drawn from the training data set. (Dillon, fig 6D, “[34: line 17] For example, the machine learning system 615 may be configured to generate one or more outputs, including an output indicating whether an event has occurred, an output identifying the event ( e.g., as neither a taking nor a return of an item), an output identifying an item involved in the event. [34: line 45] The training of the machine learning system 615 may occur for any number of iterations, or until the machine learning system 615 associates the data regarding one or more of the features 640, 642, 644, 646, 648 with neither a taking event nor a return event, with the actor 680, or with the location of the event, to a sufficiently high level of confidence.”; that time series of data can be collected on multiple events (hands, shoulders, proximity to shelf) as input vectors, that the system can learn which inputs are associated with a taking, returning, or not-taking type of event).
In view of the teachings of Dillon it would have been obvious for a person of ordinary skill in the art to apply the teachings of Dillon to Hoang before the effective filing date of the claimed invention in order to teach accessing memory. The teachings of Dillon, in the same or in a similar field of endeavor with Hoang, can combine Dillon’s combination of time and gestures in memory matrices with Hoang’s use of images in memory matrices to “train” systems. The simpler image and more complex, timed sequences merely perform the same functions as they perform separately and being no more “the combining of prior art elements according to known methods to yield predictable results” (KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)).
Regarding claim 45, Hoang, as modified by Dillon, teaches (New) The method of claim 44.
Hoang further teaches wherein the computer memory is supplied with a test input data entity for classification and (Hoang, fig 1, 5, “[0063] FIG. 10 is a schematic representation of an example of a CNN. Starting from an input image of an array of pixel values, followed by a number convolutional layers, that are in tum followed by a number of fully connected layers, [0066] A supervised artificial neural network is “trained” by supplying inputs and then checking and correcting the outputs. For example, a neural network that is trained to recognize dog breeds will process a set of images and calculate the probability that the dog in an image is a certain breed.”; that image data can be input of an array of pixel values; that the input data can be training data, such as a training set to recognize dog breeds as a classification mechanism).
Dillon teaches wherein indications of conditional activations previously recorded at one or more of the plurality of storage locations in the computer memory by the training data set are used to perform inference to predict a class of the test input data entity. (Dillon, fig 6D, “[34: line 17] For example, the machine learning system 615 may be configured to generate one or more outputs, including an output indicating whether an event has occurred, an output identifying the event ( e.g., as neither a taking nor a return of an item), an output identifying an item involved in the event. [34: line 45] The training of the machine learning system 615 may occur for any number of iterations, or until the machine learning system 615 associates the data regarding one or more of the features 640, 642, 644, 646, 648 with neither a taking event nor a return event, with the actor 680, or with the location of the event, to a sufficiently high level of confidence.”; that time series of data can be collected on multiple events (hands, shoulders, proximity to shelf) as input vectors, that the system can learn which inputs are associated with a taking, returning, or not-taking type of event).
In view of the teachings of Dillon it would have been obvious for a person of ordinary skill in the art to apply the teachings of Dillon to Hoang before the effective filing date of the claimed invention in order to teach accessing memory. The teachings of Dillon, in the same or in a similar field of endeavor with Hoang, can combine Dillon’s combination of time and gestures in memory matrices with Hoang’s use of images in memory matrices to “train” systems. The simpler image and more complex, timed sequences merely perform the same functions as they perform separately and being no more “the combining of prior art elements according to known methods to yield predictable results” (KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)).
Claim 38 is rejected under 35 U.S.C. 103 as being unpatentable over Hoang in view of Ko, et al, U.S. Patent 11,568,227 (“Ko”).
Hoang teaches (New) The method of claim 26.
Hoang does not explicitly teach wherein the function of values upon which the conditional activation of an address decoder element depends is a sum or a weighted sum in which weights are permitted to have a positive or a negative polarity..
Ko teaches wherein the function of values upon which the conditional activation of an address decoder element depends is a sum or a weighted sum in which weights are permitted to have a positive or a negative polarity. (Ko, fig 10, “[25: line 62] The output of each of these circuits 1005 and 1010 is sent to a multiplexer 1015, and a set of configuration bits is used to select between these two possible inputs. This input value is sent to an adder 1020 and then to a multiplier 1025. For dot product outputs, the adder 1020 adds the bias of the linear function for the node and the multiplier 1025 multiplies this by the scaling factor for the linear function. The bias value sent to the adder 1020, in some embodiments, is a combination of (i) the bias value computed during the training of the neural network and (ii) a number of negative weight values”; that conditions can be expressed as positive or negative weights when storing and calculating neural network outputs).
In view of the teachings of Ko it would have been obvious for a person of ordinary skill in the art to apply the teachings of Ko to Hoang before the effective filing date of the claimed invention in order to teach calculations in memory. The teachings of Ko, in the same or in a similar field of endeavor with Hoang, can combine Ko’s combination of positive and negative weights in memory matrices with Hoang’s use of images in memory matrices to “train” systems. The simpler image and more complex, signed data sets merely perform the same functions as they perform separately and being no more “the combining of prior art elements according to known methods to yield predictable results” (KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)).
Claim 40 is rejected under 35 U.S.C. 103 as being unpatentable over Hoang in view of Zaidy, et al, U.S. Patent Application Publication 20230100328 (“Zaidy”).
Hoang teaches (New) The method of claim 26.
Hoang does not explicitly teach wherein the input data entity is taken from an input data set comprising a training data set to which at least one of noise and jitter has been applied..
Zaidy teaches wherein the input data entity is taken from an input data set comprising a training data set to which at least one of noise and jitter has been applied. (Zaidy, fig 1, “[0071] In some examples, the system may utilize online or offline training using random delays added to memory requests, or to processor instructions, to force valid re-orderings of input data to occur. This may make a trained predictor more robust and portable across multiple program runs and processor/system architectures. For example, data generation may be modified to increase the robustness of the trained DNN. There are several traditional data augmentation schemes such as injecting noise into the generated trace that may be used.”; that traditional noise can be injected into a training algorithm to improve “robustness of the trained DNN”).
In view of the teachings of Zaidy it would have been obvious for a person of ordinary skill in the art to apply the teachings of Zaidy to Hoang before the effective filing date of the claimed invention in order to teach processing neural memory. The teachings of Zaidy, in the same or in a similar field of endeavor with Hoang, can combine Zaidy’s addition of noise in memory matrices with Hoang’s use of images in memory matrices to “train” systems. The data set combined with noise to improve robustness merely perform the same functions as they perform separately and being no more “the combining of prior art elements according to known methods to yield predictable results” (KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)).
Claim 41 is rejected under 35 U.S.C. 103 as being unpatentable over Hoang in view of Trivedi, et al, U.S. Patent Application Publication 20210397936 (“Trivedi”).
Hoang teaches (New) The method of claim 26.
Hoang teaches wherein the input address connections are set using at least one of: a probability distribution associated with an input data set including the input data entity and (Hoang, fig 1, 5, “[0066] For example, a neural network that is trained to recognize dog breeds will process a set of images and calculate the probability that the dog in an image is a certain breed.”; that data can be clustered using probabilities to distinguish between particular characteristics like a dog breed).
Hoang does not explicitly teach wherein a selection of the one or more data elements from the input data set for a given input address connection based on the probability distribution is performed using Metropolis-Hastings sampling..
Trivedi teaches wherein a selection of the one or more data elements from the input data set for a given input address connection based on the probability distribution is performed using Metropolis-Hastings sampling. (Trivedi, fig 26, “[0095] Another challenge is to maintain a high throughput in the weight sampling layer since a BI considers many weight samples for an input. In accordance with an exemplary embodiment, Markov Chain (MC) weight sampling using Metropolis-Hastings (MH) is used in the weight sampling layer to maintain high throughput. MC sampling is more suited than rejection and importance sampling in a high-dimensional space”; that MH sampling can be used in neural networks with large dimensions to process data).
In view of the teachings of Trivedi it would have been obvious for a person of ordinary skill in the art to apply the teachings of Trivedi to Hoang before the effective filing date of the claimed invention in order to teach processing neural memory. The teachings of Trivedi, in the same or in a similar field of endeavor with Hoang, can combine Trvedi’s sampling of data in memory matrices with Hoang’s use of images in memory matrices to “train” systems. The data set combined with sampling to improve robustness merely perform the same functions as they perform separately and being no more “the combining of prior art elements according to known methods to yield predictable results” (KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DONALD H.B. BRASWELL whose telephone number is (469)295-9119. The examiner can normally be reached on 7-5 Central Time (Dallas).
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/Donald HB Braswell/ Primary Examiner, Art Unit 2825
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