Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-3, 5, 8-9, 11, 22 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by An (US 20240090271 A1).
Re: Independent claim 1, An discloses a display substrate, comprising:
a base substrate (An, Fig. 5, base substrate 42);
a first electrode layer (An, Fig. 5, each OLED 24 includes an anode 241) disposed on the base substrate, wherein the first electrode layer comprises a plurality of first electrode patterns (Fig. 5, first anodes 2411, second anode 2412), the plurality of first electrode patterns are arranged in an array along a first direction and a second direction on the base substrate, and the plurality of first electrode patterns are spaced apart from each other along each of the first direction and the second direction (Figs. 2-5, since subpixels 222 of pixels 22 are arranged in array in first and second directions and each OLED 24 corresponds to one subpixel 222, first anodes 2411 are arranged in array and spaces apart in first and second direction);
a pixel defining layer (Fig. 5, PDL 48) disposed on a side of the first electrode layer away from the base substrate (PDL 48 is disposed on side of anode 241 and on the side opposite the substrate 42, thus away from the base substrate 42), wherein the pixel defining layer comprises a plurality of pixel defining structures (PDL 48 include first pixel define layer 482 and second pixel define layer 484), the plurality of pixel defining structures are arranged in an array along the first direction and the second direction on the base substrate (pixel define layers 482 and 484 are located between adjacent anodes 241, they are arranged in an array along the first and second direction on base substrate 42) and define a plurality of pixel openings (pixel defining holes 486), and the plurality of pixel openings each expose a portion of a respective one of the plurality of first electrode patterns (each pixel defining hole 486 expose a portion of respective first anodes 2411);
a first film layer group disposed on a side of the pixel defining layer away from the base substrate, wherein the first film layer group comprises at least one film layer (Figs. 4-5 and ¶ [0126], blocked common layers 60 (first film layer group) formed above the pixel define layer 48 on the side opposite of base substrate 42, including one or more of a hole inject layer 242, hole transfer layer 243, hole block layer 245, ETL 246); and
a second film layer group (cathode 247) disposed on a side of the first film layer group away from the base substrate (247 is disposed on a side of the first film layer group away from base substrate 42), wherein the second film layer group comprises at least one film layer (Fig. 4 and ¶ [0126], cathode 247 layer formed by the cathodes 247 of all the OLEDs 24 is a continuous film layer, thus cathode 247 comprises at least one film layer),
wherein the first film layer group comprises a first portion and a second portion (Fig. 5 and ¶ [0119], first portion 61 and second portion 63 of common layer 60), an orthographic projection of the first portion of the first film layer group on the base substrate at least partially overlaps with an orthographic projection of at least one first electrode pattern on the base substrate (Fig. 5, first portion 61 is located on the first anode 2411, so the orthogonal projection of first portion 61 on substrate 42 necessarily at least partially overlaps with the orthogonal projection of first anode 2411 on substrate 42), an orthographic projection of the second portion of the first film layer group on the base substrate at least partially overlaps with an orthographic projection of at least one pixel defining structure on the base substrate (Fig. 5, orthogonal projection of second portion 63 on substrate 42 at least partially overlaps with the orthogonal projection of pixel define layer 48 on the substrate 42), and the first portion of the first film layer group and the second portion of the first film layer group are interrupted (Fig. 5,first portion 61 and second portion 63 are separated/spaced); and
wherein the second film layer group comprises a first portion and a second portion, wherein an orthographic projection of the first portion of the second film layer group at least partially overlaps with an orthographic projection of at least one first electrode pattern on the base substrate, an orthographic projection of the second portion of the second film layer group on the base substrate at least partially overlaps with an orthographic projection of at least one pixel defining structure on the base substrate, and the first portion of the second film layer group and the second portion of the second film layer group extend continuously (Fig. 4 and ¶ [0111] and ¶ [0126], An discloses cathode 247 as an OLED film layer disposed above the functional/organic layers in the OLED stack. An further teaches, in ¶ [0148], that a cathode layer is formed on the pixel define layer and the plurality of anodes, and that the cathode is a continuous film layer and is not blocked by the pixel define layer 48. Accordingly, the continuous cathode 247 includes a first portion over the anode 241 and a second portion over pixel define layer 48. The orthographic projection of the portion of the cathode 247 that is over the anode 241 at least partially overlaps with an orthographic projection of at least one first electrode pattern 241/2411 on the substrate 42. Further, an orthographic projection of the portion of the cathode 247 that is over the pixel define layer 48 at least partially overlaps with an orthographic projection of at least one pixel defining structure 48 on the substrate 42. Since the cathode 247 is a continuous film, the first portion of cathode 247 and the second portion of cathode 247 extend continuously).
Re: Claim 2, An discloses all the limitations of claim 1 on which this claim depends.
An further discloses
wherein the pixel defining structure comprises a top surface away from the base substrate, and the top surface has a shape of convex cambered surface (An, Fig. 5, pixel define layer 48 comprises top surface 4842 away from the substrate 42 and 4842 has curved surface outwardly rounded, corresponding to a convex cambered surface).
Re: Claim 3, An discloses all the limitations of claim 1 on which this claim depends.
An further discloses
wherein the first portion of the first film layer group comprises an end proximate to the pixel defining structure, the end is covered by the pixel defining structure, and the end is inserted between the pixel defining structure and the first electrode layer (An Fig. 5, end of first part 61 of blocked common layer 60 proximate to the pixel define layer 48 extends under the overhanging/recessed portion of pixel define layer 48 and is positioned on the anode 241/2411 between the pixel define layer 48 and the anode).
Re: Claim 5, An discloses all the limitations of claim 1 on which this claim depends.
An further discloses
wherein the orthographic projection of the first portion of the first film layer group on the base substrate partially overlaps with the orthographic projection of the second portion of the first film layer group on the base substrate (An, Fig. 5, the orthogonal projection of the second part 63 on substrate 42 overlaps the edge region of first part 61 on substrate 42).
Re: Claim 8, An discloses all the limitations of claim 1 on which this claim depends.
An further discloses
wherein a tangent plane of a top surface of the pixel defining structure at a first position has an included angle with respect to a first surface of the base substrate, the included angle being less than or equal to 60 degrees, wherein the first surface of the base substrate is a surface of the base substrate facing the first electrode layer, and the first position is a position where the top surface of the pixel defining structure contacts with the first film layer group (An discloses, in Fig. 5 and ¶ [0014], that pixel define layer 48 includes top surface 4842, and that top surface 4842 includes a curved surface connected to side surface 4822. An teaches that an included angle θ between the curved surface of top surface 4842 and an upper surface of substrate 42, or an upper surface of anode 241 is in a range from 5 degrees to 30 degrees. An also teaches, in Fig. 3 and ¶ [0126], that hole inject layer 242 is directly in contact with pixel define layer 48 and anode 241, and hole inject layer 242 is part of blocking common layer 60, which corresponds to the claimed first film layer group. Thus, the contact position between top surface 4842 of pixel define layer 48 and blocked common layer 60 corresponds to the claimed first position).
Re: Claim 9, An discloses all the limitations of claim 1 on which this claim depends.
An further discloses
wherein the display substrate comprises a second electrode layer disposed on the side of the first film layer group away from the base substrate, and the second film layer group comprises at least the second electrode layer (An discloses, in ¶ [0126], that OLED 24 includes anode 241, organic light emitting layer 244, and cathode 247 wherein cathode 247 is disposed on a side of the OLED functional layers away from substrate 42. An further teaches that the cathode 247 layer formed by the cathodes 247 of all OLEDs 24 is a continuous film layer and is not blocked by pixel defining layer 48. Thus, An’s cathode 247 corresponds to the claimed second electrode layer and also corresponds to the claimed second film layer group. Accordingly, An discloses that the display substrate comprises a second electrode layer disposed on the side of the first film layer group away from the base substrate, and the second film layer group comprises at least the second electrode layer).
Re: Claim 11, An discloses all the limitations of claim 1 on which this claim depends.
An further discloses
further comprising: a first stacked film layer group disposed on the side of the first electrode layer away from the base substrate (An, Fig. 4, first stacked film layer group including hole inject layer 242, hole transfer layer 243, and first organic light emitting layer 2442 is disposed on a side of anode 241 away from substrate 42);
a charge generation layer disposed on a side of the first stacked film layer group away from the base substrate (An, Fig. 4, charge generation layer 2443 disposed on a side of the first stacked film layer group away from the substrate 42);
a second stacked film layer group disposed on a side of the charge generation layer away from the base substrate (second stacked film layer group including second organic light emitting layer 2441, hole block layer 245, and electron transfer layer 246 is disposed on a side of the charge generation layer 2443 away from substrate 42); and
a second electrode layer disposed on a side of the second stacked film layer group away from the base substrate (cathode 247 is disposed on a side of the second stacked film layer group away from the substrate 42),
wherein the first film layer group comprises the first stacked film layer group and the charge generation layer, and/or, the second film layer group comprises the second stacked film layer group and the second electrode layer (An further, in ¶ [0127], teaches that common layer include 60 the hole inject layer 242, the hole transfer layer 243, the hole block layer 245, the electron transfer layer 246, the cathode 247, and the electron-hole pair secondary generation layer 2443. Therefore, An discloses the claimed first film layer group comprising at least the first stacked film layer group and the charge generation layer).
Re: Claim 22, An discloses all the limitations of claim 1 on which this claim depends.
An further teaches
a display apparatus comprising the display substrate of claim 1 (An teaches, in Fig. 1 and ¶ [0096], terminal 100 comprising display panel 20. An’s display panel 20 corresponds to the claimed display substrate and An’s terminal 100 corresponds to the claimed display apparatus).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 6-7 are rejected under 35 U.S.C. 103 as being unpatentable over An (US 20240090271 A1).
Re: Claim 6, An discloses all the limitations of claim 1 on which this claim depends.
An further teaches
wherein a part of the second film layer group is filled in a gap between the first portion of the first film layer group and the second portion of the first film layer group (An teaches, in Fig. 5, first part 61 located on first anode 2411 and blocking part 63 located on pixel define layer 48, and that these portions are spaced/interrupted due to the pixel define layer 48. An further teaches, in Fig. 3, cathode 247 is formed as a continuous film layer on the pixel define layer 48 and anodes 241 and is not blocked by the pixel define layer 48. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention that a portion of the continuous cathode 247 occupies or fills the gap/interruption region between first part 61 and blocking part 63 in order to maintain cathode continuity over the pixel define layer 48 and prevent cathode disconnection, which An identifies as a design objective).
Re: Claim 7, An discloses all the limitations of claim 1 on which this claim depends.
An further teaches
wherein the part of the second film layer group filled in the gap is in direct contact with a top surface of the pixel defining structure (As discussed for claim 6 above cathode 247 is a continuous film layer. Because cathode 247 remains continuous while common layer 60 is interrupted between first part 61 and blocking part 63, the cathode 247 extends into/fills the gap between first part 61 and blocking part 63. The gap is formed adjacent to the recessed/top surface region of first pixel define layer 482/4822. Accordingly, the portion of cathode 247 filling the gap is in direct contact with a surface of first pixel define layer 482 that faces away from substrate 42, i.e., a top surface of the pixel defining structure, as claimed).
Claim(s) 4 is rejected under 35 U.S.C. 103 as being unpatentable over An (US 20240090271 A1) in view of Tsaur (US 20200388658).
Re: Claim 4, An discloses all the limitations of claim 1 on which this claim depends.
An is silent regarding
wherein a thickness of the end is less than a thickness of a remaining part of the first portion of the first film layer group other than the end; and/or, the thickness of the end is less than a thickness of the second portion of the first film layer group.
However, Tsaur teaches
wherein a thickness of the end is less than a thickness of a remaining part of the first portion of the first film layer group other than the end; and/or, the thickness of the end is less than a thickness of the second portion of the first film layer group (Tsaur teaches, in Figs 3A-3B and ¶ [0033], an OLED display including anodes 302, dielectric barriers 308a-308d, and a charge generation layer CGL 312. Tsaur teaches that the dielectric causes the CGL layer 312 to have a greatly reduced thickness at regions 358/360 over the barrier 308b, relative to the thickness 356 of the CGL over the anode 302. TSaur further that these reduced-thickness regions can render the CGL discontinuous and reduce lateral current flow to adjacent subpixels).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to configure the end of An’s blocked common layer 60 proximate to pixel define layer 48 to have a reduced thickness relative to a remaining portion of first part 61 over anode 2411, as taught by Tsaur, because both An and Tsaur address reducing lateral current flow/crosstalk in OLED displays by interrupting or thinning a common/functional OLED layer near a pixel-separating structure. Applying Tsaur’s reduced-thickness CGL configuration to An’s blocked common layer 60 would have predictably reduced conductance at the end region near pixel define layer 48 and further reduced lateral leakage between adjacent subpixels, consistent with An’s stated purpose.
Claim(s) 10, 12 are rejected under 35 U.S.C. 103 as being unpatentable over An (US 20240090271 A1) in view of Defranco (US 20170222147 A1).
Re: Claim 10, An discloses all the limitations of claim 1 on which this claim depends.
An further teaches
further comprising: a hole injection layer disposed on the side of the first electrode layer away from the base substrate (hole injection layer 242 is disposed on the side of anode 241 away from the substrate 42);
a hole transport layer disposed on a side of the hole injection layer away from the base substrate (hole transport layer 243 is disposed on the side of hole injection layer 242 away from substrate 42);
a light-emitting layer disposed away from the base substrate (light emitting layer 244 disposed above hole transfer layer 243 away from the substrate 42);
a hole barrier layer disposed on a side of the light-emitting layer away from the base substrate (hole block layer 245 is disposed on a side of light emitting layer 244 away from the substrate 42);
an electron transport layer disposed on a side of the hole barrier layer away from the base substrate (electrode transfer layer 246 is disposed on a side of hole block layer 245 away from substrate 42);
and
a second electrode layer disposed away from the base substrate (An teaches the second electrode layer cathode 247 is the upper electrode of OLED 24, and An further teaches that the cathode 247 layer formed by cathodes 247 of all OLEDs 24 is a continuous film layer and is not blocked by pixel define layer), wherein the first film layer group comprises the hole injection layer and the hole transport layer, and/or, the second film layer group comprises the electron barrier layer, the light-emitting layer, the hole barrier layer, the electron transport layer, the electron injection layer and the second electrode layer (first film layer group (blocked common layer 60) includes at least hole inject layer 242 and hole transfer layer 243).
An is silent regarding
an electron barrier layer disposed on a side of the hole transport layer away from the base substrate; the light-emitting layer disposed on a side of the electron barrier layer away from the base substrate; an electron injection layer disposed on a side of the electron transport layer away from the base substrate; the second electrode layer disposed on a side of the electron injection layer away from the base substrate.
However, Defranco teaches the missing OLED functional layers. Specifically, Defranco discloses, in Fig. 1, OLED device 10 including, in order, anode 11, hole-injecting layer 12, hole-transporting layer 13, electrode-blocking layer 14, light-emitting layer 15, hole-blocking layer 16, electron-transporting layer 17, electron-injecting layer 18, and cathode 19.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify An’s OLED stack to include Defranco’s electron-blocking layer 14 between An’s hole transfer layer 243 and organic light emitting layer 244, and to include Defranco’s electron-injecting layer 18 between An’s electron transfer layer 246 and cathode 247, in order to improve carrier confinement by reducing undesired electron transport toward the hole-transport side of the device, thereby promoting recombination in the light-emitting layer, as taught by Defranco in ¶ [0026]. Incorporating Defranco’s electron-injecting layer would improve electron injection from the cathode side into the electron-transport layer, thereby improving carrier balance and operating efficiency.
Re: Claim 12, An discloses all the limitations of claim 11 on which this claim depends.
An further teaches
wherein the first stacked film layer group (An, Fig. 4, first stacked film layer group is the stack of hole inject layer 242, hole transfer layer 243, and first organic light emitting layer 2442) comprises: a hole injection layer disposed on the side of the first electrode layer away from the base substrate (hole injection layer 242 is disposed on the side of anode 241 away from the substrate 42);
a hole transport layer disposed on a side of the hole injection layer away from the base substrate (hole transport layer 243 is disposed on the side of hole injection layer 242 away from substrate 42);
a light-emitting layer disposed away from the base substrate (light emitting layer 244 disposed above hole transfer layer 243 away from the substrate 42);
a hole barrier layer disposed on a side of the light-emitting layer away from the base substrate (hole block layer 245 is disposed on a side of light emitting layer 244 away from the substrate 42);
an electron transport layer disposed on a side of the hole barrier layer away from the base substrate electrode transfer layer 246 is disposed on a side of hole block layer 245 away from substrate 42); and/or, the second stacked film layer group comprises: a hole injection layer disposed on the side of the charge generation layer away from the base substrate; a hole transport layer disposed on a side of the hole injection layer away from the base substrate; an electron barrier layer disposed on a side of the hole transport layer away from the base substrate; a light-emitting layer disposed on a side of the electron barrier layer away from the base substrate; a hole barrier layer disposed on a side of the light-emitting layer away from the base substrate; an electron transport layer disposed on a side of the hole barrier layer away from the base substrate; and an electron injection layer disposed on a side of the electron transport layer away from the base substrate.
An is silent regarding
an electron barrier layer disposed on a side of the hole transport layer away from the base substrate; a light-emitting layer disposed on a side of the electron barrier layer; and an electron injection layer disposed on a side of the electron transport layer away from the base substrate.
However, Defranco teaches the missing OLED functional layers. Specifically, Defranco discloses, in Fig. 1, OLED device 10 including, in order, anode 11, hole-injecting layer 12, hole-transporting layer 13, electrode-blocking layer 14, light-emitting layer 15, hole-blocking layer 16, electron-transporting layer 17, electron-injecting layer 18, and cathode 19.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify An’s OLED stack to include Defranco’s electron-blocking layer 14 between An’s hole transfer layer 243 and organic light emitting layer 244, and to include Defranco’s electron-injecting layer 18 between An’s electron transfer layer 246 and cathode 247, in order to improve carrier confinement by reducing undesired electron transport toward the hole-transport side of the device, thereby promoting recombination in the light-emitting layer, as taught by Defranco in ¶ [0026]. Incorporating Defranco’s electron-injecting layer would improve electron injection from the cathode side into the electron-transport layer, thereby improving carrier balance and operating efficiency.
Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over An (US 20240090271 A1) in view of Weaver (US 20140084269 A1).
Re: Claim 13, An discloses all the limitations of claim 1 on which this claim depends.
An further teaches
further comprising: a first stacked film layer group disposed on the side of the first electrode layer away from the base substrate; a first charge generation layer disposed on a side of the first stacked film layer group away from the base substrate (An teaches, in Fig. 4, an OLED stacked structure including anode 241, hole inject layer 242, hole transfer layer 243, first organic light emitting layer 2442, electron-hole pair secondary generation layer/charge generation layer 2443, second organic light emitting layer 2441, hole block layer 245, electron transfer layer 246, and cathode 247. Thus, An teaches a stacked OLED structure having at least one charge generation layer between stacked light-emitting units).
An is silent regarding
a second stacked film layer group disposed on a side of the first charge generation layer away from the base substrate; a second charge generation layer disposed on a side of the second stacked film layer group away from the base substrate; a third stacked film layer group disposed on a side of the second charge generation layer away from the base substrate; and a second electrode layer disposed on a side of the third stacked film layer group away from the base substrate, wherein the first film layer group comprises the first stacked film layer group, the first charge generation layer, the second stacked film layer group and the second charge generation layer, and/or, the second film layer group comprises the third stacked film layer group and the second electrode layer.
However, Weaver teaches the missing three-stack/two-charge-generation-layer OLED structure. In particular, Weaver teaches, in Fig. 4, a stacked OLED including transparent anode 248, first HIL 427, HTL 426, first fluorescent blue unit 425, first ETL 424, first charge generation layer 423, second HIL 422, second HTL 421, second fluorescent blue unit 420, second ETL 419, second charge generation layer 418, third HIL 417, third HTL 416, red EML 415, green EML 414, blocking layer 413, third ETL 412, EIL 411, and cathode 410. Weaver further teaches, in ¶ [0045], that two or more OLED units within a stacked structure may be separated by a charge generation layer.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify An’s OLED stack to include the three-stack/two-CGL OLED arrangement taught by Weaver, because Weaver teaches that a stacked hybrid OLED including at least two fluorescent blue stacks and one phosphorescent stack can provide a more efficient OLED than a conventional stacked hybrid OLED having only a single fluorescent blue unit. In the modified An structure, the first stacked film layer group is disposed on a side of An’s anode 241 away from substrate 42 and corresponds to the first OLED unit taught by Weaver, including first HIL 427/HTL 426, first fluorescent blue unit 425, and first ETL 424. The claimed first charge generation layer corresponds to first charge generation layer 423 disposed on a side of the first stacked film layer group away from the base substrate. The second stacked film layer group corresponds to the second OLED unit including second HIL 422, second HTL 421, second fluorescent blue unit 420, and second ETL 419, disposed on a side of the first charge generation layer 423 away from the base substrate. The third stacked film layer group corresponds to the third OLED unit including third HIL 417, third HTL 416, red EML 415, green EML 414, blocking layer 413, third ETL 412, and EIL 411 disposed on a side of the second charge generation layer 418 away from the base substrate. The second electrode layer corresponds to An’s cathode 247, as modified to be disposed above the third stacked film layer group in the same position as Weaver’s cathode 410. Accordingly, in the modified An structure, the first film layer group comprises the first stacked film layer group, first charge generation layer 423, second stacked film layer group, and second CGL 418; and/or the second film layer group comprises the third stacked film layer group and cathode 247.
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over An (US 20240090271 A1) in view of Weaver (US 20140084269 A1) further in view of Defranco (US 20170222147 A1).
Re: Claim 14, An and Weaver discloses all the limitations of claim 13 on which this claim depends.
Weaver further teaches
wherein the first stacked film layer group comprises: a hole injection layer disposed on a side of the first electrode layer away from the base substrate; a hole transport layer disposed on a side of the hole injection layer away from the base substrate; an electron barrier layer disposed on a side of the hole transport layer away from the base substrate; a light-emitting layer disposed on a side of the electron barrier layer away from the base substrate; a hole barrier layer disposed on a side of the light-emitting layer away from the base substrate; an electron transport layer disposed on a side of the hole barrier layer away from the base substrate; and
an electron injection layer disposed on a side of the electron transport layer away from the base substrate, and/or,
the second stacked film layer group comprises: a hole injection layer disposed on the side of the first charge generation layer away from the base substrate; a hole transport layer disposed on a side of the hole injection layer away from the base substrate; an electron barrier layer disposed on a side of the hole transport layer away from the base substrate; a light-emitting layer disposed on a side of the electron barrier layer away from the base substrate; a hole barrier layer disposed on a side of the light-emitting layer away from the base substrate; an electron transport layer disposed on a side of the hole barrier layer away from the base substrate; and an electron injection layer disposed on a side of the electron transport layer away from the base substrate,
and/or,
the third stacked film layer group comprises: a hole injection layer disposed on the side of the second charge generation layer away from the base substrate (Weaver teaches, for the third stacked film layer group, a hole injection layer 417 disposed on the side of second charge generation layer 418 away from the base substrate);
a hole transport layer disposed on a side of the hole injection layer away from the base substrate (a hole transport layer 416 disposed on a side of hole injection layer 417 away from the base substrate);
away from the base substrate (a light emitting layer including red EML 415 and/or green EML 414 disposed above the hole transport layer 416 away from the base substrate);
a hole barrier layer disposed on a side of the light-emitting layer away from the base substrate (hole barrier/blocking layer 413 disposed on a side of the light-emitting layer away from the base substrate);
an electron transport layer disposed on a side of the hole barrier layer away from the base substrate (an electrode transport layer 412 disposed on a side of the hole barrier/blocking 413 away from the base substrate); and
an electron injection layer disposed on a side of the electron transport layer away from the base substrate (electrode injection layer 411 disposed on a side of the electron transport layer 412 away from the base substrate).
Both An and Weaver are silent regarding
an electron barrier layer disposed on a side of the hole transport layer away from the base substrate; a light-emitting layer disposed on a side of the electron barrier layer.
However, Defranco teaches
an electron barrier layer disposed on a side of the hole transport layer away from the base substrate; a light-emitting layer disposed on a side of the electron barrier layer (Defranco teaches OLED device 10 including hole-transport layer 13, electron-blocking layer 14, light emitting layer 15, hole blocking layer 16, electron transporting layer 17, electron injecting layer 18, and cathode 19. Defranco’s electron blocking layer 14 corresponds to the claimed electron barrier layer and is disposed between the hole transport layer and the light emitting layer).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify An’s OLED structure to include the three-stack two charge generation layer OLED arrangement taught by Weaver to improve OLED efficiency while preserving An’s leakage-reduction and cathode-continuity structure. It would further have been obvious to add electron blocking layer 14 taught by Defranco in the conventional position, i.e., between hole transport layer and light emitting layer in order to improve carrier confinement and recombination efficiency.
Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over An (US 20240090271 A1) in view of Kim (US 20150214284 A1) further in view of Nagayama (US 20060246620 A1).
Re: Claim 15, An discloses all the limitations of claim 1 on which this claim depends.
An is silent regarding
wherein the pixel defining layer comprises a photoresist material; and wherein the photoresist material is reflowable after being softened, and a softening temperature of the photoresist material is lower than a glass transition temperature of each film layer of the first film layer group and a glass transition temperature of each film layer of the second film layer group.
However, Kim teaches
wherein the pixel defining layer comprises a photoresist material; and wherein the photoresist material is reflowable after being softened (Kim teaches, in Figs. 7B-7C and ¶¶ [0092] – [0095], an OLED display in which pixel defining 190 is formed from photosensitive material layer 199 by photolithography. Kim further teaches, in ¶ [0073], that a pixel-defining-layer-forming material may be reflowed in a heat-curing process after pixel defining layer 190 is formed, and (¶ [0095]) that during heat curing, material forming pixel defining layer 190 may partially flow down so that spacer 195 has a gradual slope. Thus, Kim teaches a pixel defining layer comprising a reflowable photosensitive/photoresist material.
Nagayama teaches
a softening temperature of the photoresist material is lower than a glass transition temperature of each film layer of the first film layer group and a glass transition temperature of each film layer of the second film layer group (Nagayama teaches, in ¶ [0047], when an organic semiconductor/organic EL layer does not have sufficient heat resistance, the maximum process temperature should be set lower than the glass transition temperature Tg, melting point, and sublimation temperature of the organic layer to prevent thermal degradation).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to form An’s pixel define layer 48 using Kim’s reflowable photosensitive/photoresist material and to select the softening/reflow temperature of that photoresist material to be lower than the glass transition temperatures of the OLED film layers in AN’s first and second film layer groups, as taught by Nagayama. Such selection would allow the photoresist pixel defining layer to soften/reflow and adjust the pixel-defining-layer profile while keeping the OLED film layers thermally stable and avoiding thermal degradation, consistent with Nagayama’s teaching to keep processing temperature below the Tg of organic layers.
Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over An (US 20240090271 A1) in view of Chen (US 11778858 B1) and further in view of Liu (US 20150194629 A1).
Re: Claim 17, An discloses all the limitations of claim 1 on which this claim depends.
An further teaches
wherein the pixel defining layer comprises a first sub-pixel defining layer and a second sub-pixel defining layer (An teaches, in Fig. 5, that pixel define layer 48 includes first pixel define layer 482 and second pixel define layer 484), the second sub-pixel defining layer is located on a side of the first sub-pixel defining layer away from the base substrate (An teaches that second pixel define layer 484 is formed on first pixel define layer 482 in a direction away from substrate 42), and an orthographic projection of the second sub-pixel defining layer on the base substrate at least partially overlaps with an orthographic projection of the first sub-pixel defining layer on the base substrate (An teaches, in Fig. 5, orthogonal projection of second pixel define layer 484 at least partially overlaps the projection of first pixel define layer 482);
An is silent regarding
further comprising: a plurality of micro lenses disposed on a side of the second electrode layer away from the base substrate,
wherein each of orthographic projections of the plurality of micro lenses on the base substrate is located within an orthographic projection of a respective one of the plurality of pixel openings on the base substrate;
wherein a material of the plurality of micro lenses is the same as a material of at least a part of the pixel defining layer;
wherein a curvature of at least one of the micro lenses is less than a curvature of the pixel defining structure;
wherein the display substrate further comprises a plurality of color film layers, the plurality of color film layers are located between the pixel defining layer and a layer in which the plurality of micro lenses are located, wherein an orthographic projection of a micro lens on the base substrate and an orthographic projection of a pixel defining structure adjacent to the micro lens on the base substrate have a first overlap portion, orthographic projections of any two adjacent color film layers on the base substrate have a second overlap portion, and a width of the first overlap portion in the first direction is greater than a width of the second overlap portion in the first direction; and
and the first sub-pixel defining layer comprises a photoresist material, and the second sub-pixel defining layer comprises an inorganic material.
However, Chen teaches
further comprising: a plurality of micro lenses disposed on a side of the second electrode layer away from the base substrate (Chen teaches, in Fig. 3 and column 6 lines 32-42, display 14 including a plurality of microlenses 48. Chen further teaches that each microlens 48 is formed over a corresponding pixel aperture 44 and color filter element 46. It would have been obvious to provide microlenses 48 on a side of An’s cathode 247, i.e., the claimed second electrode layer, away from substrate 42, to improve on-axis efficiency and display optical performance),
wherein each of orthographic projections of the plurality of micro lenses on the base substrate is located within an orthographic projection of a respective one of the plurality of pixel openings on the base substrate (An teaches pixel define layer 48 having pixel defining holes 486 that expose respective anodes 241. Chen teaches, in column 5 lines 31-36, that each microlens 48 has a footprint that approximately covers the footprint of an underlying color filter element 46 and pixel aperture 44, and that each pixel aperture 44-R/44-G/44-B is overlapped by a corresponding microlens 48-R/48-G/48-B. It would have been obvious to align each microlens 48 with a respective pixel defining hole of An so that the projection of each microlens is located within the projection of a respective pixel opening, thereby focusing light from the corresponding pixel opening);
wherein a curvature of at least one of the micro lenses is less than a curvature of the pixel defining structure (An teaches that second pixel define layer 484 has a curved top surface 4842. Chen teaches that the radius of curvature of microlenses 48 may be selected to optimize emission profile, to reduce focusing power and improve color uniformity. Thus, it would have been obvious to select at least one microlens 48 to have a curvature less than the curvature of An’s curved pixel defining structure 4842 as a routine optical design choice to optimize emission profile and control focusing);
wherein the display substrate further comprises a plurality of color film layers (Chen teaches, in column 6 lines 32-37, a plurality of color filter elements 46, including corresponding color filter elements for different pixel aperture 44-R/44-G/44-B), the plurality of color film layers are located between the pixel defining layer and a layer in which the plurality of micro lenses are located (Chen teaches color filter elements 46 located below microlenses 48. In the modified An structure, the color filter elements 46 are positioned between An’s pixel define layer 48/display-emitting structure and the microlens layer including microlenses 48, as conventionally arranged to filter emitted light before it is focused by the microlens), wherein an orthographic projection of a micro lens on the base substrate and an orthographic projection of a pixel defining structure adjacent to the micro lens on the base substrate have a first overlap portion (Chen teaches, in Fig. 10 and column 9 lines 45-64, that microlenses 48 may be shifted relative to pixel apertures 44, including in the X-direction or Y-direction. In the modified An structure, shifting a microlens 48 relative to An’s pixel defining hole 486 causes the projection of the microlens 48 to overlap the projection of an adjacent portion of pixel define layer 48, thereby forming the claimed first overlap portion), orthographic projections of any two adjacent color film layers on the base substrate have a second overlap portion (Chen teaches color filter elements 46 associated with adjacent pixel apertures 44. Chen further teaches, in Fig. 10 and column 9 lines 45-64, that the color filter element 46 may be shifted relative to the underlying pixel aperture 44. In the modified structure of An, adjacent color filter elements 46 may partially overlap in projection, thereby forming the claimed second overlap portion), and a width of the first overlap portion in the first direction is greater than a width of the second overlap portion in the first direction (Chen teaches that a color filter element 46 may be shifted from the center of its underlying pixel aperture 44 by distance 74, while a microlens 48 may be shifted from the center of the same pixel aperture 44 by distance 76, and distance 76 may be greater than distance 74. Therefore, in the modified An structure, the microlens 48 would overlap more with an adjacent pixel define layer 48 than adjacent color filter elements 46 overlap each other, thereby teaching the claimed first-overlap width being greater than the second-overlap width); and
An and Chen are further silent regarding
wherein a material of the plurality of micro lenses is the same as a material of at least a part of the pixel defining layer;
wherein the first sub-pixel defining layer comprises a photoresist material, and the second sub-pixel defining layer comprises an inorganic material.
However, Liu teaches
wherein a material of the plurality of micro lenses is the same as a material of at least a part of the pixel defining layer (Liu teaches, in ¶¶ [0017] – [0021], a two-layer OLED PDL in which a hydrophobic/first PDL layer may be a positive photoresist film layer, e.g., organic resin layer (see Liu ¶ [0052]). Chen teaches, in column 5 lines 52-53, that microlenses 48 may be formed from an organic photopolymer. It would have been obvious to use the same organic photopolymer/photoresist material for microlenses 48 and at least part of An’s pixel define layer 48 to simplify material selection and use compatible photolithographic processing);
wherein the first sub-pixel defining layer comprises a photoresist material, and the second sub-pixel defining layer comprises an inorganic material (Liu teaches, ¶¶ [0051] – [0052], a two-layer OLED PDL in which a hydrophobic/first PDL layer may be a positive photoresist film layer and a hydrophilic/second PDL layer may be silicon oxide, silicon nitride or silicon oxynitride. It would have been obvious to configure An’s first pixel define layer 482 as a photoresist first sub-pixel defining layer and An’s second pixel define layer 484 as an inorganic second sub-pixel defining layer, as taught by Liu, to provide a lower PDL that has repulsive interaction with the hydrophilic/second PDL layer, thus avoiding mutual pollution of the organic light-emitting materials in luminous regions of different colors in adjacent sub-pixel units, and to provide a dense inorganic upper PDL) .
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to combine Chen’s microlens/color-filter structure and Liu’s two material PDL structure with An’s OLED display substrate because Chen teaches improving on-axis efficiency and optical performance using microlenses 48 aligned with pixel apertures 44 and color filter elements 46, while Liu teaches a photoresist/inorganic two-layer OLED PDL structure suitable for pixel definition. The combination predictably improves optical efficiency and color uniformity while maintaining An’s pixel definition, leakage reduction and cathode-continuity structure.
Claim(s) 23, 27 are rejected under 35 U.S.C. 103 as being unpatentable over An (US 20240090271 A1) in view of Kim (US 20150214284 A1).
Re: Independent claim 23, An discloses a method for manufacturing a display substrate, comprising:
forming a first electrode material layer on a base substrate, and performing a patterning process on the first electrode material layer, so as to form a first electrode layer comprising a plurality of first electrode patterns (An teaches, in Figs. 4-5, forming anode 241 on substrate 42 which corresponds to the claimed first electrode layer. The plurality of anodes 241 (anodes 2411/2412) are formed by patterning first electrode 241), wherein the plurality of first electrode patterns are arranged in an array along a first direction and a second direction on the base substrate, and the plurality of first electrode patterns are spaced apart from each other along each of the first direction and the second direction (An teaches, in Fig. 5, that the plurality of anodes 241 are spaced and arranged in an array on planarization layer 46. Thus, the anodes 241 are arranged in first and second array directions and spaced apart from each other);
forming a pixel defining material layer on a side of the first electrode layer away from the base substrate, and performing a patterning process on the pixel defining material layer, so as to form a pixel defining layer comprising a plurality of pixel defining structures (An teaches, forming pixel defining layer 48 on substrate 42 and anodes 241. An further teaches, in Figs. 9-13 and ¶¶ [0142] – [0146], forming first material layer 52, hard mask layer 54, and patterned photoresist layer 56, and processing first material layer 52 to form pixel define layer 48, where pixel define layer 48 includes first pixel define layer 482 and second pixel define layer 484, which correspond to the claimed pixel defining structures), wherein the plurality of pixel defining structures are arranged in an array along the first direction and the second direction on the base substrate, the plurality of pixel defining structures define a plurality of pixel openings, and the plurality of pixel openings each expose a portion of a respective one of the plurality of first electrode patterns (An teaches pixel defining layer 48 having pixel defining holes 486. Each pixel defining hole 486 expose one anode 241. Because the anodes 241 are arranged in an array, the pixel defining hole 486 and corresponding pixel defining structures are likewise arranged in an array);
forming a first film layer group on a side of the pixel defining layer away from the base substrate by using a first evaporation process, wherein the first film layer group comprises at least one film layer (An teaches, in ¶ [0124] – [0125], forming blocked common layer 60 on pixel define layer 48 and anodes 241. Blocked common layer 60 includes one or more OLED functional layers, such as hole inject layer 242, hole transfer layer 243, hole block layer 245, electron transfer layer 246. An also teaches forming OLED functional layers by evaporation.);
and forming a second film layer group on a side of the first film layer group away from the base substrate by using a second evaporation process, wherein the second film layer group comprises at least one film layer (An teaches, in Figs. 4 and 5, forming cathode 247 above the OLED functional layers. An further teaches that the cathode 247 layer formed by the cathode 247 of all OLEDs 24 is a continuous film layer and is not blocked by pixel define layer 48. Thus, An teaches forming the claimed second film layer group, corresponding to cathode 247, on a side of blocked common layer 60 away from substrate 42. An also teaches, in ¶ [0124], forming the OLED layers/electrode layers through evaporation), wherein the first film layer group comprises a first portion and a second portion (An teaches, in Fig. 5, blocked common layer 60 includes first part 61 located on first anode 2411 and blocking part 63 located on pixel define layer 48, First part 61 corresponds to the claimed first portion, and blocking part 63 corresponds to the claimed second portion), an orthographic projection of the first portion of the first film layer group on the base substrate at least partially overlaps with an orthographic projection of at least one first electrode pattern on the base substrate (An, Fig. 5, first part 61 of blocked common layer 60 is located on first anode 2411, thus the projection of first part 61 overlaps the projection of first anode 2411), an orthographic projection of the second portion of the first film layer group on the base substrate at least partially overlaps with an orthographic projection of at least one pixel defining structure on the base substrate (An Fig. 5, blocking part 63 of blocked common layer 60 located on pixel define layer 48. Therefore, the projection of blocking part 63 overlaps the projection of pixel define layer 48), and the first portion of the first film layer group and the second portion of the first film layer group are interrupted (An, recessed part 4824 of pixel define layer 48 breaks continuity of common layer 60, such that first part 61 and blocking part 60 of blocked common layer 60 are spaced/interrupted); and the second film layer group comprises a first portion and a second portion (An teaches, in Fig. 4, cathode 247 as a continuous film layer. The portion of cathode 247 over anode 241 corresponds to the claimed first portion of the second film layer group, and the portion of cathode 247 over pixel define layer 48 corresponds to the claimed second portion of the second film layer group), wherein an orthographic projection of the first portion of the second film layer group on the base substrate at least partially overlaps with an orthographic projection of at least one first electrode pattern on the base substrate (cathode 247 is formed over the OLEDs/anodes 241. Therefore, the projection of a portion of cathode 247 overlaps the projection of at least one anode 241), an orthographic projection of the second portion of the second film layer group on the base substrate at least partially overlaps with an orthographic projection of at least one pixel defining structure on the base substrate (since cathode 247 is continuous film layer that is not blocked by pixel define layer 48, a portion of cathode 247 extends over pixel define layer 48, and its projection overlaps the projection of pixel define layer 48), and the first portion of the second film layer group and the second portion of the second film layer group extend continuously (cathode 247 layer formed by cathodes 247 of all OLEDs 24 is a continuous film layer and is not blocked by pixel define layer 48. Therefore, the portion of cathode 247 over anode 241 and portion of cathode 247 over pixel define layer 48 extend continuously).
An is silent regarding
performing a reflow process on the base substrate formed with the pixel defining layer and the first film layer group.
However,
Kim teaches performing a reflow process on the base substrate formed with the pixel defining layer and the first film layer group (Kim teaches, in Fig. 7C and ¶ [0095], an OLED display manufacturing method including pixel defining layer 190 having pixel defining part 191 and spacer 195. Kim teaches forming pixel defining layer 190 from photosensitive material layer 199 by photolithography. Kim further teaches that, during a heat-curing/reflow process, material forming pixel defining layer 190 may partially flow down so that spacer 195 has a gradual slope).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify An’s method to include Kim’s heat-curing/reflow process before forming An’s continuous cathode 247, including after forming lower blocked common layer 60 and before forming cathode 247, in order to adjust/smooth the pixel define layer profile and provide a gradual slope for improved coverage of subsequently formed upper layers. Kim teaches the advantage of reflow process by causing the pixel-defining-layer material to flow down so that spacer 195 has a gradual slope. Applying Kim’s known OLED PDL profile-control technique to An would have predictably improved upper-layer/cathode coverage and continuity, consistent with An’s objective of allowing cathode 247 to lap over pixel define layer 48 without disconnection.
Re: Claim 27, An and Kim disclose all the limitations of claim 23 on which this claim depends.
wherein before the reflow process, a top surface of the pixel defining structure has an included angle with respect to a first surface of the base substrate at a second position, the included angle being greater than or equal to 85 degrees, wherein the first surface of the base substrate is a surface of the base substrate facing the first electrode layer, and the second position is a position where the top surface of the pixel defining structure contacts with the first electrode layer; and/or,
after the reflow process, a tangent plane of the top surface of the pixel defining structure at a first position has an included angle with respect to the first surface of the base substrate, the included angle being less than or equal to 60 degrees (An teaches, in Fig. 5 and ¶¶ [0121] – [0123], that pixel layer 48 includes top surface 4842, and the top surface 4842 includes a curved surface connected to side surface 4822. An further teaches than an inclined angle between the curved surface of top surface 4842 and an upper surface of substrate 42, or an upper surface of anode 241 is in a range of 5 degrees to 30 degrees, which is less than 60 degrees), wherein the first surface of the base substrate is the surface of the base substrate facing the first electrode layer, and the first position is a position where the top surface of the pixel defining structure contacts with the first film layer group (An also teaches that hole inject layer 242 is directly in contact with pixel define layer 48 and anode 241. Hole inject layer 242 is part of blocked common layer 60, which corresponds to the claimed first film layer group. Thus, the contact position between top surface 4842 of pixel define layer 48 and blocked common layer 60 corresponds to the claimed first position).
As explained for claim 23, Kim teaches performing a reflow/heat-curing process on a pixel defining layer material, where the material forming pixel defining layer 190 partially flows down so that spacer 195 has a gradual slope. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to apply Kim’s reflow process to Kim’s reflow process to An’s pixel define layer 48 to obtain/adjust An’s curved top surface 4842 and included angle of 5 degrees to 30 degrees, in order to provide a gradual pixel defining layer profile for improved coverage of subsequently formed upper layers and improved cathode continuity.
Claim(s) 24 is/are rejected under 35 U.S.C. 103 as being unpatentable over An (US 20240090271 A1) in view of Kim (US 20150214284 A1) further in view of Nagayama (US 20060246620 A1) and further in view of Huang (US 6444410 B1).
Re: Claim 24, An and Kim disclose all the limitations of claim 23 on which this claim depends.
An further teaches
wherein the forming a pixel defining material layer on a side of the first electrode layer away from the base substrate, and performing a patterning process on the pixel defining material layer (An teaches forming pixel define layer 48 on substrate 42 and anodes 241, including first pixel define layer 482 and second pixel define layer 484).
Kim further teaches
forming steps of the pixel defining layer comprising a plurality of pixel defining structures, comprises: coating a photoresist material on the side of the first electrode layer away from the base substrate; and performing an exposure process and a development process on the photoresist material, so as to form the plurality of pixel defining structures (Kim teaches, in ¶¶ [0092] – [0093], coating a photosensitive material on pixel electrodes 211/212 to form photosensitive material layer 199, performing photolithography using mask 800, and removing exposed or non-exposed portions during development to form pixel defining layer 190 including pixel defining part 191 and spacer 195. Thus, Kim teaches coating a photoresist/ photosensitive material and performing exposure/development to form pixel defining structures);
wherein the photoresist material is reflowable after being softened (Kim teaches, in ¶ [0073], that a pixel-defining-layer-forming material may be flowed in a heat-curing process after pixel defining layer 190 is formed, and, in ¶ [0095], that the material forming pixel defining layer 190 may partially flow down so that spacer 195 has a gradual slope. Thus, Kim teaches that the pixel defining layer material is reflowable after being softened/heated),
Both An and Kim are silent regarding
a softening temperature of the photoresist material is lower than a glass transition temperature of each film layer of the first film layer group and a glass transition temperature of each film layer of the second film layer group.
However, Nagayama teaches
a softening temperature of the photoresist material is lower than a glass transition temperature of each film layer of the first film layer group and a glass transition temperature of each film layer of the second film layer group (Nagayama teaches, in ¶ [0047], when an organic semiconductor/organic EL layer does not have sufficient heat resistance, the maximum process temperature should be set lower than the glass transition temperature Tg, melting point, and sublimation temperature of the organic layer to prevent thermal degradation).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to form An’s pixel define layer 48 using Kim’s reflowable photosensitive/photoresist material and to select the softening/reflow temperature of that photoresist material to be lower than the glass transition temperatures of the OLED film layers in AN’s first and second film layer groups, as taught by Nagayama. Such selection would allow the photoresist pixel defining layer to soften/reflow and adjust the pixel-defining-layer profile while keeping the OLED film layers thermally stable and avoiding thermal degradation, consistent with Nagayama’s teaching to keep processing temperature below the Tg of organic layers.
An and Kim are further silent regarding
wherein the method further comprises: before the first evaporation process, performing a baking process on the base substrate formed with the pixel defining layer; and wherein a softening temperature of the photoresist material is higher than a baking temperature in the baking process.
However, Huang teaches
wherein the method further comprises: before the first evaporation process, performing a baking process on the base substrate formed with the pixel defining layer (Huang teaches, in column 1 lines 23-35, conventional photoresist processing including coating, soft bake, exposure, post-exposure bake, development, and hard bake. Huang further teaches that the hard bake evaporates remaining solvent and improves adhesion of the photoresist) and wherein a softening temperature of the photoresist material is higher than a baking temperature in the baking process (Huang teaches, in column 2 lines 1-15, two-step photoresist thermal process in which a hard bake is performed at a temperature lower than the glass transition temperature of the photoresist, while a later flow bake is performed at a temperature higher than the glass transition temperature to reflow the photoresist. Thus, Huang teaches the photoresist softening/reflow temperature is higher than that of a non-reflow baking temperature. Applying this teaching to An/Kim, it would have been obvious to perform the pre-evaporation bake at a temperature below the photoresist softening temperature so that the PDL is stabilized before evaporation without prematurely reflowing, while reserving the later reflow process for profile adjustment).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to bake Kim’s photoresist/photosensitive pixel defining layer before An’s first OLED evaporation process to stabilize the patterned PDL before forming the OLED film layers. It would further have been obvious to combine Kim’s photoresist/photosensitive PDL process and Huang’s bake/reflow temperature-control process with An’s OLED manufacturing method because Kim teaches forming an OLED PDL from a photosensitive material and reflowing it to provide a gradual slope, while Huang teaches controlling bake and flow-bake temperatures to stabilize and then reflow photoresist in order to achieve improved PDL profile control and upper-layer coverage while avoiding thermal damage to the OLED film layers.
Conclusion
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/BIPANA ADHIKARI DAWADI/ Examiner, Art Unit 2898
/JESSICA S MANNO/SPE, Art Unit 2898
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