Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 20-23 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding Claim 20, the claim states in part “…the first pixel circuit comprises at least one reset transistor;”. It is not clear which first pixel circuit Applicant is referring to. Earlier in the claim, Applicant recites “a plurality of first pixel circuits….” And “at least one first pixel circuit…”, so there are a plurality of first pixel circuits recited.
Claims 21-23 are rejected because they depend on Claim 20.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 6, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over US20230317011A1 (Liu – note that the earliest publication date for this reference is 8/11/2022 – Examiner is using the US reference for convenience) in view of CN113763874A (Wang).
Regarding Claim 1, Liu discloses a display substrate (Fig. 1, el. 100, Para. [0076]), comprising a base substrate (Fig. 2, el. 1, Para. [0076]) comprising a first display region (Fig. 2, el. AA1, Para. [0077]); and a plurality of first pixel circuits and a plurality of first light emitting elements that are located in the first display region (Para. [0097]); wherein at least one first pixel circuit among the plurality of first pixel circuits is electrically connected with at least two first light emitting elements (Para. [0097]); the at least one first pixel circuit comprises at least one reset transistor (Fig. 6A, el. T1, Para. [0110]); and an orthographic projection of at least one first light emitting element among the plurality of first light emitting elements on the base substrate is at least partially overlapped at an orthographic projection of a reset transistor of the at least one first pixel circuit on the base substrate (Para. [0016]).
Liu does not disclose that the at least one first pixel circuit is electrically connected with at least two first light emitting elements.
Wang discloses a display substrate comprising a base substrate, (Fig. 1) where the base substrate has a first display area A1 (Fig. 1, Para. [0067]), a plurality of light emitting elements I2 (Fig. 2, Para. [0074]) and a plurality of first pixel circuits I1 (Fig. 2, Para. [0074]) located in the first display area, where at least one first pixel circuit among the plurality of first pixel ciruits is electrically connected to at least two first light-emitting elements (Para. [0074]).
It would have been obvious to one skilled in the art before the effective filing date of the
claimed invention to modify Liu by implementing the configuration disclosed by Wang, where one pixel circuit drives multiple subpixels. As disclosed by Wang, this has the benefit of implementing a time sharing display configuration, which can increase light transmittance in the first display area (Para. [0076]).
Regarding Claim 6, Liu in view of Wang discloses the display substrate according to claim 1, wherein the plurality of first light emitting elements are divided into a plurality of light emitting units, each of which comprises: a first light emitting element emitting light of a first color, a first light emitting element emitting light of a second color, and two first light emitting elements emitting light of a third color (Liu, Para. [0096]); the first light emitting element emitting light of the second color is electrically connected with a first pixel circuit; and the two first light emitting elements emitting light of the third color are electrically connected with a same first pixel circuit (see analysis of Claim 1).
Regarding Claim 19, Liu in view of Wang discloses a display apparatus (Fig. 1, Para. [0076]), comprising: a display substrate according to claim 1 (see analysis of Claim 1) and a sensor (Fig. 2, el. 2, Para. [0077]) located on a non-display side of the display substrate (Fig. 2, Para. [0077]), and an orthographic projection of the sensor on the display substrate is at least partially overlapped with a first display region of the display substrate (Fig. 2).
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over US20230317011A1 in view of CN113763874A.
Regarding Claim 20, Liu discloses a display substrate (Fig. 1, el. 100, Para. [0076]), comprising a base substrate (Fig. 2, el. 1, Para. [0076]) comprising a first display region (Fig. 2, el. AA1, Para. [0077]); a plurality of first pixel circuits and a plurality of first light emitting elements that are located in the first display region (Para. [0097]); at least one first pixel circuit among the plurality of first pixel circuits is electrically connected with a first light emitting element (Para. [0097]) and at least one first pixel circuit among the plurality of first pixel circuits is electrically connected with at least two first light emitting elements (Para. [0097]); the first pixel circuit comprises at least one reset transistor (Fig. 6A, el. T1, Para. [0110]); and orthographic projections of at least two first light emitting element among the plurality of first light emitting elements on the base substrate is at least partially overlapped at an orthographic projection of a reset transistor of the at least one first pixel circuit on the base substrate (Para. [0016]).
Liu does not disclose that the at least one first pixel circuit is electrically connected with at least two first light emitting elements.
Wang discloses a display substrate comprising a base substrate, (Fig. 1) where the base substrate has a first display area A1 (Fig. 1, Para. [0067]), a plurality of light emitting elements I2 (Fig. 2, Para. [0074]) and a plurality of first pixel circuits I1 (Fig. 2, Para. [0074]) located in the first display area, where at least one first pixel circuit among the plurality of first pixel ciruits is electrically connected to at least two first light-emitting elements (Para. [0074]).
It would have been obvious to one skilled in the art before the effective filing date of the
claimed invention to modify Liu by implementing the configuration disclosed by Wang, where one pixel circuit drives multiple subpixels. As disclosed by Wang, this has the benefit of implementing a time sharing display configuration, which can increase light transmittance in the first display area (Para. [0076]).
Allowable Subject Matter
Claims 2-5, 7-9, 12-13, and 15-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding Claim 2, 4, and 5, none of the prior art of record teaches, suggests or renders
obvious, either alone or in combination the limitation orthographic projections of a plurality of first light emitting elements emitting light of a same color on the base substrate are at least partially overlapped with orthographic projections of reset transistors of a plurality of first pixel circuits on the base substrate.
Regarding Claim 3, none of the prior art of record teaches, suggests or renders
obvious, either alone or in combination the limitation an orthographic projection of an anode of the at least one first light emitting element on the base substrate contains an orthographic projection of an active layer of the at least one reset transistor on the base substrate.
Regarding Claim 7, none of the prior art of record teaches, suggests or renders
obvious, either alone or in combination the limitation wherein the first light emitting element emitting light of the first color and the first light emitting element emitting light of the second color in the light emitting unit are arranged in a same row, the two first light emitting elements emitting light of the third color are arranged in a same row, and four first light emitting elements in the light emitting unit are arranged in different columns; and the light of the first color is red light, the light of the second color is blue light, and the light of the third color is green light.
Regarding Claim 8, 9, 12-13, 15 and 16 none of the prior art of record teaches, suggests or renders obvious, either alone or in combination wherein the first display region comprises: a plurality of circuit island regions spaced apart from each other and arranged in an array, each circuit island region comprises: three first pixel circuits disposed in sequence along a first direction; two adjacent rows of circuit island regions are dislocated; and three first pixel circuits of the circuit island region are electrically connected with four first light emitting elements in a light emitting unit.
Regarding Claim 17-18, none of the prior art of record teaches, suggests or renders obvious, either alone or in combination wherein in a direction perpendicular to the display substrate, the display substrate comprises: a first semiconductor layer, a first conductive layer, a second conductive layer, a second semiconductor layer, a third conductive layer, a fourth conductive layer, a fifth conductive layer, and a sixth conductive layer disposed on the base substrate; the sixth conductive layer at least comprises a plurality of auxiliary electrodes; and orthographic projections of the auxiliary electrodes on the base substrate contain an orthographic projection of a light emitting region of the first light emitting element on the base substrate.
Claims 20-23 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
Conclusion
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/ROHIT PARTHASARATHY/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
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