DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species 1 in the reply filed on June 25, 2026 is acknowledged.
Claim 4 is withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on June 25, 2026.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the insulating film recited in claim 1 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-3, and 5 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, the claim recites the limitation "the first conductive type" in line 6. There is insufficient antecedent basis for this limitation in the claim.
It is unclear whether the first conductive type is intended to be the same as the first conductivity type recited in claim 1, line 4. For the purposes of examination, this interpretation was be used.
Claims 2-3, and 5 depend upon claim 1 and do not rectify the problem. Therefore, they are rejected on at least the same basis as claim 1.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 5 are rejected under 35 U.S.C. 103 as being unpatentable over Park et al. (US 20200035667 A1) herein after “Park” in view of Liu (CN 112713184 A).
Regarding claim 1, Figs. 1A and 2A of Park disclose a power semiconductor device (Fig. 1A, power semiconductor device 100, ¶ [0018]) comprising:
an active region (Fig. 1A, area ‘E’, ¶ [0028]) that acts as a switching element;
in the active region (‘E’),
a drift layer (Fig. 1A, epitaxial layer 104, ¶ [0020]) of a first conductivity type (“the epi layer 104 is a lightly n-doped epitaxial layer, i.e., an N− type doped epitaxial layer”, ¶ [0021]);
a base layer (Fig. 1A, body regions 118, ¶ [0030]) of a second conductivity type (“The body regions 118 have the second conductivity type, e.g., the P type conductivity”, ¶ [0030]) formed on the drift layer (104);
a plurality of well regions (Fig. 1A, high impurity regions 120, ¶ [0031]) of the first conductive type (“the high impurity regions 120 are N+ impurity regions”, ¶ [0031]) formed in a front layer of the base layer (118);
a plurality of trenches (Fig. 2A, diode trench 208, ¶ [0038]) extending through the well regions (120) and the base layer (118) from an upper surface of the well regions (120) to reach the drift layer (104); and
a poly silicon layer formed in each of the trench via an insulating film (Fig. 1A, insulating layer 110, ¶ [0029]), wherein the polysilicon layer formed in the at least one trench includes a first polysilicon layer (Fig. 1A, first material layer 112, ¶ [00114-1]) of the first conductivity type (“The first material layer 112… includes a first semiconductor material, e.g., a first polysilicon material. The first polysilicon material has the first conductivity type, e.g., the N type conductivity”, ¶ [00114-1]) connected to a main terminal (Fig. 1A, source electrode 126A, ¶ [0032]) of the switching element, and
a second polysilicon layer (Fig. 1A, third material layer 114-2, ¶ [00114-1]) connected to a control terminal (Fig. 1A, gate electrode 126B, ¶ [0032]) of the switching element.
Park fails to disclose the second polysilicon layer enclosing a surface of the first polysilicon layer facing a side surface of the trench.
In the similar field of endeavor of trench gate MOSFETs, Fig. 1 of Liu discloses the second polysilicon layer (Fig. 1, polysilicon shielding gate 5, ¶ [n0066]) enclosing a surface of the first polysilicon layer (Fig. 1, second polysilicon layer 8, ¶ [n0066]) facing a side surface of the trench (Fig. 1, trench 3, ¶ [n0067]).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the polysilicon layers of Park with the arrangement as disclosed by Liu, to provide shielding and obtain the desired electrical characteristics (see Liu, ¶ [n0004]).
Regarding claim 5, Park and Liu together disclose the power semiconductor device according to claim 1 as applied above, and Fig. 1A of Park further discloses wherein the switching element includes a MOSFET or an IGBT (“In the present embodiment, the power semiconductor device 100 is a power metal oxide semiconductor field effect transistor (MOSFET) device having a trench diode. In another embodiment, the power semiconductor device 100 may be another power semiconductor device such as an insulated gate bipolar transistor (IGBT) device”, ¶ [0018]).
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Park (US 20200035667 A1) and Liu (CN 112713184 A) in further view of Onogi et al. (US 20170271457 A1) herein after “Onogi”.
Regarding claim 2, Park and Liu together disclose the power semiconductor device according to claim 1 as applied above, and Park discloses that the device can be used as a temperature sensor (see Park, ¶ [0038]), but the combination fails to explicitly disclose wherein a constant current circuit is connected to the control terminal of the switching element.
In the similar field of endeavor of power semiconductor devices, Fig. 3 of Onogi discloses wherein a constant current circuit is connected to the control terminal of the switching element (“constant current flows between the anode electrode 42a and the cathode electrode 44a”, ¶ [0024]).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the device of Park with the constant current circuit as disclosed by Onogi, to allow for accurate temperature sensing (see Onogi, ¶ [0024]).
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Park (US 20200035667 A1) and Liu (CN 112713184 A) in further view of Hotta et al. (JP 2008235600 A) herein after “Hotta”.
Regarding claim 3, Park and Liu together disclose the power semiconductor device according to claim 1 as applied above, and Fig. 1A of Park further discloses comprising at least one fourth polysilicon layer (Fig. 1A, second material layer 114-1, ¶ [0024]) of a second conductivity type (Fig. 1A, “The second material layer 114-1… includes a second semiconductor material, e.g., a second polysilicon material. The second polysilicon material has the second conductivity type, e.g., the P type conductivity”, ¶ [0025]) provided between the first polysilicon layer (112) and the second polysilicon layer (114-2).
Park and Liu fail to disclose comprising at least one third polysilicon layer of the first conductivity type, wherein
the at least one third polysilicon layer and the at least one fourth polysilicon layer are arranged so that a layer of the first conductivity type and a layer of the second conductivity type to be alternated from the first polysilicon layer to the second polysilicon layer.
In the similar field of endeavor of temperature-sensing semiconductor devices, Fig. 5 of Hotta discloses comprising at least one third polysilicon layer (Fig. 5, n-type semiconductor region 304b, ¶ [0023]) of the first conductivity type, wherein
the at least one third polysilicon layer (304b) and the at least one fourth polysilicon layer (Fig. 5, p-type semiconductor region 304c, ¶ [0023]) are arranged so that a layer of the first conductivity type and a layer of the second conductivity type to be alternated from the first polysilicon layer to the second polysilicon layer (Fig. 5, “n-type semiconductor region 304d and the p-type semiconductor region 304c… n-type semiconductor region 304b and the p-type semiconductor region 304a”, ¶ [0023]).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the device of Park with the third and fourth polysilicon layers as disclosed by Hotta, to improve the signal-to-noise ratio in the sensing device (see Hotta, ¶ [0023]).
Conclusion
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/C.A.N./Examiner, Art Unit 2893
/YARA B GREEN/Supervisor Patent Examiner, Art Unit 2893
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