DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim 21 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kobayashi et al. (U.S. PG Pub 2018/0026218).
Regarding Claim 21, Kobayashi et al. teach a head-mounted (Paragraph 274) display (Figure 1A, Element 11. Paragraph 48) comprising:
a first layer (Figures 1B - 1C and 7, Element 101. Paragraph 54) comprising a source line driver circuit (Figures 1 - 10, Element 93. Paragraph 51) and a plurality of first sections (Figure 7, Element 101. Paragraph 54) arranged in a matrix of i rows and j columns (Seen in Figures 1A – 8);
a second layer (Figures 1B - 1C and 7, Element 102. Paragraph 54) comprising a plurality of second sections (Figure 7, Element 102. Paragraph 54) arranged in the matrix of i rows and j columns (Seen in Figures 1A – 8); and
a third layer (Figures 1B - 1C and 7, Element 103. Paragraph 54) comprising a plurality of third sections (Figure 7, Element 103. Paragraph 54) arranged in the matrix of i rows and j columns (Seen in Figures 1A – 8),
wherein the third layer (Figures 1B - 1C and 7, Element 103. Paragraph 54) is over (Seen in Figure 7) the second layer (Figures 1B - 1C and 7, Element 102. Paragraph 54),
wherein the second layer (Figures 1B - 1C and 7, Element 102. Paragraph 54) is over (Seen in Figure 7) the first layer (Figures 1B - 1C and 7, Element 101. Paragraph 54),
wherein the plurality of first sections (Figure 7, Element 101. Paragraph 54), the plurality of second sections (Figure 7, Element 102. Paragraph 54), and the plurality of third sections (Figure 7, Element 103. Paragraph 54) are respectively corresponding to each other on the matrix of i rows and j columns (Seen in Figures 1A – 8),
wherein each of the plurality of first sections (Figure 7, Element 101. Paragraph 54) comprises a gate line driving circuit (Figure 7, Element 101. Paragraph 54),
wherein each of the plurality of second sections (Figure 7, Element 102. Paragraph 54) comprises a plurality of pixel circuits (Figure 7, Element 102. Paragraph 77) which are electrically connected to the source line driver circuit (Figures 1 - 10, Element 93. Paragraph 51),
wherein each of the plurality of third sections (Figure 7, Element 103. Paragraph 54) comprises a first sub-display section (Figure 7, Element 103, Sub-Element EL. Paragraph 52) and a second sub-display section (Figure 7, Element 103, Sub-Element EL. Paragraph 52), and
wherein each of the gate line driving circuits (Figure 7, Element 101. Paragraph 54) in the plurality of first sections (Figure 7, Element 101. Paragraph 54) is electrically connected to (Seen in Figure 7) the corresponding plurality of pixel circuits (Figure 7, Element 102. Paragraph 77) in the plurality of second sections (Figure 7, Element 102. Paragraph 54).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Kobayashi et al. (U.S. PG Pub 2018/0026218) in view of Liu et al. (U.S. PG Pub 2018/0366068).
Regarding Claim 1, Kobayashi et al. teach a head-mounted (Paragraph 274) display (Figure 1A, Element 11. Paragraph 48) comprising:
a first layer (Figures 1B - 1C and 7, Element 101. Paragraph 54) comprising a source line driver circuit (Figures 1 - 10, Element 93. Paragraph 51) and a plurality of first sections (Figure 7, Element 101. Paragraph 54) arranged in a matrix of i rows and j columns (Seen in Figures 1A – 8);
a second layer (Figures 1B - 1C and 7, Element 102. Paragraph 54) comprising a plurality of second sections (Figure 7, Element 102. Paragraph 54) arranged in the matrix of i rows and j columns (Seen in Figures 1A – 8); and
a third layer (Figures 1B - 1C and 7, Element 103. Paragraph 54) comprising a plurality of third sections (Figure 7, Element 103. Paragraph 54) arranged in the matrix of i rows and j columns (Seen in Figures 1A – 8),
wherein the third layer (Figures 1B - 1C and 7, Element 103. Paragraph 54) is over (Seen in Figure 7) the second layer (Figures 1B - 1C and 7, Element 102. Paragraph 54),
wherein the second layer (Figures 1B - 1C and 7, Element 102. Paragraph 54) is over (Seen in Figure 7) the first layer (Figures 1B - 1C and 7, Element 101. Paragraph 54),
wherein the plurality of first sections (Figure 7, Element 101. Paragraph 54), the plurality of second sections (Figure 7, Element 102. Paragraph 54), and the plurality of third sections (Figure 7, Element 103. Paragraph 54) are respectively corresponding to each other on the matrix of i rows and j columns (Seen in Figures 1A – 8),
wherein each of the plurality of first sections (Figure 7, Element 101. Paragraph 54) comprises a gate line driving circuit (Figure 7, Element 101. Paragraph 54),
wherein each of the plurality of second sections (Figure 7, Element 102. Paragraph 54) comprises a plurality of pixel circuits (Figure 7, Element 102. Paragraph 77) which are electrically connected to the source line driver circuit (Figures 1 - 10, Element 93. Paragraph 51),
wherein each of the plurality of third sections (Figure 7, Element 103. Paragraph 54) comprises, and
wherein each of the gate line driving circuits (Figure 7, Element 101. Paragraph 54) in the plurality of first sections (Figure 7, Element 101. Paragraph 54) is electrically connected to (Seen in Figure 7) the corresponding plurality of pixel circuits (Figure 7, Element 102. Paragraph 77) in the plurality of second sections (Figure 7, Element 102. Paragraph 54).
Kobayashi et al. is silent with regards to a first sub-display section and a second sub-display section, wherein the first sub-display section corresponds to a user's point of gaze, wherein the second sub-display section surrounds the first sub-display section, and wherein, in the plurality of third sections, a number of times image data is rewritten per unit time in the second sub-display section is less than the number of times image data is rewritten per unit time in the first sub-display section.
Liu et al. teach a first sub-display section (Figure 4, Element 111. Paragraph 43) and a second sub-display section (Figure 4, Element 112. Paragraph 43),
wherein the first sub-display section (Figure 4, Element 111. Paragraph 43) corresponds to a user's point of gaze (Figure 6, Element 241. Paragraph 247),
wherein the second sub-display section (Figure 4, Element 112. Paragraph 43) surrounds (Seen in Figure 4) the first sub-display section (Figure 4, Element 111. Paragraph 43), and
wherein, in the plurality of third sections, a number of times image data is rewritten per unit time (Element 60 Hz. Paragraph 43) in the second sub-display section (Figure 4, Element 112. Paragraph 43) is less than the number of times image data is rewritten per unit time (Element 180 Hz. Paragraph 43) in the first sub-display section (Figure 4, Element 111. Paragraph 43).
It would have been obvious to a person of ordinary skill in the art to modify the teachings of the display device of Kobayashi et al. with the eye-tracking device of Liu et al. The motivation to modify the teachings of Kobayashi et al. with the teachings of Liu et al. is to alleviate the problem of power consumption that is created by an increase in refresh frequency, as taught by Liu et al. (Paragraph 76).
Response to Arguments
Regarding the first argument, in which the applicant asserts that the prior art of record fail to teach at least that each layer have the same matrix of rows and columns so there is a 1:1 correlation. The applicant argues that the layer 101 of Kobayashi et al. is not provided with a matching matrix and therefore fails to meet the claimed limitations. The examiner respectfully disagrees with the applicant’s assertion. Kobayashi et al. shows in Figures 1B and 1C:
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Kobayashi et al. discloses “FIG. 1B is a drawing for describing a layered structure of the display device 11 in FIG. 1A. In the display device 11, a layer 101 including the transistors that constitute the driver circuit 91, a layer 102 including the transistors that constitute the pixel circuits 94, and a layer 103 including display elements are stacked. FIG. 1C is a drawing in which the layered structure in FIG. 1B is reflected in the structure of the display device 11 illustrated in FIG. 1A. In FIG. 1C, the x direction, the y direction, and the z direction are shown. The x direction is parallel to the gate lines GL_1 to GL_4 as illustrated in FIG. 1C. They direction is parallel to the source lines. The z direction is perpendicular to a plane determined by the x direction and the y direction as illustrated in FIG. 1C (Paragraphs 54 – 55. Emphasis Added).” Kobayashi et al. further discloses “FIG. 7 illustrates, with use of circuit symbols, a layered structure example in which the pixel circuits in FIG. 5B and the pulse output circuit in FIG. 6B are stacked. Similarly to FIG. 1C, the x direction, the y direction, and the z direction are shown in FIG. 7. The pulse output circuit, the pixel circuits, and light-emitting elements as display elements, which respectively correspond to the layer 101, the layer 102, and the layer 103 described with reference to FIG. 1B, are shown in FIG. 7 (Paragraph 76. Emphasis Added).” Figure 1B clearly shows that layers 101, 102, and 103 are stacked on top of one another. Figure 1C clearly shows that the driver circuit (Element 91_x) is displayed under the pixel circuit. Figure 7 clearly shows that the individual pulse output circuits (corresponding to layer 101 of Figure 1C) are shown. Therefore, there is a 1:1 ratio of the layered circuits shown in Figure 7. The Office is unmoved by the applicant’s argument and the rejection is maintained.
All other arguments are considered moot in light of the above rejection and/or the response to the first argument.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Eguchi (U.S. PG Pub 2017/0287387) teaches segmented gate drivers similar to the instant invention.
Shishido (U.S. PG Pub 2018/0012536) teach a stackable display that has two layers that comprise pixels circuits, similar to the instant invention.
Lee et al. (U.S. PG Pub 2018/0095274) teach a display device in which a foveal area and surrounding areas are driven during different numbers of frames (See Figure 4 and 5) in order to change the resolution.
Shi et al. (U.S. PG Pug 2021/0225303) teach a display device where a portion of the display where the full display is run normally in one frame (Figure 8) and then the gaze area is refreshed when the non-gaze area is not (Figure 9).
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDREW B SCHNIREL whose telephone number is (571)270-7690. The examiner can normally be reached Monday - Friday, 10 - 6 EST.
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/A.B.S/Examiner, Art Unit 2625 /WILLIAM BODDIE/Supervisory Patent Examiner, Art Unit 2625
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