DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submissions received on 10/7/2025 and 3/27/2024 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement submissions are being considered by the examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-5, 7, 13-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by the International Publication WO 2019/183254 A1, by Zhou et al. (Zhou hereafter). Please refer to the copy included with this communication.
Regarding claim 1, Zhou teaches a test socket (107, see paragraph 0027, lines 5-6 and Abstract, line 4) for coupling an integrated circuit (IC) chip to a printed circuit board (PCB), said test socket comprising:
a conductive body (comprised of socket body 102 + conductive metal shells within cavities 106 and 108, see paragraph 0039, lines 2-5) having a first surface (facing PCB 105, as shown in Figure 1) configured to face the PCB and a second surface (facing chip 101) configured to face the IC chip, said conductive body defining a signal cavity and a ground cavity (cavities 106, 108, see paragraph 0032, lines 3-5) the signal cavity and the ground cavity extending from the first surface to the second surface;
a signal probe (signal contact probe 204, see paragraph 0033, line 4) disposed in the signal cavity, said signal probe configured to electrically connect to a signal conductor of the PCB and to a signal pad of the IC chip (see paragraph 0033, lines 4-5); and
a ground probe (ground contact probe 202, see paragraph 0033, line 3) disposed in the ground cavity, said ground probe configured to electrically connect to a ground conductor of the PCB and to a ground pad of the IC chip (see paragraph 0033, line 4-5), wherein said ground probe is further electrically connected to said conductive body (202 is electrically connected to the conductive body through the metal shell within cavity 108, see paragraph 0039, lines 2-5).
As to claim 2, Zhou teaches in Figure 1, an insulation layer (socket retainer 104, made of plastic material – see paragraph 0027, lines 7-8) disposed on the first surface (surface facing PCB 105).
As to claim 3, Zhou teaches in Figure 2B, the said conductive body and said insulation layer define a recess (see annotated Figure A below) at an opening of the ground cavity to the first surface.
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Annotated Figure A
As to claim 4, Zhou teaches in Figure 2A-B, a conductive contact (bottom portion 210 of the ground contact probe 202) disposed on the first surface and configured to contact the ground conductor of the PCB to electrically connect said conductive body to the ground conductor (as paragraph 0041, lines 7-10explains, the probes are arranged to contact pads on the printed circuit board. Inherently, the signal probes are intended to connect to signal contact pads just as the ground probes are intended to connect to ground contact pads).
As to claim 5, Zhou shows in Figure 2B, the conductive contact (bottom portion 210 of the ground contact probe 202) is disposed at an opening of the ground cavity to the first surface (see annotated Figure A above).
As to claim 7, Zhou shows in figure 2B, a conductive member (shell 212) disposed on said ground probe (202), said conductive member configured to contact said conductive body to electrically connect said ground probe to said conductive body (212 is electrically connected to the conductive body through the metal shell within cavity 108).
As to claim 10, Zhou shows in Figure 2B, the conductive body (comprised of socket body 102 + conductive metal shells within cavities 106 and 108, see paragraph 0039, lines 2-5) defines a signal counterbore (counterbore that locks the probe 204 in place) disposed at a first opening of the signal cavity at the second surface, and a ground counterbore (counterbore that locks the probe 202 in place) disposed at a second opening of the ground cavity at the second surface, wherein the signal counterbore is configured to at least partially receive the signal pad of the IC chip without contacting the signal pad, and wherein the ground counterbore is configured to at least partially receive the ground pad of the IC chip.
The examiner notes that a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. Because Zhou teaches all structural elements as recited, and because the assembly may be readily used in a process of receiving a signal pad or ground pad, Zhou anticipates the claim.
As to claim 13, Zhou shows in Figures 1 and 2B, a power probe (206) configured to electrically connect to a power conductor of the PCB (105) and to a power pad of the IC chip (101), said power probe disposed in a power cavity (110) defined by said conductive body (see paragraph 0034, line 5).
As to claim 14, Zhou shows in Figure 2B, an air gap (space between the power probe 206 and the socket body 102 of the conductive body 102, wherein the conductive body is comprised of the socket body 102 + conductive metal shells within cavities 106 and 108) is defined in the power cavity radially between said conductive body and said power probe (see annotated Figure B below).
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Fig. B
Regarding claim 15, Zhou teaches a method for manufacturing a test socket, said method comprising:
forming a conductive body (comprised of socket body 102 + conductive metal shells within cavities 106 and 108) having a first surface (surface facing PCB 105, see Figure 1) configured to face a printed circuit board (105) and a second surface (surface facing chip 101) configured to face an integrated circuit chip (101), the conductive body defining a signal cavity and a ground cavity (cavities 106, 108, see paragraph 0032, lines 3-5), the signal cavity and the ground cavity extending from the first surface to the second surface;
positioning a signal probe in the signal cavity (signal contact probe 204, see see paragraph 0033, lines 4), the signal probe configured to electrically connect to a signal conductor of the PCB and to a signal pad of the IC chip (see paragraph 0033, line 5); and
positioning a ground probe in the ground cavity (ground contact probe 202, see paragraph 0033, line 3), the ground probe configured to electrically connect to a ground conductor of the PCB and to a ground pad of the IC chip (see paragraph 0033, line 5); wherein the ground probe is further electrically connected to the conductive body (202 is electrically connected to the conductive body through the metal shell within cavity 108, see paragraph 0039, lines 2-5).
As to claim 16, Zhou teaches in Figure 1, an insulation layer (socket retainer 104, made of plastic material – see paragraph 0027, lines 7-8) disposed on the first surface (surface facing PCB 105); wherein the conductive body and said insulation layer define a recess (see annotated Figure A below) at an opening of the ground cavity to the first surface.
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Annotated Figure A
As to claim 17, Zhou teaches positioning a conductive contact (bottom portion 210 of the ground contact probe 202) on the first surface, the conductive contact configured to contact the ground conductor of the PCB to electrically connect said conductive body to the ground conductor (as paragraph 0041, lines 7-10 explains, the probes are arranged to contact pads on the printed circuit board. Inherently, the signal probes are intended to connect to signal contact pads just as the ground probes are intended to connect to ground contact pads).
As to claim 18, Zhou shows in figure 2B, positioning a conductive member (shell 212) on the ground probe (202), the conductive member configured to contact said conductive body to electrically connect said ground probe to said conductive body (212 is electrically connected to the conductive body through the metal shell within cavity 108).
As to claim 19, Zhou shows in Figures 1 and 2B, positioning a power probe (206) in a power cavity (110) defined by the conductive body (see paragraph 0034, line 5), the power probe configured to electrically connect to a power conductor of the PCB (105) and to a power pad of the IC chip (101).
As to claim 20, Zhou teaches in Figures 1-2B, an integrated circuit (IC) chip testing assembly comprising:
a printed circuit board (105) comprising a signal conductor and a ground conductor (see paragraph 33, lines 3-5, paragraph 0041, lines 1-3 and paragraph 0007, lines 2-3);
an IC chip (101) comprising a signal pad and a ground pad (see paragraph 33, lines 3-5, paragraph 0041, lines 1-3 and paragraph 0007, lines 2-3); and
a test socket (107, paragraph 0027, lines 5-6) comprising:
a conductive body (comprised of socket body 102 + conductive metal shells within cavities 106 and 108, see paragraph 0042, lines 3-6) having a first surface (facing PCB 105, as shown in Figure 1) configured to face said PCB and a second surface (facing chip 101) configured to face said IC chip, said conductive body defining a signal cavity and a ground cavity (cavities 106, 108, see paragraph 0032, lines 3-5) the signal cavity and the ground cavity extending from the first surface to the second surface;
a signal probe (signal contact probe 204, see paragraph 0033, lines 4) disposed in the signal cavity, said signal probe configured to electrically connect to a signal conductor of the PCB and to a signal pad of the IC chip (see paragraph 0033, line 5); and
a ground probe (ground contact probe 202, see paragraph 0033, line 3) disposed in the ground cavity, said ground probe configured to electrically connect to a ground conductor of the PCB and to a ground pad of the IC chip (see paragraph 0033, line 5), wherein said ground probe is further electrically connected to said conductive body (202 is electrically connected to the conductive body through the metal shell within cavity 108, see paragraph 0039, lines 2-5).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zhou in view of the US Patent Application Publication PGPub 2007/0269999 by Di Stefano et al., (Di Stefano hereafter).
In terms of claim(s) 6, Zhou substantially teaches all of the elements disclosed above, except for explicitly mentioning that the conductive contact (portion 210 in Figure 2B) extends from the first surface (it appears the portion 210 is flush with the first surface).
Di Stefano teaches a socket (10) comprising contacting probes (30) and conductive contacts (34) that extend from the lower surface of the socket so as to couple pads (34) on a board (46).
It would have been obvious to a person having ordinary skill in the art before the invention was effectively filed, to apply the teachings of conductive contacts that extend from the surface of a socket as taught by Di Stefano, in the device/system/method of Zhou, in order to allow the conductive contacts to couple the pads in the printed circuit board of
Claim(s) 8 and 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zhou in view of the US Patent US 7,358,751 by Kirby et al., (Kirby hereafter).
In terms of claim(s) 8 and 9, Zhou substantially teaches all of the elements disclosed above, except for the conductive member (shell 212) comprises an elastomer or a ring positioned around at least a portion of a circumference of an outside surface of said ground probe.
Kirby teaches in Figure 1I, a probing element (42) held within a body (10) and connected to electrically conductive portions (52) through a conductive filled elastomer (38, see col. 5, lines 33-34). As the conductive filled elastomer surrounds the conductive portion along its circumference, it has the shape of a ring around it.
It would have been obvious to a person having ordinary skill in the art before the invention was effectively filed, to apply the teachings of conductive elastomers as taught by Kirby, and use a conductive elastomer between the shell (212) and the conductive body of Zhou, in order to hold the shell and probe securely within the conductive body, filling any voids that may exist between the probe and the conductive body, reduce vibrations and adds pliability.
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zhou in view of the US Patent US 6,937,045 by Sinclair et al., (Sinclair hereafter).
As to claim 10, Zhou shows in Figure 2B, the conductive body (comprised of socket body 102 + conductive metal shells within cavities 106 and 108, see paragraph 0039, lines 2-5) defines a signal counterbore (counterbore that locks the probe 204 in place) disposed at a first opening of the signal cavity at the second surface, and a ground counterbore (counterbore that locks the probe 202 in place) disposed at a second opening of the ground cavity at the second surface, wherein the signal counterbore is configured to at least partially receive the signal pad of the IC chip without contacting the signal pad, and wherein the ground counterbore is configured to at least partially receive the ground pad of the IC chip.
The examiner notes that a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. Because Zhou teaches all structural elements as recited, and because the assembly may be readily used in a process of receiving a signal pad or ground pad, Zhou anticipates the claim.
Nevertheless, Sinclair teaches in Figures 3 and 4, a socket including a surface facing a chip, including probes held within a socket body (30+32), the socket body including counterbores that hold the probes in place, wherein counterbores are configured to at least partially receive contact elements (24) of the IC chip without contacting them (as shown in Figure 4).
It would have been obvious to a person having ordinary skill in the art before the invention was effectively filed, to apply the teaching of counterbores partially receiving contact elements as taught by Sinclair, in the device/system/method of Zhou, in order to ensure the contacts fit inside the counterbore with room to spare, thus allowing the chip to be placed flush with the surface of the socket.
Claim(s) 11 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zhou in view of the US Patent US 9,689,897 by Rathburn et al., (Rathburn hereafter).
In terms of claim(s) 11 and 12, Zhou shows in Figure 2A-B, a plurality of conductive shield needles (ground needles 214 within ground needle cavities 124, see paragraph 0037, lines 3-7) extending from the first surface (see paragraph 0038, lines 1-3:“the one or more ground needle cavities 124 may extend a height or length of the socket body 102 and/or the socket retainer 104” – thus the ground needles extend from the first surface inwards towards the second surface), said conductive shield needles configured to be electrically coupled with the ground conductor (through the connection between the shield 212 and traces 118) to form an electrical connection between said conductive body and the ground conductor, wherein at least some of said plurality of conductive shield needles (124) are disposed adjacent to an opening of the signal cavity at the first surface (paragraph 0039, lines 5-6).
Although Zhou teaches the ground needles (214) are electrically coupled with the ground conductor, Zhou doesn’t explicitly mention the ground needles are configured to contact said ground conductor.
Rathburn teaches in Figure 2A, a socket (200) including contact probes interconnecting an chip (62) to a PCB (78), the socket including ground shielding elements (equivalent to Zhou’s shield needles) that surround the contact probes for impedance tuning purposes (col. 7, lines 59-61). The shielding elements are configured to contact ground conductors (120) on the PCB.
It would have been obvious to a person having ordinary skill in the art before the invention was effectively filed, to apply the teachings of shielding elements contacting ground conductors of a PCB as taught by Rathburn, in the device of Zhou, in order to ensure the PCB and chip share the same ground level even if the shell (212) fails to properly connect to the ground metal shells within the ground cavity.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
- The US Patent Application Publication PGPub 2020/0241042 by Jeong et al.
- The US Patent Application Publication PGPub 2020/0003802 by Lee et al.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Richard Isla whose telephone number is (571)272-5056. The examiner can normally be reached Monday-Friday 9a - 5:30p.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Huy Phan can be reached at 571 272-7924. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/RICHARD ISLA/ Primary Patent Examiner, Art Unit 2858 December 19, 2025
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