DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 10/08/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-4, 6-12 and 14-20 are rejected under 35 U.S.C. 103 as being unpatentable over Osato et al. (US Pat. 7,771,220) in views of Osato (US PGPUB 2010/0190361) and Osato et al. (US PGPUB 2009/0104795).
Regarding claims 1 and 9, Osato et al. teaches a test system (10) for a semiconductor integrated circuit (IC) (12), the test system comprising: a load board (20); and a test socket (30, 32 and 40) comprising: a socket body (40) configured to engage the semiconductor IC (12) and a load board (20); an elastomer retainer (34) including a top surface adjacent to said socket body (40) configured to face the semiconductor IC (12) (as shown in fig. 5), and a bottom surface, opposite the top surface, configured to face said load board (20) (as shown in fig. 5), the elastomer retainer (34) defining a slot (50) extending from the top surface to the bottom surface (as shown in fig. 5); and a rotational contact (42) positioned in the slot (50), the rotational contact configured to move between the pre-load state (cut lines) and a loaded state (solid lines) (as shown in fig. 5), wherein said elastomer retainer (42) is configured to compress under a loading force from the rotational contact (42) when moving from the pre-load state to the loaded state upon engagement of said socket body (40) with the semiconductor IC (12) (as disclosed in col. 8, lines 22-65).
Osato et al. fails to specifically teach the rotational contact configured to move between a free state and a pre-load state, wherein said elastomer retainer is configured to compress under a pre-load force from the rotational contact when moving from the free state to the pre-load state upon engagement of said socket body with said load board, said rotational contact comprises a curved portion and a tail, wherein said curved portion and said tail comprise a concave inner surface or said rotational contact comprises a concave surface configured to rest on said elastomer retainer. However, Osato teaches the rotational contact (28) configured to move between a free state and a pre-load state (as shown in fig. 7A-7B), wherein said elastomer retainer (104) is configured to compress under a pre-load force from the rotational contact (28) when moving from the free state to the pre-load state upon engagement of said socket body (100) with said load board (110) (as shown in fig. 7A-7B) and Osato et al. teaches said rotational contact (28) comprises a curved portion (64) and a tail (54), wherein said curved portion and said tail comprise a concave inner surface (58) or said rotational contact (28) comprises a concave surface (58) configured to rest on said elastomer retainer (30).
It would have been obvious, before the effective filing date of the claimed invention, to one of ordinary skill in the art to combine and have the rotational contact configured to move between a free state and a pre-load state, wherein said elastomer retainer is configured to compress under a pre-load force from the rotational contact when moving from the free state to the pre-load state upon engagement of said socket body with said load board, said rotational contact comprises a curved portion and a tail, wherein said curved portion and said tail comprise a concave inner surface or said rotational contact comprises a concave surface configured to rest on said elastomer retainer as taught by Osato and Osato et al. with the invention of Osato et al. in order to accurately and precisely align the contacts in the IC with the probe tips in a timely and secured manner.
Regarding claims 2 and 10, the combination of Osato et al., Osato and Osato et al. teaches the limitations of claims 1 and 9, in addition, Osato et al. teaches wherein said rotational contact (42) comprises a tip (58c) at an opposite end of said tail, said tip configured to engage a contact pad (18) of the semiconductor IC (12) when said rotational contact (42) moves from the pre-load state to the loaded state (as shown in fig. 5).
Regarding claims 3 and 11, the combination of Osato et al., Osato and Osato et al. teaches the limitations of claims 2 and 10, in addition, Osato et al. teaches wherein said tip (58c) of said rotational contact (42) is configured to translate across the contact pad (18) of the semiconductor IC (12) when said rotational contact (42) moves from the pre-load state to the loaded state (as shown in fig. 5).
Regarding claims 4 and 12, the combination of Osato et al., Osato and Osato et al. teaches the limitations of claims 2 and 10, in addition, Osato et al. teaches wherein said rotational contact (42) further comprises a curved portion (64) and a tail (54) at an end opposite the tip, the tail and the concave inner surface (58) are configured to compress said elastomer retainer (30) when said rotational contact (42) moves from the pre-load state to the loaded state (as shown in fig. 5 and disclosed in col. 7, lines 24-34) and said concave inner surface (58) is configured to contact said elastomer retainer (30).
Regarding claims 6 and 14, the combination of Osato et al., Osato and Osato et al. teaches the limitations of claims 1 and 9, in addition, Osato et al. teaches wherein said socket body (40) defines a receptacle into which the semiconductor IC (12) is configured to be set (as shown in fig. 5 and disclosed in col. 7, lines 8-13).
Regarding claims 7 and 15, the combination of Osato et al., Osato and Osato et al. teaches the limitations of claims 1 and 9, in addition, Osato et al. teaches wherein said elastomer retainer (34) is configured to compress under a force from said rotational contact (42) against said socket body (40) (as shown in fig. 5).
Regarding claims 8 and 16, the combination of Osato et al., Osato and Osato et al. teaches the limitations of claims 7 and 15, in addition, Osato et al. teaches wherein said socket body (40) includes an insert (where 62 will be inserted), and wherein said elastomer retainer (34) defines a hole in the top surface configured to receive said insert to hold said elastomer retainer (34) in place with respect to said socket body (40) (as shown in fig. 1 and disclosed in col. 8, lines 3-11).
Regarding claim 17, Osato et al. teaches a method for assembling a test system for a semiconductor (IC) (12), the method comprising: positioning a socket body (40) configured to engage the semiconductor IC (12) and a load board (20) adjacent to a top surface of an elastomer retainer (34), the top surface configured to face the semiconductor IC (12) (as shown in fig. 5), the elastomer retainer (34) further including a bottom surface, opposite the top surface, configured to face said load board (20) (as shown in fig. 5), the elastomer retainer (34) defining a slot (50) extending from the top surface to the bottom surface (as shown in fig. 5); and positioning a rotational contact (42) positioned in the slot (50), the rotational contact configured to move between the pre-load state (cut lines) and a loaded state (solid lines) (as shown in fig. 5), wherein said elastomer retainer (42) is configured to compress under a loading force from the rotational contact (42) when moving from the pre-load state to the loaded state upon engagement of said socket body (40) with the semiconductor IC (12) (as disclosed in col. 8, lines 22-65).
Osato et al. fails to specifically teach the rotational contact configured to move between a free state and a pre-load state, wherein said elastomer retainer is configured to compress under a pre-load force from the rotational contact when moving from the free state to the pre-load state upon engagement of said socket body with said load board, said rotational contact comprises a concave surface configured to rest on said elastomer retainer. However, Osato teaches the rotational contact (28) configured to move between a free state and a pre-load state (as shown in fig. 7A-7B), wherein said elastomer retainer (104) is configured to compress under a pre-load force from the rotational contact (28) when moving from the free state to the pre-load state upon engagement of said socket body (100) with said load board (110) (as shown in fig. 7A-7B) and Osato et al. teaches said rotational contact (28) comprises a concave surface (58) configured to rest on said elastomer retainer (30).
It would have been obvious, before the effective filing date of the claimed invention, to one of ordinary skill in the art to combine and have the rotational contact configured to move between a free state and a pre-load state, wherein said elastomer retainer is configured to compress under a pre-load force from the rotational contact when moving from the free state to the pre-load state upon engagement of said socket body with said load board, said rotational contact comprises a concave surface configured to rest on said elastomer retainer as taught by Osato and Osato et al. with the invention of Osato et al. in order to accurately and precisely align the contacts in the IC with the probe tips in a timely and secured manner.
Regarding claim 18, the combination of Osato et al., Osato and Osato et al. teaches the limitations of claim 17, in addition, Osato et al. teaches further comprising mounting the socket body (40) on the load board (20) (as shown in fig. 5), wherein mounting the socket body (40) on the load board (20) translates the rotational contact (42) toward the socket body (40) into the pre-load state (as shown in fig. 5).
Regarding claim 19, the combination of Osato et al., Osato and Osato et al. teaches the limitations of claim 18, in addition, Osato et al. teaches further comprising setting the semiconductor IC (12) into the socket body (40) (as shown in fig. 5), wherein setting the semiconductor IC (12) into the socket body (40) rotates the rotational contact (42) into the loaded state (as shown in fig. 5).
Regarding claim 20, the combination of Osato et al., Osato and Osato et al. teaches the limitations of claim 19, in addition, Osato et al. teaches wherein setting the semiconductor IC (12) into the socket body (40) translates a tip (58c) of the rotational contact (42) across a contact pad (18) of the semiconductor IC (12) (as shown in fig. 5).
Claims 5 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Osato et al. (US Pat. 7,771,220), Osato (US PGPUB 2010/0190361) and Osato et al. (US PGPUB 2009/0104795) as applied to claims 4 and 12 above, and further in view of Rathburn et al. (US PGPUB 2005/0221675).
Regarding claims 5 and 13, the combination of Osato et al., Osato and Osato et al. teaches the limitations of claims 4 and 12, in addition, Osato et al. teaches wherein said load board (20) comprises a pad (22b), and wherein said tail (58a) of said rotational contact (42) is configured to engage said pad (22b) when in the pre-load state and the loaded state (as shown in fig. 5).
The combination Osato et al., Osato and Osato et al. fails to specifically teach a PCB pad. However, Rathburn et al. teaches a PCB pad (38) (as shown in fig. 2 and disclosed in para. 0059 and 0063).
It would have been obvious, before the effective filing date of the claimed invention, to one of ordinary skill in the art to combine and have the PCB pad as taught by Rathburn et al. with the invention of the combination of Osato et al., Osato and Osato et al. in order to use a well-known device that sends and receives signals for inspections.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROBERTO VELEZ whose telephone number is (571)272-8597. The examiner can normally be reached Mon-Fri 5:30am-3:30pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Huy Phan can be reached at (571)272-7924. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ROBERTO VELEZ/Primary Examiner, Art Unit 2858