DETAILED ACTION
This correspondence is in response to the communications received March 29, 2024. Claims 1-16 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 2 and the claims that depend therefrom are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. The recitation, “disposing, on the photoresist, a mask having a pattern corresponding to a region of the protrusion type electrode and then forming a photoresist pattern by exposing and developing the photoresist”, does not have adequate support to fully understand the method process. The specification does not divulge what type of material beyond that label/name of the “a mask”. For purposes of examination, the “mask” will be broadly interpreted to be any material that could typically be used in semiconductor device fabrication realm. The specification states that Fig. 13 shows the photoresist 10 and the mask 20, so it appears that the mask is used to pattern the photoresist.
Applicant’s Claim to Figure Comparison
It is noted that this comparison is merely for the benefit of reviewers of this office action during prosecution, to allow for an understanding of the examiner’s interpretation of the Applicant’s independent claims as compared to disclosed embodiments in Applicant’s Figures. No response or comments are necessary from Applicant.
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Regarding claim 1, the Applicant discloses in Figs. 1 and 4, a method of manufacturing a ceramic substrate for a power module, the method comprising:
bonding an electrode layer (120) to at least one surface of a ceramic base (110);
forming an electrode pattern (130) by etching the electrode layer (etching steps shown in Figs. 14-16, where 120 is etched to have protrusions 130); and
forming a protrusion type electrode in a remaining region of the electrode pattern except some region of the electrode pattern by half-etching the some region (etching steps shown in Figs. 14-16, where 120 is etched to have protrusions 130),
wherein the protrusion type electrode (130) is disposed to be bonded to an electrode (300) of a semiconductor device (200, see Fig. 4).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US 2016/0133533) in view of Mori (US 10,937,715) in view of Rokubuichi et al. (US 2023/0070214).
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Regarding claim 1, the prior art of Lin discloses in Figs. 31-34, a method of manufacturing a ceramic substrate (“electrically insulative layer 116 may be formed of a wide variety of materials including, by non-limiting example, ceramic materials”, ¶ 0109) for a power module (“Semiconductor devices 126, 128 are bonded to the plurality of metallic traces 120 at the uppermost exposed metal layer of the traces.”, “Examples of semiconductor devices that could be included in various implementations include power devices, insulated-gate bipolar transistors (IGBTs)”, ¶ 0108), the method comprising:
Bonding an electrode layer (“FIG. 32 shows the structure that exists after a first copper layer 140 has been plated on the second surface 122 and a first copper layer 142 has been plated on the first surface 124.”, ¶ 0110. The “bonding” aspect will be addressed below.) to at least one surface of a ceramic base (140 on upper surface of 116);
forming an electrode pattern (See the step from Fig. 32 to 33, where copper layer 140 is patterned from continuous layer to plural individual portions.) by etching the electrode layer (“FIG. 33 illustrates the structure after the first copper layer 140 has been patterned using photoresist or other patterning materials disclosed herein and etched using any of the methods disclosed herein to create traces 144 in the layer 140.”, ¶ 0010); and
forming a protrusion type electrode (plural segments of 140 in Fig. 34 are shown with projections labelled 148 and 150, “copper layer 148 … copper layer 150”, ¶ 0111, hereinafter referred to as ‘PTE’, also in Fig. 31, PTE are referred to as “Referring to Fig. 31 … metallic traces 120”, ¶ 0108) in a remaining region the electrode pattern except some region of the electrode pattern (some of the 140 segments/PTE/120 are thin and some are thick with 148/150 portions),
wherein the protrusion type electrode (PTE/120) is disposed to be bonded to an electrode of a semiconductor device (as can be seen in Fig. 31, the PTE are electrically connected to 126, “Semiconductor devices 126, 128 are bonded to the plurality of metallic traces 120 at the uppermost exposed metal layer of the traces.”, ¶ 0108. The “electrode of a semiconductor device” will be addressed below.).
First, the embodiment of Figs. 32-34 of Lin does not explicitly state that the copper is “bonded” to the ceramic substrate.
The embodiment of Fig. 19 of Lin discloses in ¶ 0086, “As shown in FIG. 19, the copper layer 96, ceramic layer 46 and metallic baseplate 40 are bonded together through a sintering or other similar process used to form intermetallic or other bonding layers between the copper and the ceramic material.”
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the limitation of, “bonding an electrode layer to at least one surface of a ceramic base”, as disclosed by Lin’s embodiment of Fig. 19 in the system of Lin’s embodiment of Figs. 31-34, for the purpose of forming a solid connection between the electrode layer and the insulating base substrate, which can withstand temperature cycling and maintain it’s structural integrity. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Second, Lin does not disclose “forming a protrusion type electrode in a remaining region the electrode pattern except some region of the electrode pattern by half-etching the some region”.
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Mori discloses in Fig. 6A to 6D, forming a protrusion type electrode (“first portion 15a … In use, the power module substrate 10 according to the present embodiment has an electronic component (e.g., the semiconductor device 14) joined to the thickest first portion 15a with a bond (e.g., solder).”, col. 8, lines 60-67) in a region the electrode pattern except some region of the electrode pattern (some portions of “copper plate 22”, col. 13, line 27, have portions which are etched and other portions which are not, the unetched portions protrude from the etched portions.) by half-etching the some region (the “some region” being the region targeted by the etch, whereas the regions not targeted by etch are covered by, “etching resist film 25”, col. 13, line 66. The half etch addressed by, “copper plate 22 is etched to have a thickness smaller than the thickness of the first portion 15a, for example, to half (or substantially half) the thickness of the first portion 15a.”, col. 14, lines 38-41). Mori states the reason to form such a construction as, “to reduce stress at the joint interface between a ceramic plate and the edges of the copper plate”, col. 2, lines 55-60.
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the limitation of, “forming a protrusion type electrode in a remaining region the electrode pattern except some region of the electrode pattern by half-etching the some region”, as disclosed by Mori in the system of Lin, for the purpose of to reduce stress at the joint interface between a ceramic plate and the edges of the copper plate. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Third, Lin discloses “Semiconductor devices 126, 128 are bonded to the plurality of metallic traces 120 at the uppermost exposed metal layer of the traces.”, in ¶ 0108, but does not specify that “wherein the protrusion type electrode is disposed to be bonded to an electrode of a semiconductor device”.
Rokubuichi discloses in Fig. 3, “Semiconductor element 1 is a vertical-type semiconductor element, for example, and includes an upper electrode and a lower electrode. The upper electrode is electrically connected to electronic component 5 through first interconnect member 6. The lower electrode is electrically connected to first lead frame 2 through a bonding member 10 having electrical conductivity.”, ¶ 0053.
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the limitation, “wherein the protrusion type electrode is disposed to be bonded to an electrode of a semiconductor device”, as disclosed by Rokubuichi in the system of Lin et al., for the purpose of allowing for the flow of electricity to the lower electrode of the semiconductor device so as to be able to operate the device as intended. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Claims 2 and 3 are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US 2016/0133533) in view of Mori (US 10,937,715) in view of Rokubuichi et al. (US 2023/0070214) in view of Lee et al. (US 2007/0207391).
Regarding claim 2, the prior art of Lin et al. disclose the method of claim 1, and Mori discloses, wherein the forming of the protrusion type electrode comprises:
forming a photoresist (Fig. 6B, “etching resist film 25”, col. 13, line 66) on the electrode pattern (25 masks portions of 22 that will ultimately become locations where semiconductor device will be bonded to);
half-etching (step of Fig. 6C) some region of the electrode pattern (22) in a thickness direction (vertical) thereof by using the photoresist pattern as a mask (“as shown in FIG. 6C, the portion exposed from the first etching resist films 25 and 25a of the large copper plate 22 is etched to have a thickness smaller than the thickness of the first portion 15a, for example, to half (or substantially half) the thickness of the first portion 15a.”, col. 14, lines 35-41); and
removing the photoresist pattern (“as shown in FIG. 6D, the first etching resist films 25 and 25a are then removed by stripping them off from the large copper plates 22 and 23 using, for example, sodium hydroxide.”, col. 14, lines 46-49).
Lin does not disclose, “disposing, on the photoresist, a mask having a pattern corresponding to a region of the protrusion type electrode and then forming a photoresist pattern by exposing and developing the photoresist”.
Lee discloses in Figs. 1C to 1D, disposing, on the photoresist (“lower photosensitive (photoresist) layer 16A”, ¶ 0024), a mask (“upper photoresist layer 16B”, ¶ 0024) having a pattern corresponding to a target (e.g. analogous to “region of the protrusion type electrode”, the resists 16A and 16B “correspond” to the patterning of 14 in Fig. 1C to 14 in Fig. 1D) and then forming a photoresist pattern by exposing and developing the photoresist (“development process is then carried out to develop both the upper and lower photoresist layers to from differently patterned photoresist layers as exemplified in FIG. 1C”, ¶ 0025).
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the limitation, “disposing, on the photoresist, a mask having a pattern corresponding to a region of the protrusion type electrode and then forming a photoresist pattern by exposing and developing the photoresist”, as disclosed by Lee in the system of Lin/Mori, for the purpose of improving the etch pattern with a more robust mask structure. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Regarding claim 3, the prior art of Lin et al. disclose the method of claim 2, wherein in the half-etching, a depth of the half-etching is half of the thickness of the electrode pattern (Mori discloses this in col. 14, lines 36-41, “as shown in FIG. 6C, the portion exposed from the first etching resist films 25 and 25a of the large copper plate 22 is etched to have a thickness smaller than the thickness of the first portion 15a, for example, to half (or substantially half) the thickness of the first portion 15a”).
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US 2016/0133533) in view of Mori (US 10,937,715) in view of Rokubuichi et al. (US 2023/0070214) in view of Lee et al. (US 2007/0207391) in view of May et al. (US 2019/0250326).
Regarding claim 4, the prior art of Lin et al. disclose the method of claim 2, however Lin et al. do not specify, “wherein the forming of the photoresist comprises attaching a dry film photoresist on the electrode pattern.”
May discloses in ¶ 0018, “Photoresist, such as dry film resist, etc., can be placed over at least a portion of the first metal 105, and patterned to form an etching template”.
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the limitation, “wherein the forming of the photoresist comprises attaching a dry film photoresist on the electrode pattern”, as disclosed by May in the system of Lin/Mori, for the purpose of utilizing a reliable etch masking material to reliably pattern the target electrode material. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US 2016/0133533) in view of Mori (US 10,937,715) in view of Rokubuichi et al. (US 2023/0070214) in view of Chujo et al. (US 2016/0060408).
Regarding claim 5, the prior art of Lin et al. disclose the method of claim 1, however Lin does not disclose, “wherein in the bonding of the electrode layer, the electrode layer is subjected to annealing heat treatment so that thermal stress is removed from the electrode layer.”
Chujo discloses a wiring board in Fig. 1, and discussed in ¶ 0098, “a heat treatment called “annealing” may be performed at about 80 to 180° C. for 10 to 60 minutes or so for the purposes of removing stress in the metal and improving the strength.”
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the limitation, “wherein in the bonding of the electrode layer, the electrode layer is subjected to annealing heat treatment so that thermal stress is removed from the electrode layer”, as disclosed by Chujo in the system of Lin/Mori, for the purpose of improving bond adhesion over thermal cycling. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US 2016/0133533) in view of Mori (US 10,937,715) in view of Rokubuichi et al. (US 2023/0070214) in view of Terasaki et al. (US 2023/0022285).
Regarding claim 6, the prior art of Lin et al. disclose the method of claim 1, however Lin does not disclose,
“wherein the bonding of the electrode layer comprises:
disposing a brazing filler layer having a thickness of 5 µm or more to 100 µm or less between at least one surface of the ceramic base and the electrode layer by using any one method of paste coating, foil attachment, and a P-filler; and
brazing-bonding the brazing filler layer by melting the brazing filler layer.”
Terasaki discloses in Fig. 6,
wherein the bonding of the electrode layer (“copper sheet 22”, is bonded to “ceramic substrate 11”, ¶ 0071) comprises:
disposing a brazing filler layer (“Ag—Ti-based brazing material (Ag—Cu—Ti-based brazing material) 24”, ¶ 0068) having a thickness of 5 µm or more to 100 µm or less (“The thickness of the Ag—Cu—Ti-based brazing material 24 is preferably in a range of 2 μm or more and 10 μm or less.”, ¶ 0069) between at least one surface of the ceramic base (upper surface of 11) and the electrode layer (lower surface of 22) by using any one method of paste coating, foil attachment (analogous to laminating a sheet of brazing material 24 as shown in Fig. 6), and a P-filler; and
brazing-bonding the brazing filler layer by melting the brazing filler layer (“Here, in the heating step S02, a eutectic liquid phase is present at the grain boundary of TiN in the active metal compound layer 41, and Si on the ceramic substrate 11 side and Ag, Cu, and Ti of the Ag—Cu—Ti-based brazing material 24 diffuse into each other by using the eutectic liquid phase as a diffusion path, thereby promoting the interfacial reaction of the ceramic substrate 11.”, ¶ 0077).
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the limitation,
“wherein the bonding of the electrode layer comprises:
disposing a brazing filler layer having a thickness of 5 µm or more to 100 µm or less between at least one surface of the ceramic base and the electrode layer by using any one method of paste coating, foil attachment, and a P-filler; and
brazing-bonding the brazing filler layer by melting the brazing filler layer.”, as disclosed by Terasaki in the system of Lin et al., for the purpose of bonding the copper layer to the ceramic layer of the substrate arrangement. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Regarding claim 7, the prior art of Lin et al. disclose the method of claim 6, and Terasaki discloses, wherein in the disposing of the brazing filler layer, the brazing filler layer is made of a material comprising at least one of Ag, Cu, AgCu, and AgCuTi (“Ag—Ti-based brazing material (Ag—Cu—Ti-based brazing material) 24”, ¶ 0068).
Claims 8 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US 2016/0133533) in view of Mori (US 10,937,715).
Regarding claim 8, the prior art of Lin discloses in Figs. 31-34, a ceramic substrate (“electrically insulative layer 116 may be formed of a wide variety of materials including, by non-limiting example, ceramic materials”, ¶ 0109) for a power module (“Semiconductor devices 126, 128 are bonded to the plurality of metallic traces 120 at the uppermost exposed metal layer of the traces.”, “Examples of semiconductor devices that could be included in various implementations include power devices, insulated-gate bipolar transistors (IGBTs)”, ¶ 0108) on which a plurality of semiconductor devices is mounted (126 mounted on traces 120, which are mounted on 116), the ceramic substrate comprising:
a ceramic base (“electrically insulative layer 116 may be formed of a wide variety of materials including, by non-limiting example, ceramic materials”, ¶ 0109);
an electrode pattern (140/144/120, ¶ 0108, 0110, hereinafter referred to as ‘EP’) formed on at least one surface of the ceramic base (EP on 116); and
a plurality of protrusion type electrodes (protruding patterns of 148/150, ¶ 0111, hereinafter referred to as ‘PTE’) that protrude by some regions of the electrode pattern (PTE protruding from EP, as can be seen in Fig. 31),
wherein the protrusion type electrode (PTE) is disposed to be bonded to an electrode of a semiconductor device (“Semiconductor devices 126, 128 are bonded to the plurality of metallic traces 120 at the uppermost exposed metal layer of the traces”, ¶ 0108).
The embodiment of Lin’s Fig. 31-34 does not specify, “a plurality of protrusion type electrodes that protrude by some regions of the electrode pattern, which have been half-etched”.
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Mori discloses in Fig. 6A to 6D, a plurality of protrusion type electrode (“first portion 15a … In use, the power module substrate 10 according to the present embodiment has an electronic component (e.g., the semiconductor device 14) joined to the thickest first portion 15a with a bond (e.g., solder).”, col. 8, lines 60-67) that protrude by some regions of the electrode pattern (some portions of “copper plate 22”, col. 13, line 27, have portions which are etched and other portions which are not, the unetched portions protrude from the etched portions.) which have been half-etched (the “some region” being the region targeted by the etch, whereas the regions not targeted by etch are covered by, “etching resist film 25”, col. 13, line 66. The half etch addressed by, “copper plate 22 is etched to have a thickness smaller than the thickness of the first portion 15a, for example, to half (or substantially half) the thickness of the first portion 15a.”, col. 14, lines 38-41). Mori states the reason to form such a construction as, “to reduce stress at the joint interface between a ceramic plate and the edges of the copper plate”, col. 2, lines 55-60.
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the limitation of, “a plurality of protrusion type electrodes that protrude by some regions of the electrode pattern, which have been half-etched”, as disclosed by Mori in the system of Lin, for the purpose of to reduce stress at the joint interface between a ceramic plate and the edges of the copper plate. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
It is noted that the limitation of “a plurality of protrusion type electrodes that protrude by some regions of the electrode pattern, which have been half-etched” is considered to be a process limitation, and since the current claim is directed to a device structure, this limitation is considered a “product by process” feature, wherein the claim is directed to the product, and no matter how the structure is actually made, it is the final product which must be determined in a claim directed to an product, and not the patentability of the process. MPEP 2113, I. "[E]ven though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process." In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985)
Regarding claim 9, the prior art of Lin et al. disclose the ceramic substrate of claim 8, and Mori discloses, wherein a thickness of the protrusion type electrode is half of a thickness of the electrode pattern (Mori teaches the half etch addressed by, “copper plate 22 is etched to have a thickness smaller than the thickness of the first portion 15a, for example, to half (or substantially half) the thickness of the first portion 15a.”, col. 14, lines 38-41).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US 2016/0133533) in view of Mori (US 10,937,715) in view of Appelt et al. (US 6,222,136).
Regarding claim 10, the prior art of Lin et al. disclose the ceramic substrate of claim 8, wherein:
the electrode pattern comprises a first electrode pattern formed on a top surface of the ceramic base and a second electrode pattern formed on a bottom surface of the ceramic base, and the protrusion type electrode comprises a plurality of first protrusion type electrodes that protrude by some regions of the first electrode pattern, which have been half-etched.
First, Lin et al. does not disclose,
“the protrusion type electrode comprises … a plurality of second protrusion type electrodes that protrude by some regions of the second electrode pattern, which have been half-etched.”
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Appelt discloses in Fig. 2i, the protrusion type electrode comprises … a plurality of second protrusion type electrodes (42 with protruding portions that protrude downwardly) that protrude by some regions of the second electrode pattern (“metal layers 12 and 42”, col. 7, line 50), which have been etched (“The exposed portions of metal layers 12 and 42 are then etched in the regions where they are not covered by the photoresists 60 and 62”, col. 7, lines 49-51).
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the limitation of, “the protrusion type electrode comprises … a plurality of second protrusion type electrodes that protrude by some regions of the second electrode pattern, which have been etched.”, as disclosed by Appelt in the system of Lin et al., for the purpose of to reduce stress at the joint interface between a ceramic plate and the edges of the copper plate on both sides of the substrate. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Second, Appelt does not specify that the etching is etched to a half etch, “electrode pattern, which have been half-etched”.
Mori discloses in Fig. 6A to 6D, electrode pattern, which have been half-etched (The half etch addressed by, “copper plate 22 is etched to have a thickness smaller than the thickness of the first portion 15a, for example, to half (or substantially half) the thickness of the first portion 15a.”, col. 14, lines 38-41). Mori states the reason to form such a construction as, “to reduce stress at the joint interface between a ceramic plate and the edges of the copper plate”, col. 2, lines 55-60.
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the limitation of, “a plurality of protrusion type electrodes that protrude by some regions of the electrode pattern, which have been half-etched”, as disclosed by Mori in the system of Lin, for the purpose of to reduce stress at the joint interface between a ceramic plate and the edges of the copper plate. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Claims 11 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Ikeda (US 8,673,691) in view of Lin et al. (US 2016/0133533) in view of Mori (US 10,937,715).
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Regarding claim 11, the prior art of Ikeda discloses in Figs. 5A-5C, a power module (electrical arrangement module for 20, where 20 is, “the semiconductor element 20 is the so-called power semiconductor element and, for example, corresponds to a RC-IGBT element. In addition to the RC-IGBT element, for example, a usual IGBT element, a power MOSFET,”, col. 5, lines 33-37. Where Fig. 1 and Fig. 5A-5C are teaches of the “first embodiment”, col. 4, lines 12-25) comprising:
a pair of ceramic substrates (10aa, 10ba are the substrates which are ceramic, “a ceramic material containing at least any one of silicon nitride (SiN), alumina (Al.sub.2O.sub.3), and aluminum nitride (AlN) can be used for the above-described insulating plates 10aa, 10ba”, col. 7, lines 41-44, which will be hereinafter referred to as ‘CS’) in each of which an electrode pattern (at least 10ad, 10ac, 10ab, 10bc, 10bb, “copper (Cu) or a metal containing copper (Cu) as the main component can be used for the metal foils 10ab, 10ac, 10ad, 10bb, and 10bc.”, col. 7, lines 45-47, where the “electrode pattern” will hereinafter be referred to as ‘EP’) has been formed in at least one surface of the ceramic base (EP on surfaces of CS); and
a plurality of semiconductor devices (“semiconductor elements 20a, 20b”, col. 8, lines 39) disposed between the pair of ceramic substrates (20a, 20b formed between CS:10aa, 10ba).
First, Ikeda does not disclose,
“wherein each of the pair of ceramic substrates comprises a plurality of protrusion type electrodes that protrude by some regions of the electrode pattern, which have been half-etched, and
the protrusion type electrode provided in at least one of the pair of ceramic substrates is bonded to an electrode of the semiconductor device.”
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Lin discloses in Figs. 31-34,
wherein the ceramic substrate (116, “electrically insulative layer 116 (which may be a ceramic layer”, ¶ 0108) comprises a plurality of protrusion type electrodes (“metallic traces 120”, ¶ 0108) that protrude by some regions of the electrode pattern (148, 150 are protruding portions of 120, ¶ 0111, where other portions of 120 are not protruding), and
the protrusion type electrode provided in the ceramic substrates is bonded to an electrode of the semiconductor device (“Semiconductor devices 126, 128 are bonded to the plurality of metallic traces 120 at the uppermost exposed metal layer of the traces.”, ¶ 0108).
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the limitation of, “wherein each of the pair of ceramic substrates comprises a plurality of protrusion type electrodes that protrude by some regions of the electrode pattern, which have been half-etched, and
the protrusion type electrode provided in at least one of the pair of ceramic substrates is bonded to an electrode of the semiconductor device”, as disclosed by Lin in the system of Ikeda, for the purpose of to reduce stress at the joint interface between a ceramic plate and the edges of the copper plate. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Second, Ikeda/Lin do not disclose, “plurality of protrusion type electrodes that protrude by some regions of the electrode pattern, which have been half-etched”.
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Mori discloses in Fig. 6A to 6D, plurality of protrusion type electrodes (“first portion 15a … In use, the power module substrate 10 according to the present embodiment has an electronic component (e.g., the semiconductor device 14) joined to the thickest first portion 15a with a bond (e.g., solder).”, col. 8, lines 60-67) that protrude by some regions of the electrode pattern (some portions of “copper plate 22”, col. 13, line 27, have portions which are etched and other portions which are not, the unetched portions protrude from the etched portions.) which have been half-etched (the “some region” being the region targeted by the etch, whereas the regions not targeted by etch are covered by, “etching resist film 25”, col. 13, line 66. The half etch addressed by, “copper plate 22 is etched to have a thickness smaller than the thickness of the first portion 15a, for example, to half (or substantially half) the thickness of the first portion 15a.”, col. 14, lines 38-41). Mori states the reason to form such a construction as, “to reduce stress at the joint interface between a ceramic plate and the edges of the copper plate”, col. 2, lines 55-60.
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the limitation of, “plurality of protrusion type electrodes that protrude by some regions of the electrode pattern, which have been half-etched”, as disclosed by Mori in the system of Ikeda/Lin, for the purpose of to reduce stress at the joint interface between a ceramic plate and the edges of the copper plate. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Regarding claim 12, the prior art of Lin et al. disclose the power module of claim 11, and Mori specifies, wherein a thickness of the protrusion type electrode is half of a thickness of the electrode pattern (“copper plate 22 is etched to have a thickness smaller than the thickness of the first portion 15a, for example, to half (or substantially half) the thickness of the first portion 15a.”, col. 14, lines 38-41). Mori states the reason to form such a construction as, “to reduce stress at the joint interface between a ceramic plate and the edges of the copper plate”, col. 2, lines 55-60.
Claims 13-15 are rejected under 35 U.S.C. 103 as being unpatentable over Ikeda (US 8,673,691) in view of Lin et al. (US 2016/0133533) in view of Mori (US 10,937,715) in view of Appelt et al. (US 6,222,136).
Regarding claim 13, the prior art of Ikeda et al. disclose the ceramic substrate of claim 11, wherein:
the electrode pattern comprises a first electrode pattern formed on a top surface of the ceramic base and a second electrode pattern formed on a bottom surface of the ceramic base, and the protrusion type electrode comprises a plurality of first protrusion type electrodes that protrude by some regions of the first electrode pattern, which have been half-etched.
First, Lin et al. does not disclose,
“the protrusion type electrode comprises … a plurality of second protrusion type electrodes that protrude by some regions of the second electrode pattern, which have been half-etched.”
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Appelt discloses in Fig. 2i, the protrusion type electrode comprises … a plurality of second protrusion type electrodes (42 with protruding portions that protrude downwardly) that protrude by some regions of the second electrode pattern (“metal layers 12 and 42”, col. 7, line 50), which have been etched (“The exposed portions of metal layers 12 and 42 are then etched in the regions where they are not covered by the photoresists 60 and 62”, col. 7, lines 49-51).
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the limitation of, “the protrusion type electrode comprises … a plurality of second protrusion type electrodes that protrude by some regions of the second electrode pattern, which have been etched.”, as disclosed by Appelt in the system of Lin et al., for the purpose of to reduce stress at the joint interface between a ceramic plate and the edges of the copper plate on both sides of the substrate. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Second, Appelt does not specify that the etching is etched to a half etch, “electrode pattern, which have been half-etched”.
Mori discloses in Fig. 6A to 6D, electrode pattern, which have been half-etched (The half etch addressed by, “copper plate 22 is etched to have a thickness smaller than the thickness of the first portion 15a, for example, to half (or substantially half) the thickness of the first portion 15a.”, col. 14, lines 38-41). Mori states the reason to form such a construction as, “to reduce stress at the joint interface between a ceramic plate and the edges of the copper plate”, col. 2, lines 55-60.
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the limitation of, “a plurality of protrusion type electrodes that protrude by some regions of the electrode pattern, which have been half-etched”, as disclosed by Mori in the system of Lin, for the purpose of to reduce stress at the joint interface between a ceramic plate and the edges of the copper plate. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Regarding claim 14, the prior art of Ikeda et al. disclose the power module of claim 13, wherein in each of the pair of ceramic substrates, any one of the first protrusion type electrode and the second protrusion type electrode is bonded to the electrode of the semiconductor device (Lin shows in Fig. 31, “Semiconductor devices 126, 128 are bonded to the plurality of metallic traces 120 at the uppermost exposed metal layer of the traces.”, ¶ 0108. Where the combination rejection modifying the two substrate arrangement of Ikeda on top and bottom surfaces of the semiconductor devices 20a, 20b).
Regarding claim 15, the prior art of Ikeda et al. disclose the power module of claim 13, wherein in each of the pair of ceramic substrates (Ikeda’s 10ba, 10aa), at least one of the first protrusion type electrode and the second protrusion type electrode (protrusion electrodes shown by Lin in previous combination rejections which this claim depends) is formed to have an area corresponding to the electrode of the semiconductor device (where in Fig. 31 of Lin, the footprint of 120 are commensurate with fully supporting 126).
Allowable Subject Matter
Claim 16 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
“[Claim 16] The power module of claim 13, wherein a number of first protrusion type electrodes and a number of second protrusion type electrodes are identical with each other.”
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/EDUARDO A RODELA/Primary Examiner, Art Unit 2893
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