DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Group I (claims 1-8) in the reply filed on 11/10/2025 is acknowledged. The traversal is on the ground(s) that Groups I and II have the special technical feature of “bombarding the intrinsic silicon film by a plasma gas, and repeating a process of depositing the intrinsic silicon film and a process of bombarding the intrinsic silicon film with the plasma gas for 0 to 50 times to form an intrinsic silicon layer, wherein repeating for 0 times is that the method comprises one process of depositing the intrinsic silicon film and one process of bombarding the intrinsic silicon film by the plasma gas” and the intrinsic polycrystalline silicon layer of CN ‘926 is different from the intrinsic silicon layer of the present application. Therefore, Groups I and II meet the requirement of unity of invention. This is not found persuasive because the special technique feature identified by the applicant does not make a contribution over the prior art as the special technical feature identified by applicant is disclosed by Adachi (US 2020/0144440) in paragraphs [0039], [0047], and [0077]. Specifically, Adachi discloses performing a plasma treatment on an intrinsic silicon-based film 12/22 (the claimed intrinsic silicon film) using a hydrogen gas that can be performed from 1 to a plurality of times to form an intrinsic silicon-based layer (the claimed intrinsic silicon layer) in a solar cell device.
The requirement is still deemed proper and is therefore made FINAL.
Claims 9-12 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected invention, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 11/10/2025.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement filed 3/29/2024 fails to comply with 37 CFR 1.98(a)(3)(i) because it does not include a concise explanation of the relevance, as it is presently understood by the individual designated in 37 CFR 1.56(c) most knowledgeable about the content of the information, of each reference listed that is not in the English language, specifically the Chinese Office Action dated February 11, 2023 and the Chinese Office Action dated March 23, 2023. It has been placed in the application file, but the information referred to therein has not been considered.
The information disclosure statement filed 2/20/2025 fails to comply with 37 CFR 1.98(a)(3)(i) because it does not include a concise explanation of the relevance, as it is presently understood by the individual designated in 37 CFR 1.56(c) most knowledgeable about the content of the information, of each reference listed that is not in the English language, specifically the Chinese Office Action dated February 9, 2023. It has been placed in the application file, but the information referred to therein has not been considered.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the subject matter of claims 1 and 6, specifically showing a wafer with the claimed layers formed thereon and with the region of the intrinsic layer that is plasma treated, must be shown or the feature(s) canceled from the claim(s). Currently, the only Figure shows only the process steps in words and not images of the layers being formed on a wafer. No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-8 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites in lines 3 and 4 that a silicon oxide doped layer is disposed “on one side” of a silicon wafer and that a first crystalline silicon doped layer is disposed “on one side” of the silicon wafer. It is unclear if the silicon oxide and first crystalline silicon layers are formed on the same “one side” are formed on different sides of the silicon wafer. Examiner interprets that the silicon oxide is formed on a “first side” of the silicon wafer and the first crystalline silicon doped layer is formed on a “second side” of the silicon wafer. Claims 2-8 inherit the deficiencies of claim 1. Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 2, 5, and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Zhao et al (CN 203325952 and Zhao hereinafter; a machine translation is used as an English language equivalent) in view of Richter et al (“Versatility of doped nanocrystalline silicon oxide for applications in silicon thin-film and heterojunction solar cells” and Richter hereinafter) in view of Xuancheng (CN 113437184 and Xuancheng hereinafter; a machine translation is used as an English language equivalent) in view of Adachi (US 2020/0144440 and Adachi hereinafter).
As to claims 1, 2, 5, and 8: Zhao discloses [claim 1] a method for preparing a bifacial solar cell (Figs. 1 and 2; [0002] and [0004]), characterized by comprising following steps: providing a silicon wafer (1; [0013]) with a silicon oxide layer (4 can be silicon oxide; [0013]) disposed on one side (bottom of 1) and a first silicon doped layer (2 is formed by implanting phosphorous ions into the silicon substrate and is thus a silicon doped layer; [0013] and [0014]) disposed on one side (top of 1), and depositing an intrinsic silicon film (5; [0013]) on a surface (bottom of 4) of the silicon oxide layer (4); and depositing a second crystalline silicon doped layer (6 can be microcrystalline, which is interpreted to be crystalline as it comprises crystalline regions; [0013]) on a surface (bottom surface) of the intrinsic silicon layer (5), wherein the silicon wafer is N-type, the second crystalline silicon doped layer is N-type, and the first crystalline silicon doped layer is P-type; or, the silicon wafer (1) is P-type (p-type; [0013]), and the first silicon doped layer (2) is N-type (n-type; [0013]).
Zhao fails to expressly disclose where [claim 1] the silicon oxide layer is doped.
Richter discloses a solar cell where [claim 1] the silicon oxide layer is doped (Fig. 1, (III); as an interlayer film, doped silicon oxide can be used adjacent to the silicon substrate; page 197).
Given the teachings of Richter, a person having ordinary skill in the art before the effective filing date of the claimed invention would have readily recognized the desirability and advantages of modifying Zhao by employing the well-known or conventional features of solar cell fabrication, such as displayed by Richter, by employing a doped silicon oxide film instead of an undoped silicon oxide film in order to reduce the parasitic absorption of light (page 197, Section 3, paragraph 2).
Zhao in view of Richter fail to expressly disclose [claim 1] where the first silicon layer is crystalline; where the intrinsic layer is formed using a silicon source as a raw material; where the second crystalline silicon doped layer is formed by using a silicon source and a second doping source as a raw material; where the second crystalline silicon doped layer is P-type; [claim 5] wherein the first crystalline silicon doped layer disposed on one side of the silicon wafer is prepared by following steps: using a first doping source and a silicon source as raw materials, and forming the first crystalline silicon doped layer by diffusing and depositing the first doping source and the silicon source on one side of the silicon wafer, the first doping source comprises a boron source; and/or,the silicon oxide doped layer disposed on one side of the silicon wafer is prepared by following steps: using an oxidizing agent and a silicon source as raw materials, depositing the silicon oxide doped layer on one side of the silicon wafer, the oxidizing agent comprises at least one of a nitrous oxide gas, an oxygen gas, or an ozone gas; [claim 8] wherein the second doping source is a phosphorus source, the phosphorus source is at least one of a phosphane, a phosphorus oxychloride, or a phosphoryl bromide; and/or, the silicon source is silane.
Xuancheng discloses a solar cell [claim 1] where the first silicon layer is crystalline (Fig. 1; the first silicon layer 5 can be microcrystalline, which is interpreted to be crystalline as it comprises crystalline regions; [0026] and [0042]); where the intrinsic layer (Fig. 1; 3 is an intrinsic silicon layer; [0041]) is formed using a silicon source as a raw material (silicon tetrahydride; [0041]); where the second crystalline silicon doped layer (Fig. 1; the second silicon layer 4 can be microcrystalline, which is interpreted to be crystalline as it comprises crystalline regions; [0042]) is formed by using a silicon source and a second doping source as a raw material (silicon tetrahydride as a raw material and phosphine as a dopant raw material; [0042]); where the second crystalline silicon doped layer (4) is P-type (the dopant of the second silicon doped layer matches the dopant of the substrate and would be p-type when used to modify Zhao, but in Xuancheng is shown to be n-type, the same as the substrate; [0039] and [0042]); [claim 5] wherein the first crystalline silicon doped layer (5) disposed on one side of the silicon wafer (1; [0039]) is prepared by following steps: using a first doping source (doping source is dependent on the conductivity of the layer, either phosphine or diborane; [0017] and [0042]) and a silicon source (silicon source is silicon tetrahydride; [0042]) as raw materials, and forming the first crystalline silicon doped layer by diffusing and depositing the first doping source and the silicon source on one side of the silicon wafer ([0042]), the first doping source comprises a boron source (doping source is dependent on the conductivity of the layer, either phosphine or diborane; [0017] and [0042]); and/or, the silicon oxide doped layer disposed on one side of the silicon wafer is prepared by following steps: using an oxidizing agent and a silicon source as raw materials, depositing the silicon oxide doped layer on one side of the silicon wafer, the oxidizing agent comprises at least one of a nitrous oxide gas, an oxygen gas, or an ozone gas; [claim 8] wherein the second doping source is a phosphorus source (doping source is dependent on the conductivity of the layer, either phosphine or diborane; [0017] and [0042]), the phosphorus source is at least one of a phosphane, a phosphorus oxychloride, or a phosphoryl bromide (phosphane; [0042]); and/or, the silicon source is silane.
Given the teachings of Xuancheng, a person having ordinary skill in the art before the effective filing date of the claimed invention would have readily recognized the desirability and advantages of modifying Zhao in view of Richter by employing the well-known or conventional features of solar cell fabrication, such as displayed by Xuancheng, by employing crystalline materials for the first and second silicon layers, using a silicon source for the intrinsic amorphous layer, using a silicon source and dopant source for the second crystalline layer, matching the dopant type of the second silicon doped layer to that of the substrate (in Zhao’s case, p-type), and form the silicon doped layers using a desired conductivity type dopant source and silicon source in order to provide a solar cell with superior performance ([0047]).
Zhao in view of Richter in view of Xuancheng fail to expressly disclose [claim 1] bombarding the intrinsic silicon film by a plasma gas, and repeating a process of depositing the intrinsic silicon film and a process of bombarding the intrinsic silicon film with the plasma gas for 0 to 50 times to form an intrinsic silicon layer, wherein repeating for 0 times is that the method comprises one process of depositing the intrinsic silicon film and one process of bombarding the intrinsic silicon film by the plasma gas; [claim 2] wherein in a process of bombarding the intrinsic silicon film by the plasma gas, a bombardment time is in a range of 0.1 s to 600 s; and/or, the plasma gas is at least one of an argon gas, a nitrogen gas or a hydrogen gas.
Adachi discloses a solar cell where the intrinsic silicon film is formed by [claim 1] bombarding the intrinsic silicon film (Figs. 1 and 3A-3B; 12/22; [0039] and [0047]) by a plasma gas (plasma treatment using hydrogen gas; [0039]), and repeating a process of depositing the intrinsic silicon film and a process of bombarding the intrinsic silicon film with the plasma gas for 0 to 50 times to form an intrinsic silicon layer (Figs. 4A-4D; plasma treatment of intrinsic silicon film can be performed after each sublayer is formed; [0077]-[0080]), wherein repeating for 0 times is that the method comprises one process of depositing the intrinsic silicon film and one process of bombarding the intrinsic silicon film by the plasma gas ([0039] and [0047]); [claim 2] wherein in a process of bombarding the intrinsic silicon film by the plasma gas, a bombardment time is in a range of 0.1 s to 600 s (3 seconds or more and 140 seconds or less; [0072]); and/or, the plasma gas is at least one of an argon gas, a nitrogen gas or a hydrogen gas (hydrogen gas; [0047]).
Given the teachings of Adachi, a person having ordinary skill in the art before the effective filing date of the claimed invention would have readily recognized the desirability and advantages of modifying Zhao in view of Richter in view of Xuancheng by employing the well-known or conventional features of solar cell fabrication, such as displayed by Adachi, by employing a hydrogen plasma treatment on the intrinsic silicon layer after each sub-layer formation for a desired amount of time in order to provide an intrinsic silicon film with improved film quality ([0013]).
Claims 3, 4, and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Zhao in view of Richter in view of Xuancheng in view of Adachi as applied to claim 1 above, and further in view of Zhang et al (CN 111987182 and Zhang hereinafter; a machine translation is used as an English language equivalent).
As to claim 3: Although the method disclosed by Zhao in view of Richter in view of Xuancheng in view of Adachi shows substantial features of the claimed invention (discussed in paragraph 14 above), it fails to expressly disclose:
wherein after depositing the second crystalline silicon doped layer, the method further comprises a step of an annealing treatment, wherein an annealing temperature is in a range of 600 °C to 1000 °C and an annealing time is in a range of 5 min to 35 min.
Zhang discloses a solar cell wherein after depositing the second crystalline silicon doped layer (Fig. 1; 16; [0034]), the method further comprises a step of an annealing treatment (annealing; [0034]), wherein an annealing temperature is in a range of 600 °C to 1000 °C (600 °C -950 °C; [0034]) and an annealing time is in a range of 5 min to 35 min (20-60 minutes; [0034]).
Given the teachings of Zhang, a person having ordinary skill in the art before the effective filing date of the claimed invention would have readily recognized the desirability and advantages of modifying Zhao in view of Richter in view of Xuancheng in view of Adachi by employing the well-known or conventional features of solar cell fabrication, such as displayed by Zhang, by employing an annealing step on the second silicon doped layer in order to form a polycrystalline silicon doped layer (still interpreted as crystalline as there are crystalline regions) that allows for reduced film stress and good film adhesion with the film that doesn’t burst when it is made to a desired thickness ([0020]).
As to claim 4: Although the method disclosed by Zhao in view of Richter in view of Xuancheng in view of Adachi shows substantial features of the claimed invention (discussed in paragraph 14 above), it fails to expressly disclose:
further comprising a step of depositing an anti- reflection layer on a surface of the second crystalline silicon doped layer using a silicon nitride as a raw material.
Zhang discloses a solar cell further comprising a step of depositing an anti- reflection layer (Fig. 1; 17; [0032]) on a surface (bottom) of the second crystalline silicon doped layer (16; [0032]) using a silicon nitride as a raw material (“as a raw material” is interpreted to mean –the material of the anti-reflection layer–, 17 can be silicon nitride; [0032]).
Given the teachings of Zhang, a person having ordinary skill in the art before the effective filing date of the claimed invention would have readily recognized the desirability and advantages of modifying Zhao in view of Richter in view of Xuancheng in view of Adachi by employing the well-known or conventional features of solar cell fabrication, such as displayed by Zhang, by employing a silicon nitride anti-reflection layer on a surface of the second silicon doped layer in order to reduce reflection in the device ([0031]-[0032]).
As to claim 6: Although the method disclosed by Zhao in view of Richter in view of Xuancheng in view of Adachi shows substantial features of the claimed invention (discussed in paragraph 14 above), it fails to expressly disclose:
further comprising a step of depositing an anti-reflection layer on a surface of the first crystalline silicon doped layer using a silicon nitride as a raw material.
Zhang discloses a solar cell further comprising a step of depositing an anti- reflection layer (Fig. 1; 12; [0031]) on a surface (top) of the first crystalline silicon doped layer (11; [0031]) using a silicon nitride as a raw material (“as a raw material” is interpreted to mean –the material of the anti-reflection layer–, 12 can be silicon nitride; [0031]).
Given the teachings of Zhang, a person having ordinary skill in the art before the effective filing date of the claimed invention would have readily recognized the desirability and advantages of modifying Zhao in view of Richter in view of Xuancheng in view of Adachi by employing the well-known or conventional features of solar cell fabrication, such as displayed by Zhang, by employing a silicon nitride anti-reflection layer on a surface of the second silicon doped layer in order to reduce reflection in the device ([0031]).
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Zhao in view of Richter in view of Xuancheng in view of Adachi in view of Zhang as applied to claim 6 above, and further in view of Chen et al (CN 113707570 and Chen hereinafter; a machine translation is used as an English language equivalent).
Although the method disclosed by Zhao in view of Richter in view of Xuancheng in view of Adachi in view of Zhang shows substantial features of the claimed invention (discussed in paragraph 18 above), it fails to expressly disclose:
wherein after depositing the anti-reflection layer (14 and 15; [0071] and [0161]), the method further comprises a step of screen printing (screen printed; [0071] and [0161]) a gate line (gate line; [0068] and [0158]) on a surface of the anti-reflection layer (14 and 15) and sintering (sintering; [0071] and [0161]) to form a positive electrode and a negative electrode respectively, wherein a sintered temperature is 830 °C (temperature can be 750 °C -875 °C; [0071] and [0161]).
Given the teachings of Chen, a person having ordinary skill in the art before the effective filing date of the claimed invention would have readily recognized the desirability and advantages of modifying Zhao in view of Richter in view of Xuancheng in view of Adachi in view of Zhang by employing the well-known or conventional features of solar cell fabrication, such as displayed by Chen, by employing a screen printing and sintering process to form positive and negative electrode gate lines in order to improve the efficiency of the solar cell ([0005]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSEPH C NICELY whose telephone number is (571)270-3834. The examiner can normally be reached Monday-Friday 7:30 am - 4 pm, EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Gauthier can be reached at (571) 270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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JOSEPH C. NICELY
Primary Examiner
Art Unit 2813
/JOSEPH C. NICELY/ Primary Examiner, Art Unit 2813
1/2/2026