Prosecution Insights
Last updated: August 17, 2026
Application No. 18/698,336

WIRING SUBSTRATE AND METHOD FOR MANUFACTURING SAME, LIGHT-EMITTING PANEL, AND DISPLAY APPARATUS

Non-Final OA §102
Filed
Apr 03, 2024
Priority
Jun 24, 2022 — CN 202210731172.0 +1 more
Examiner
HENRY, CALEB E
Art Unit
Tech Center
Assignee
BOE Technology Group Co., Ltd.
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
1087 granted / 1253 resolved
+26.8% vs TC avg
Moderate +6% lift
Without
With
+6.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
36 currently pending
Career history
1288
Total Applications
across all art units

Statute-Specific Performance

§101
1.3%
-38.7% vs TC avg
§103
55.4%
+15.4% vs TC avg
§102
34.5%
-5.5% vs TC avg
§112
6.0%
-34.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1253 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 2, 6, 9, 10 and 12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Bok (20210193769). Regarding claim 1, Bok teaches a wiring substrate (fig. 7: 10), comprising: a substrate (fig. 8: 100); a plurality of metal traces (fig. 8: 1211; please note that a metal trace is taken to mean a thin conductive path made of metal) disposed on a side of the substrate; and an insulative layer (fig. 8: 119) disposed on the same side of the substrate as the plurality of metal traces, wherein the insulative layer is disposed in a region other than the metal traces (please see 119 is in areas wherein 1211 is absent) and on a portion of surfaces of the metal traces (please see 119 atop 1211), a distance between a surface, away from the substrate, of the insulative layer and the substrate is greater than a distance between a surface, away from the substrate, of the metal trace and the substrate (please see fig. 8 which shows this relationship between 119 and 1211), the surface, away from the substrate, of the insulative layer is capable of reflecting light (par. 162 and 222 teach the pixel defining layers can be made of reflecting material which allows for controlled directing of emittance), and a first aperture is formed in the insulative layer, the first aperture exposing a portion of the surface of each of the metal traces (please see 119 being atop a surface of 1211 in fig. 8). Regarding claim 2, Bok teaches a wiring substrate according to claim 1, wherein a material of the insulative layer comprises white ink, and the insulative layer covers the metal traces at locations other than the first aperture (par. 162 and 222; as seen in 119 covers multiple surfaces of 1211). Regarding claim 6, Bok teaches a wiring substrate according to claim 1, wherein each of the metal traces comprises a body metal layer and an alloy layer that are stacked, the alloy layer being disposed on a surface, away from the substrate, of the body metal layer (par. 178 and 179). Regarding claim 9, Bok teaches a wiring substrate according to claim 1, further comprising: an inorganic protective layer (fig. 8: 150; par. 171), wherein the inorganic protective layer covers the metal traces and an exposed surface of the substrate, the insulative layer is disposed on a side, facing away from the substrate, of the inorganic protective layer, and a second aperture is formed in the inorganic protective layer, an overlapping region being present between an orthographic projection of the second aperture on the substrate and an orthographic projection of the first aperture on the substrate (please see fig. 8). Regarding claim 10, Bok teaches a wiring substrate according to claim 9, wherein a material of the inorganic protective layer comprises one or more of silicon oxide, silicon nitride, or silicon oxynitride (par. 171). Regarding claim 12, Bok teaches a method for preparing a wiring substrate, comprising forming a plurality of metal traces on a side of a substrate; and forming an insulative layer on the side, on which the plurality of metal traces are formed, of the substrate (please see fig. 8 which shows 119 must be formed atop 1211), wherein the insulative layer is disposed in a region other than the metal traces and on a portion of surfaces of the metal traces, a distance between a surface of a side, away from the substrate, of the insulative layer and the substrate is greater than a distance between a surface of a side, distal form the substrate, of the metal trace and the substrate, the surface, away from the substrate, of the insulative layer is capable of reflecting light, and a first aperture is formed in the insulative layer, the first aperture exposing a portion of the surface of each of the metal traces (please see rejection of claim 1). Claims 1-3, 12, 19 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Takehara (20160260878). Regarding claim 1, Takehara teaches a wiring substrate, comprising: a substrate (fig. 4B: 20); a plurality of metal traces (fig. 4B: 212) disposed on a side of the substrate; and an insulative layer (fig. 4B: 25 + 26) disposed on the same side of the substrate as the plurality of metal traces, wherein the insulative layer is disposed in a region other than the metal traces and on a portion of surfaces of the metal traces (please see fig. 4B), a distance between a surface, away from the substrate, of the insulative layer and the substrate is greater than a distance between a surface, away from the substrate, of the metal trace and the substrate (please see fig. 4B), the surface, away from the substrate, of the insulative layer is capable of reflecting light (par. 19 teaches 25 + 26 is a white resist), and a first aperture is formed in the insulative layer, the first aperture exposing a portion of the surface of each of the metal traces (par. 19 teaches 25 + 26 is a white resist). Regarding claim 2, Takehara teaches a wiring substrate according to claim 1, wherein a material of the insulative layer comprises white ink, and the insulative layer covers the metal traces at locations other than the first aperture (par. 19 and fig. 4B). Regarding claim 3, Takehara teaches a wiring substrate according to claim 1, wherein the insulative layer comprises a photoresist layer and a reflective layer; wherein the photoresist layer is disposed in the region other than the metal traces, and the first aperture comprises a first sub-aperture, the first sub-aperture running through the photoresist layer; and the reflective layer is at least disposed on a surface of a side, away from the substrate, of the photoresist layer (par. 19 and 20 teach white photoresist has reflective properties). Regarding claim 12, Takehara teaches a method for preparing a wiring substrate, comprising forming a plurality of metal traces (fig. 4B: 21) on a side of a substrate; and forming an insulative layer (fig. 4B: 26) on the side, on which the plurality of metal traces are formed, of the substrate, wherein the insulative layer is disposed in a region other than the metal traces and on a portion of surfaces of the metal traces, a distance between a surface of a side, away from the substrate, of the insulative layer and the substrate is greater than a distance between a surface of a side, distal form the substrate, of the metal trace and the substrate, the surface, away from the substrate, of the insulative layer is capable of reflecting light, and a first aperture is formed in the insulative layer, the first aperture exposing a portion of the surface of each of the metal traces (please see fig. 4B). Regarding claim 19, Takehara teaches a light-emitting panel, comprising: a wiring substrate (fig. 4B: 2), and a plurality of light-emitting diode chips (please see LED chips in fig. 3B and 4B), wherein; the wiring substrate comprises: a substrate (fig. 4B: 20); a plurality of metal traces (fig. 4B: 21) disposed on a side of the substrate; and an insulative layer (fig. 4B 26) disposed on the same side of the substrate as the plurality of metal traces, wherein the insulative layer is disposed in a region other than the metal traces and on a portion of surfaces of the metal traces, a distance between a surface, away from the substrate, of the insulative layer and the substrate is greater than a distance between a surface, away from the substrate, of the metal trace and the substrate, the surface, away from the substrate, of the insulative layer is capable of reflecting light, and a first aperture is formed in the insulative layer, the first aperture exposing a portion of the surface of each of the metal traces; and the plurality of light-emitting diode chips are correspondingly connected to the plurality of metal traces (please see fig. 4B). Regarding claim 20, Takehara teaches a display device, comprising: the light-emitting panel as defined in claim 19 (please see fig. 4B). Allowable Subject Matter Claim 4 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 5 is objected to as being dependent on claim 4. Claim 7 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 8 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 11 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 13 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claims 14-17 are objected to as being dependent on claim 13. Claim 18 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion, Any inquiry concerning this communication or earlier communications from the examiner should be directed to CALEB E HENRY whose telephone number is (571)270-5370. The examiner can normally be reached Mon-Fri. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CALEB E HENRY/Primary Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Apr 03, 2024
Application Filed
Jul 30, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
93%
With Interview (+6.1%)
2y 3m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1253 resolved cases by this examiner. Grant probability derived from career allowance rate.

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