DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-11 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
With regards to claim 1, the limitations of “used for improving the lyophilicity .. so as to improve the uniformity” is indefinite. The claim is defining the steps by its intended outcome rather than the physical steps or parameters. The metes and bounds of the claim are not defined because it fails to define how much improvement in lyophilicity is required and it doesn’t specify the level of uniformity that must be achieved. Appropriate correction is required
Regarding claims 2 & 4-9, the term "preferably" renders the claims indefinite because it is unclear whether the limitation(s) following the term are part of the claimed invention. See MPEP § 2173.05(d).
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 & 10 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sang (CN 10539374 A)
Regarding claim 1, Sang et al discloses A method for treating a semiconductor substrate layer, comprising: providing a monocrystalline silicon wafer(N-type monocrystalline silicon chip)(Example 3 para 1,pp.9); spraying a diffusion liquid(boron source) onto a surface of the monocrystalline silicon wafer (N-type monocrystalline silicon chip)(Example 3 para 1 5, & 6,pp.9/pp 10); and annealing the monocrystalline silicon wafer(Example 3 para 7, pp 10), and wherein the method further comprises the following steps: subjecting the monocrystalline silicon wafer to a surface oxidation treatment before spraying the diffusion liquid onto the surface of the monocrystalline silicon wafer (Example 3 pp. para 4 p 9-10), wherein the surface oxidation treatment is used for improving the lyophilicity of the surface of the monocrystalline silicon wafer to the diffusion liquid(the hydrogen peroxide is the oxygen cleaning treatment for the prewetting of the diffusion liquid in step 5 (Example 3 para 4-7, pp 9 and 10) , so as to improve the uniformity of the annealing the monocrystalline silicon wafer (Example 3 para 1-4 pp.9 & 10; pp. 4 pp1).
.
Regarding claim 10, Sang et al discloses a method for preparing a solar cell
the method for treating a semiconductor substrate layer of claim 1(Example 3 para 1-4 pp.9 & 10; pp. 4 pp1).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sang (CN 10539374 A) in view of Harder (US pub no. 2019/0288148 A1)
Regarding claim 2, Sang et al discloses all the claim limitations of claim 1 but fails to teach the step of surface oxidation treatment comprises spraying an oxygen- containing gas onto the surface of the monocrystalline silicon wafer preferably, the oxygen-containing gas comprises ozone; preferably, the concentration of the oxygen-containing gas is in a range from 50 ppm to 300 ppm; preferably, the injection rate of the oxygen-containing gas is in a range from 0.5slm to 5slm; preferably, the oxygen-containing gas is sprayed for a time period ranging from 5 seconds to 30 seconds; and preferably, in the step of the surface oxidation treatment, the oxygen-containing gas is sprayed vertically toward the surface of the monocrystalline silicon wafer
However, Harder et al discloses exposing a lyophilic surface to an oxygen containing gas(ozone environment [0034-0035] (Rejected in view of 35 U.S.C. 112(b)but fails to teach the concentration of the oxygen-containing gas is in a range from 50 ppm to 300 ppm; preferably, the injection rate of the oxygen-containing gas is in a range from 0.5slm to 5slm; preferably, the oxygen-containing gas is sprayed for a time period ranging from 5 seconds to 30 seconds; and preferably, in the step of the surface oxidation treatment, the oxygen-containing gas is sprayed vertically toward the surface of the monocrystalline silicon wafer. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to achieve the concentration of the oxygen-containing gas is in a range from 50 ppm to 300 ppm; preferably, the injection rate of the oxygen-containing gas is in a range from 0.5slm to 5slm; preferably, the oxygen-containing gas is sprayed for a time period ranging from 5 seconds to 30 seconds; and preferably, in the step of the surface oxidation treatment, the oxygen-containing gas is sprayed vertically toward the surface of the monocrystalline silicon wafer through routine experimentation to optimize the wetting behavior of surfaces W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.”In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) Furthermore, it would have been obvious to modify Sang et al with the teachings of Harder et al to control a desired lyophilic/lyophobic condition.
Claim(s) 3,4, & 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sang (CN 10539374 A) in view of Chen( CN 103824761 A) cited in IDS
Regarding claim 3, Sang et al discloses all the claim limitations of claim 1 but fails to teach the surface oxidation treatment causes an oxide layer to be formed on the surface of the monocrystalline silicon wafer; a diffusion annealing treatment on the surface of the monocrystalline silicon wafer associated with spraying the diffusion liquid and annealing the monocrystalline silicon wafer causes the diffusion ions in the diffusion liquid to diffuse into the partial thickness of the monocrystalline silicon wafer through the oxide layer, so as to form a doped layer covered by the oxide layer in the partial thickness of the monocrystalline silicon wafer, and the diffusion annealing treatment is suitable for migrating impurities inside the monocrystalline silicon wafer to the doped layer, and preferably, the diffusion annealing treatment is a chain diffusion annealing treatment.
However, Chen et al discloses the surface oxidation treatment causes an oxide layer to be formed on the surface of the monocrystalline silicon wafer[0037][0023-when monocrystalline is used]; a diffusion annealing treatment on the surface of the monocrystalline silicon wafer associated with spraying the diffusion liquid and annealing the monocrystalline silicon wafer causes the diffusion ions in the diffusion liquid to diffuse into the partial thickness of the monocrystalline silicon wafer through the oxide layer[0037-0039], so as to form a doped layer covered by the oxide layer in the partial thickness of the monocrystalline silicon wafer, and the diffusion annealing treatment is suitable for migrating impurities inside
the monocrystalline silicon wafer to the doped layer, and preferably, the diffusion annealing treatment is a chain diffusion annealing treatment[0040-0041]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Sang et al with Chen et al to effectively improve the uniformity of diffusion.
Regarding claim 4, Chen et al discloses wherein: the oxide layer has a thickness; and preferably, the material of the monocrystalline silicon wafer comprises monocrystalline silicon, and the material of the oxide layer comprises silicon oxide[0023][0037] but fails to teach ranging from 0.5nm to 20nm. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to achieve a range 0.5nm to 20nm through routine experimentation. [W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.”In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)
Regarding claim 6, Chen et al discloses the diffusion liquid comprises a phosphoric acid solution; and preferably, the mass concentration of the phosphoric acid solution is in a range from 2% to 12%[0027].
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sang (CN 10539374 A) in view of Schmidt US Pub no. 2018/0190919 A1)
Regarding claim 1, Sang et al discloses all the claim limitations of claim 10 but fails to teach performing texturing treatment on the semiconductor substrate layer;
forming a first intrinsic semiconductor layer on one side surface of the semiconductor substrate layer after performing texturing treatment, and forming a second intrinsic semiconductor layer on the other side surface of the semiconductor substrate layer;
forming a first doped semiconductor layer on the side of the first intrinsic semiconductor layer facing away from the semiconductor substrate layer, and forming a second doped semiconductor layer on a side of the second intrinsic semiconductor layer facing away from the semiconductor substrate layer; forming a first transparent conductive film on a side of the first doped
semiconductor layer facing away from the semiconductor substrate layer, and forming a second transparent conductive film on a side of the second doped semiconductor layer facing away from the semiconductor substrate layer; and forming a first grid electrode on a side of the first transparent conductive film facing away from the semiconductor substrate layer, and forming a second grid electrode on a side of the second transparent conductive film facing away from the semiconductor
substrate layer.
However, Schmidt et al discloses performing texturing treatment on the semiconductor substrate layer[0125] pp 10 lines 1-5; forming a first intrinsic semiconductor layer(3’) on one side surface of the semiconductor substrate layer (2)after performing texturing treatment[0031][0125] pp. 10 lines 19-21, and forming a second intrinsic semiconductor layer(4) on the other side surface of the semiconductor substrate layer(2) [0031][0125] pp. 10 lines 19-21; forming a first doped semiconductor layer(n+ regions 2’) on the side of the first intrinsic semiconductor layer facing away from the semiconductor substrate layer(2), and forming a second doped semiconductor layer on a side of the second intrinsic semiconductor layer facing away from the semiconductor substrate layer; forming a first transparent conductive film (TCO) [0031]on a side of the first doped semiconductor layer facing away from the semiconductor substrate layer, and forming a second transparent conductive film on a side of the second doped semiconductor layer facing away from the semiconductor substrate layer; and forming a first grid electrode(7) on a side of the first transparent conductive film facing away from the semiconductor substrate layer, and forming a second grid electrode on a side of the second transparent conductive film facing away from the semiconductor substrate layer[0125]. It would have been obvious to one of ordinary skill in the art before the effective fling date of the invention to modify Schmidt et al with the teachings of Sang et al to fabricate a solar cell device.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LATANYA N CRAWFORD EASON whose telephone number is (571)270-3208. The examiner can normally be reached Monday-Friday 8:30 AM-4:30 PM.
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/LATANYA N CRAWFORD EASON/Primary Examiner, Art Unit 2813
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