DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Pore et al (US 2019/0177843) in view of Tominaga et al (WO 2020/012916 A1), where US 2021/0202839 is used as an accurate translation.
Pore et al teaches a method of forming a crystallized stacked structural body comprising forming a comprising: a stacked structural body-forming step of forming a stacked structural body in which an Sb2Te3 layer, which contains Sb2Te3 as a main component thereof; a GeTe layer, which contains GeTe as a main component thereof , are stacked ([0218]-[0284]; [0394]-[0414]; Fig 12, 13a and 13b teaches a GeTe/Sb2Te3 nanolaminate comprising a plurality of GT and ST cycle sequences), the step being performed under a temperature of less than 100°C including room temperature ([0410] teaches the GT/ST nanolaminate prepared at 80°C) ; an Sb2Te3 layer-crystallizing step of crystallizing the Sb2Te3 layer by heating and holding the stacked structural body at a first crystallization temperature of 100°C or more and less than 170°C; and a GeTe layer-crystallizing step of crystallizing the GeTe layer by heating and holding the stacked structural body in which the Sb2Te3 layer is crystallized at a second crystallization temperature of 170°C or more and 400°C or less ([0394]-[0414]; Fig 12, 13a and 13b teaches initial amorphous samples crystallized at 150°C to the cubic phase and later on at 350ׄ°C to the stable hexagonal phase; Fig 12 teaches annealing at 100° to 250°C). It is also noted that temperature is a result effective variable; therefore, It would have been obvious to one of ordinary skill in the art at the time of filing to modify Pore et al by optimizing the temperature during annealing to crystallize the nanolaminate by conducting routine experimentation to obtain the claimed temperature ranges. (MPEP 2144.05).
Pore et al does not teach the Sb2Te3 has a thickness of from 2 nm to 10 nm, and a GeTe layer, has a thickness of more than 0 nm and 4 nm or less, are stacked, and at least one trace addition element selected from a group consisting of S and Se is incorporated at a content of from 0.05 at% to 10.0 at% into the GeTe layer on an orientation control layer configured to give, to the Sb2Te3 layer and the GeTe layer at a time of crystallization thereof, a common crystal axis.
In a method of making a stacked structure, Tominaga et al teaches an alloy layer B of Sb2Te3 has a thickness of from 2 nm to 10 nm, and an alloy layer A of GeTe layer, has a thickness of more than 0 nm and 4 nm or less, are stacked, and at least one trace addition element selected from a group consisting of S and Se is incorporated at a content of from 0.05 at% to 10.0 at% into alloy A (Sb2Te3 ) or alloy layer B (GeTe layer), wherein the structure containing the chalcogen atoms (S or Se) can not only suppress diffusion of Ge atoms from the alloy layer A to the side of the alloy layer B but also stabilize a phase change of the alloy layer A based on the atomic arrangement of Ge atoms and Te atoms; and an explicit example a 3 nm thick Sb2Te3 and a 0.8 nm GeTe alloy layer and annealed at 210°C (‘839 [0076]-[0112]).
It would have been obvious to one of ordinary skill in the art at the time of filing to modify Pore et al by having the Sb2Te3 has a thickness of from 2 nm to 10 nm, and a GeTe layer, has a thickness of more than 0 nm and 4 nm or less, are stacked, because the claimed thicknesses are known for producing a semiconductor device, as taught by Tominaga et al, and at least one trace addition element selected from a group consisting of S and Se is incorporated at a content of from 0.05 at% to 10.0 at% into the GeTe layer, as taught by Tominaga et al, to suppress diffusion of Ge atoms from the alloy layer A to the side of the alloy layer B but also stabilize a phase change of the alloy layer A based on the atomic arrangement of Ge atoms and Te atoms.
In regards to at least one trace addition element selected from a group consisting of S and Se is incorporated at a content of from 0.05 at% to 10.0 at% into the GeTe layer an orientation control layer configured to give, to the Sb2Te3 layer and the GeTe layer at a time of crystallization thereof, a common crystal axis,” this merely recites a motivation to include S or Se into the GeTe layer. The combination of Pore et al and Tominaga et al teaches adding S or Se into the GeTe layer at a content of from 0.05 at% to 10.0 at%; therefore, meets the claimed limitation. The fact that the inventor has recognized another advantage which would flow naturally from following the suggestion of the prior art cannot be the basis for patentability when the differences would otherwise be obvious. See Ex parte Obiaya, 227 USPQ 58, 60 (Bd. Pat. App. & Inter. 1985). Furthermore, the effect would be expected because a similar method is expected to produce similar results.
Referring to claim 2, the combination of Pore et al and Tominaga et al teaches adding S or Se, and an explicit example of adding S at 3 at% to a 0.8 nm thick GeTe alloy layer (Tominaga ‘839 [0107]-[0112]).
Referring to claim 3, the combination of Pore et al and Tominaga et al teaches stacking layers of GeTe and Sb2Te3 on layers having the claimed thickness (Tominaga ‘839 [0077]-[0112]).
Referring to claim 4, the combination of Pore et al and Tominaga et al teaches deposition temperatures are from about 20°C to about 200°C (Pore [0056]), which overlaps room temperature. It would have been obvious to one of ordinary skill in the art at the time of filing to modify the combination of Pore et al and Tominaga et al by using room temperature because temperature is a result effective variable and within the range taught by the combination of Pore et al and Tominaga et al. (MPEP 2144.05).
Referring to claim 5, the combination of Pore et al and Tominaga et al teaches repeating the steps to produce stacked structure having a desired thickness (Tominaga ‘839 [0077]-[0112]); Pore [0394]-[0414]).
Referring to claim 6, the combination of Pore et al and Tominaga et al teaches annealing in under a N2 flow (Pore [0411]), which clearly suggests air.
Referring to claim 7, the combination of Pore et al and Tominaga et al teaches part of the structural body and all of the structural body (Pore [0410]-[0414]; Tominaga ‘839 [0077]-[0112]).
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Pore et al (US 2019/0177843) in view of Tominaga et al (WO 2020/012916 A1), where US 2021/0202839 is used as an accurate translation, as applied to claims 1-7 above, and further in view of Wang et al (“Intermixing during Epitaxial Growth of van der Waals Bonded Nominal GeTe/Sb2Te3 Superlattices” from IDS filed 04/12/2024).
The combination of Pore et al and Tominaga et al teaches all of the limitations of claim 8, as discussed above, except forming an epitaxial layer.
In a method of epitaxial growth of GeTe/Sb2Te3 Superlattices, Wang et al teaches GeTe/ Sb2Te3 chalcogenide superlattice structures (CSL) have boasted better performances; and an improved CSL structure with both materials epitaxially stacked on top of each (pg 3596).
It would have been obvious to one of ordinary skill in the art at the time of filing to modify the combination of Pore et al and Tominaga et al by forming epitaxial layer on the structure, as taught by Wang et al, because epitaxial layers increase performance.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Saito et al (US 2017/0062711) teaches superlattice structure 209 is as a superlattice structure formed by alternately laminating the first crystal orientation layer containing, for example, Sb2Te3 as a main component and having a thickness of 1 nm or more and 10 nm or less, and the second crystal orientation layer containing, for example, GeTe as a main component and having a thickness of more than 0 nm and 4 nm or less, and the thickness of the entire superlattice structure 209 is set to, for example, a range from 2 nm to 50 nm ([0165]).
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MATTHEW J. SONG
Examiner
Art Unit 1714
/MATTHEW J SONG/ Primary Examiner, Art Unit 1714
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