DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 10/1/2024 was filed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-6, 12-13, 15, 18 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Li (US 2024/0221606) in view of Seo (US 2020/0135120).
Regarding claim 1, Li discloses, in at least figures 1-4 and related text, a display panel, comprising:
a base ([54]) comprising a first surface (upper (frontside) surface of base substrate, [54]) and a second surface (lower (backside) surface of base substrate, [54]) located on opposite sides of the base respectively;
a pixel array ([54]) provided on the first surface of the base ([54]), wherein the pixel array comprises a plurality of pixel units (1, [54]) arranged in an array along a first direction (horizontal direction, figures) and a second direction (vertical direction, figures), at least one pixel unit (1, [54]) comprises a plurality of light-emitting diodes ([58]), and the light-emitting diodes ([58]) each comprise a first electrode (negative electrode, [21]) and a second electrode (positive electrode, [21]); and
a signal processing chip (2, [54]) provided on the first surface of the base ([54]), wherein the signal processing chip (2, [54]) comprises at least one signal channel terminal (7, [63]) electrically connected to the first electrode (negative electrode, [21]) of at least one of the light-emitting diodes ([58]).
Li does not explicitly disclose the signal processing chip further comprises one or more wireless signal receiving terminals, the one or more wireless signal receiving terminals being configured to receive at least one signal wirelessly, and the at least one signal comprises a data signal.
Seo teaches, in at least figures 1-3 and related text, the device comprising the signal processing chip (DDI, [78]) further comprises one or more wireless signal receiving terminals (BI, [90]), the one or more wireless signal receiving terminals (BI, [90]) being configured to receive at least one signal wirelessly ([78]), and the at least one signal comprises a data signal ([78]), for the purpose of providing display device having a printed circuit board (“PCB”) and a display panel wirelessly connected to each other ([5]) thereby reducing effectively manufacturing process time.
Li and Seo are analogous art because they all are directed to display device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Li with the specified features of Seo because they are from the same field of endeavor.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the structure disclosed in Li to have the signal processing chip further comprising one or more wireless signal receiving terminals, the one or more wireless signal receiving terminals being configured to receive at least one signal wirelessly, and the at least one signal comprising a data signal, as taught by Seo, for the purpose of providing display device having a printed circuit board (“PCB”) and a display panel wirelessly connected to each other ([5], Seo) thereby reducing effectively manufacturing process time. as described above.
Regarding claim 2, Li in view of Seo discloses the display panel of claim 1 as described above.
Seo teaches, in at least figures 1-3 and related text, the at least one signal further comprises a power supply voltage signal ([25], [79]), for the purpose of providing display device having a printed circuit board (“PCB”) and a display panel wirelessly connected to each other ([5]) thereby reducing effectively manufacturing process time.
Regarding claim 3, Li in view of Seo discloses the display panel of claim 1 as described above.
Li further discloses, in at least figures 1-4 and related text, the signal processing chip (2, [54]) is a pixel driver chip for driving a pixel unit (1, [54]).
Regarding claim 4, Li in view of Seo discloses the display panel of claim 3 as described above.
Li further discloses, in at least figures 1-4 and related text, a plurality of signal processing chips (2, [54]) are provided on the first surface of the base ([54]), each signal processing chip (2, [54]) is configured to drive a respective one pixel unit (1, [54]), and each signal processing chip (2, [54]) comprises a plurality of signal channel terminals (7, [63]) electrically connected to first electrodes (negative electrode, [21]) of a plurality of light-emitting diodes ([58]) of the respective one pixel unit (1, [54]) in a one-to-one correspondence.
Regarding claim 5, Li in view of Seo discloses the display panel of claim 4 as described above.
Li further discloses, in at least figures 1-4 and related text, a ground line (GND, [72]) provided on the first surface of the base ([54]), the ground line (GND, [72]) being configured to transmit a ground signal,
wherein each signal processing chip (2, [54]) further comprises a ground signal terminal (6, [72]), the ground signal terminal (6, [72]) being electrically connected to the ground line (GND, [72]) through wired connection.
Regarding claim 6, Li in view of Seo discloses the display panel of claim 5 as described above.
Li further discloses, in at least figures 1-4 and related text, in each signal processing chip (2, [54]) for driving a respective one pixel unit (1, [54]), an orthographic projection of the ground signal terminal (6, [72]) on the base ([54]) and orthographic projections of the plurality of signal channel terminals (7, [63]) on the base ([54]) are arranged in a column along the second direction (vertical direction, figures).
Regarding claim 12, Li in view of Seo discloses the display panel of claim 3 as described above.
Li further discloses, in at least figures 1-4 and related text, the signal processing chip (2, [54]) is configured to drive more than one pixel unit (1, [54]), the signal processing chip (2, [54]) comprises a plurality of signal terminal groups (7, [63]), and each signal terminal group (7, [63]) comprises more than one signal channel terminal (7, [63]); and
the more than one signal channel terminal (7, [63]) of each signal terminal group (7, [63]) of the signal processing chip (2, [54]) is electrically connected to first electrodes (negative electrode, [21]) of a plurality of light-emitting diodes ([58]) of one pixel unit (1, [54]) in a one-to-one correspondence.
Regarding claim 13, Li in view of Seo discloses the display panel of claim 12 as described above.
Li further discloses, in at least figures 1-4 and related text, the more than one pixel unit (1, [54]) driven by the signal processing chip (2, [54]) comprises pixel units (1, [54]) located in two rows adjacent to each other, and/or, pixel units (1, [54]) located in two columns adjacent to each other.
Regarding claim 15, Li in view of Seo discloses the display panel of claim 12 as described above.
Li further discloses, in at least figures 1-4 and related text, a plurality of signal processing chips (2, [54]) are provided on the first surface of the base ([54]), arranged in at least one chip column (200, [50]) parallel to a pixel column (100, [50]) in the pixel array, and the chip column (200, [50]) is between two pixel columns (100, [50]) adjacent to each other.
Regarding claim 18, Li in view of Seo discloses the display panel of claim 1 as described above.
Li further discloses, in at least figures 1-4 and related text, the signal processing chip is a general control chip (9, [81]); and
the display panel further comprises one of more pixel driver chips (2, [54]) for driving the pixel units (1, [54]) on the first surface of the base ([54]), and the general control chip (9, [81]) is in wired connection with the one or more pixel driver chips (2, [54]) to perform signal transmission with the one or more pixel driver chip chips (2, [54]).
Regarding claim 20, Li in view of Seo discloses the display panel of claim 1 as described above.
The limitation of "A display device comprising the display panel of claim 1" has not patentable weight because it is interpreted as intended use.
Claim(s) 7-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Li (US 2024/0221606) in view of Seo (US 2020/0135120), and further in view of Bibl (US 2015/0169011).
Regarding claim 7, Li in view of Seo discloses the display panel of claim 5 as described above.
Li in view of Seo does not explicitly disclose a circuit board and a ground signal lead, wherein the circuit board is provided on the second surface of the base, at least a part of the ground signal lead is provided on a first side surface of the base, and the first side surface is a side surface of the base between the first surface and the second surface; the circuit board is electrically connected to the ground line through the ground signal lead.
Bibl teaches, in at least figures 2B-5B and related text, the device comprising a circuit board (234, [57]) and a ground signal lead (206, [53]), wherein the circuit board (234, [57]) is provided on the second surface of the base (202, [58]), at least a part of the ground signal lead (206, [53]) is provided on a first side surface of the base (202, [58]), and the first side surface is a side surface of the base (202, [58]) between the first surface (upper surface of 202, figures) and the second surface (upper surface of 202, figures); the circuit board (234, [57]) is electrically connected to the ground line (Vss line, [53]) through the ground signal lead (206, [53]), for the purpose of providing plurality of interconnects being through vias that extend through the display substrate from the front surface to the back surface ([11]) thereby improving effectively packaging.
Li, Seo, and Bibl are analogous art because they all are directed to display device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Li in view of Seo with the specified features of Bibl because they are from the same field of endeavor.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the structure disclosed in Li in view of Seo to have the circuit board and a ground signal lead, wherein the circuit board is provided on the second surface of the base, at least a part of the ground signal lead is provided on a first side surface of the base, and the first side surface is a side surface of the base between the first surface and the second surface; the circuit board being electrically connected to the ground line through the ground signal lead, as taught by Bibl, for the purpose of providing plurality of interconnects being through vias that extend through the display substrate from the front surface to the back surface ([11], Bibl) thereby improving effectively packaging.
Regarding claim 8, Li in view of Seo and Bibl discloses the display panel of claim 7 as described above.
Li further discloses, in at least figures 1-4 and related text, a plurality of power supply signal lines (VGB/VR, [68]) provided on the first surface of the base ([54]), wherein second electrodes (positive electrode, [21]) of a plurality of light-emitting diodes ([58]) of the respective one pixel unit (1, [54]) are electrically connected to the plurality of power supply signal lines (VGB/VR, [68]), respectively.
Regarding claim 9, Li in view of Seo and Bibl discloses the display panel of claim 8 as described above.
Bibl teaches, in at least figures 2B-5B and related text, a power supply signal lead (204, [59]), wherein at least a part of the power supply signal lead (204, [59]) is provided on the first side surface (upper surface of 202, figures) of the base (202, [58]); the circuit board (234, [57]) is electrically connected to the power supply signal line (Vdd, [59]) through the power supply signal lead (204, [59]), for the purpose of providing plurality of interconnects being through vias that extend through the display substrate from the front surface to the back surface ([11]) thereby improving effectively packaging.
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Li (US 2024/0221606) in view of Seo (US 2020/0135120), and further in view of Sakariya (US 2014/0168037).
Regarding claim 10, Li in view of Seo discloses the display panel of claim 5 as described above.
Li in view of Seo does not explicitly disclose the ground line comprises a first ground sub-line extending in the first direction and a second ground sub-line extending in the second direction, and the first ground sub-line and the second ground sub-line intersect with each other to form a mesh.
Sakariya teaches, in at least figure 1 and related text, the device comprising the ground line (ground (Vss), [41], [44]) comprises a first ground sub-line extending in the first direction (horizontal direction, figure) and a second ground sub-line extending in the second direction (vertical direction, figure), and the first ground sub-line and the second ground sub-line intersect with each other to form a mesh (figure), for the purpose of providing microcontroller network having fault tolerance ([34]).
Li, Seo, and Sakariya are analogous art because they are directed to display device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Li in view of Seo with the specified features of Sakariya because they are from the same field of endeavor.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the structure disclosed in Li in view of Seo to have the ground line comprising a first ground sub-line extending in the first direction and a second ground sub-line extending in the second direction, and the first ground sub-line and the second ground sub-line intersect with each other to form a mesh, as taught by Sakariya, for the purpose of providing microcontroller network having fault tolerance ([34], Sakariya).
Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Li (US 2024/0221606) in view of Seo (US 2020/0135120), and further in view of Cok (US 2020/0051482).
Regarding claim 19, Li in view of Seo discloses the display panel of claim 18 as described above.
Li in view of Seo does not explicitly disclose a plurality of general control chips and pixel driver chips are provided, each of the general control chips being in wired connection with a plurality of the pixel driver chips to perform signal transmission with the plurality of the pixel driver chips.
Cok teaches, in at least figures 1A-1C and related text, the device comprising a plurality of general control chips (92/94, [60]) and pixel driver chips (30, [49]) are provided, each of the general control chips (92/94, [60]) being in wired connection with a plurality of the pixel driver chips (30, [49]) to perform signal transmission with the plurality of the pixel driver chips (30, [49]), for the purpose of providing matrix-addressed systems with small high-resolution elements and circuits that are tolerant of manufacturing and materials variability and particle contamination and enable repair ([7]).
Li, Seo, and Cok are analogous art because they are directed to display device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Li in view of Seo with the specified features of Cok because they are from the same field of endeavor.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the structure disclosed in Li in view of Seo to have the plurality of general control chips and pixel driver chips being provided, each of the general control chips being in wired connection with a plurality of the pixel driver chips to perform signal transmission with the plurality of the pixel driver chips, as taught by Cok, for the purpose of providing matrix-addressed systems with small high-resolution elements and circuits that are tolerant of manufacturing and materials variability and particle contamination and enable repair ([7], Cok).
Allowable Subject Matter
Claim 11 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record neither anticipates nor render obvious the limitations of the base claims 1, 3, 4, 5, 10, and 11 that recite "each of an orthographic projection of the ground signal terminal on the base and orthographic projections of the plurality of signal channel terminals on the base at least partially overlaps with an orthographic projection of the second ground sub-line on the base, respectively" in combination with other elements of the base claims 1, 3, 4, 5, 10, and 11.
Claim 14 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record neither anticipates nor render obvious the limitations of the base claims 1, 3, 12, and 14 that recite "each signal terminal group further comprises a ground signal terminal, and a plurality of ground signal terminals of the plurality of signal terminal groups of the signal processing chip are electrically connected to a plurality of ground lines through wired connection" in combination with other elements of the base claims 1, 3, 12, and 14.
Claims 16-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record neither anticipates nor render obvious the limitations of the base claims 1, 3, 12, 15, and 16 that recite "for a same one of the signal processing chips, orthographic projections of ground signal terminals and signal channel terminals in at least two signal terminal groups for driving pixel units in a same column on the base are arranged in a column along the second direction" in combination with other elements of the base claims 1, 3, 12, 15, and 16.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TONG-HO KIM whose telephone number is (571)270-0276. The examiner can normally be reached Monday thru Friday; 8:30 AM to 5PM.
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/TONG-HO KIM/Primary Examiner, Art Unit 2811
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