DETAILED ACTION
Foreign Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 4/17/24 is in compliance with the provisions of 37 CFR 1.97 and 1.98. Accordingly, the information disclosure statement has been considered by the examiner.
The information disclosure statement (IDS) submitted on 4/26/24 is in compliance with the provisions of 37 CFR 1.97 and 1.98. Accordingly, the information disclosure statement has been considered by the examiner.
The information disclosure statement (IDS) submitted on 7/6/25 is in compliance with the provisions of 37 CFR 1.97 and 1.98. Accordingly, the information disclosure statement has been considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(B) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim(s) 1-11 is/are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant) regards as the invention.
Claim 1 recites the limitations:
an element separation section including an insulating film that is formed to be embedded on the side of the second surface and extending in the first direction along the plurality of pixel transistors arranged in the first direction,
the element separation section being divided at at least a portion of an intersection of the pixel separation section that extends in the first direction and the second direction in a plan view,
the element separation section electrically separating the plurality of pixel transistors and the plurality of light-receiving sections from each other.
The metes and bounds of the claimed limitation can not be determined for the following reasons: the claim is unclear into which element or layer the element separation section is embedded, because instead of reciting “formed to be embedded in” an element or layer, it is recites “is formed to be embedded on the side of the second surface”.
Furthermore, it is unclear what is required by the limitation “the element separation section being divided at at least a portion of an intersection of the pixel separation section that extends in the first direction and the second direction in a plan view”. It is unclear what other element or layer the element separation section is divided from. Fig. 6 shows some examples of the element separation section, denoted in the specification text as 115 or 116. However, the label for 115 points to only a single area, surrounded by a roughly rectangular-shaped feature, and 116 points with an arrowhead simultaneously to an area that is surrounded by a solid roughly rectangular-shaped feature and to an area surrounded by a roughly square-shaped dotted box. Furthermore, very few of the features in Fig. 6 are actually labeled so as to be able to understand what films or elements they refer to. The various transistors RST, AMP, RST, and SEL are generally pointed to with arrows having arrowheads, but where they begin or end are not clear, and the various elements or films that make up the transistors are not labeled. The features in between transistors are not labeled either, so the various films or elements making up the structures in between the transistors are not clear. Figs. 7A and 7B provide a cross-sectional view along II-II’ and III-III’ of Fig. 6, respectively. However, it is not clear which plan view Fig. 6 shows. In other words, it does not appear that this is a top view of the device of Fig. 3 (of which Fig. 7A-7B appear to show only the middle thereof) because the features 131 and 101 are not present in Fig. 6; it does not appear that Fig. 6 shows the bottom view of the device of Fig. 3, because 121 is not labeled in Fig. 6. Thus, the actual structure of 115 is only shown in Fig. 7A, the actual structure of 116 is not shown in any figure, and the teachings of Fig. 7A do not make it possible to understand what is required by the limitation “the element separation section being divided at at least a portion of an intersection of the pixel separation section that extends in the first direction and the second direction in a plan view”.
Claims 2-11 depend from claim 1 and inherit its deficiencies.
Claim 2 recites the limitation “wherein a well contact region that applies fixed electric charge to the semiconductor substrate is formed on the second surface where the element separation section is divided.”
The metes and bounds of the claimed limitation can not be determined for the following reasons: it is unclear what the limitation “a well contact region… is formed on the second surface where the element separation section is divided” requires. See the discussion of claim 1 regarding the unclarity of “where the element separation section is divided.” Fig. 7B shows the well contact region (“WellCon”) and clearly the element separation section (115) is not present. But, the element separation does not appear to be “divided” in this area, because it is not present at all.
Claim 3 recites the limitation “wherein the pixel separation section at and near the intersection protrudes closer to the side of the second surface than the pixel separation section in another region.”
The metes and bounds of the claimed limitation can not be determined for the following reasons: the limitation “near” is unclear. The term "near" is a relative term that renders the claim indefinite. It is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. Neither the claims, nor the specification, defines what distances from the intersection are close enough to be “near” the intersection, and what distances from the intersection are not close enough so they are not “near” the intersection. Thus, determining whether one is infringing the limitation is subjective, rather than objective, and the claim is unclear.
Claim 4 recites the limitation: the element separation section is divided at at least a portion of the intersection of the pixel separation section provided at a boundary between a plurality of the pixel units provided side by side in the first direction or the second direction in a plan view.
The metes and bounds of the claimed limitation can not be determined for the following reasons:
the limitation is not clearly worded, so that it is unclear what other elements, film, or layer the pixel separation section intersects with;
furthermore, it is unclear what the limitation “at a boundary between a plurality fo pixel units” refers to: whether it refers to the element separation section, or where the element separation section is divided, or if it refers to the portion of the intersection.
Claim 5 recites the limitation: wherein the plurality of light-receiving pixels is partitioned into a plurality of pixel blocks including the plurality of light-receiving pixels including color filters of same color, and are arranged in a two-dimensional array, with four pixel blocks, among the plurality of pixel blocks, being used as a minimum repeating unit, the four pixel blocks being provided side by side in the first direction and the second direction, and the element separation section is divided at at least a portion of the intersection of the pixel separation section provided at a boundary between the plurality of pixel blocks provided side by side in a plan view.
The metes and bounds of the claimed limitation can not be determined for the following reasons:
The limitation is not clearly worded, so it is unclear what ”are arranged in a two-dimensional array” refers to: whether it is the plurality of pixels, whether it is the plurality of pixel blocks,, or if it is the color filters of same color.
the limitation is not clearly worded, so that it is unclear what other elements, film, or layer the pixel separation section intersects with;
furthermore, it is unclear what the limitation “at a boundary between the plurality of pixel blocks” refers to: whether it refers to the element separation section, or where the element separation section is divided, or if it refers to the portion of the intersection.
Claim 11 recites the limitation “further comprising a conversion efficiency switching transistor as the plurality of pixel transistors.” The metes and bounds of the claimed limitation can not be determined for the following reasons: it is unclear if the device of claim 1 is intended to additionally comprise a conversion efficiency switching transistor, or if (somehow) a plurality of pixel transistors is supposed to be equated with a single conversion efficiency switching transistor. In the latter case, it is unclear how plural transistors equate with a single transistor.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102, some of which form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 and 9 is/are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by US 2019/0043901 A1 (“Honda”).
Honda teaches, for example:
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Honda teaches:
1. An imaging device comprising:
a semiconductor substrate (e.g. 101, see e.g. Fig. 4A, or 163, see e.g. Figs. 2 and 12) having a first surface and a second surface opposed to each other and including a plurality of light-receiving sections,
the plurality of light-receiving sections (e.g. sections including photodiodes PD, see e.g. Figs. 2 and 12) including a plurality of light-receiving pixels being arranged in a two-dimensional array in a first direction X-direction and a second direction Y-direction intersecting the first direction (see e.g. Figs. 2B and 12B),
the plurality of light-receiving sections generating electric charge corresponding to a received light amount for each of the light-receiving pixels by photoelectric conversion (this is what photodiodes do, see e.g. para 104, 113, 129);
a pixel separation section (e.g. rear deep trench isolation RDTI 62, see e.g. para 109-110) including an insulating film (silicon oxide, see e.g. para 135) and extending in the first direction and the second direction between the light-receiving pixels adjacent to each other to surround each of the plurality of light-receiving pixels, the pixel separation section extending from the first surface toward the second surface;
a plurality of pixel transistors (see e.g. para 102, 108; see e.g. 73, para 118, 192; pixel transistor 315 and logic transistors, para 138, 202) provided on a side of the second surface (see e.g. Figs. 2D and 12C and para 118) and arranged in the first direction to overlap with the pixel separation section extending in the first direction in a plan view (see e.g. Fig. 2C and 12C),
the plurality of pixel transistors constituting a readout circuit that outputs a pixel signal based on the electric charge outputted from each of the plurality of light-receiving pixels (see e.g. para 118); and
an element separation section (e.g. front deep trench isolation FDTI 61, see e.g. para 109-110) including an insulating film (silicon oxide, see e.g. para 130) that is formed to be embedded on the side of the second surface and extending in the first direction along the plurality of pixel transistors arranged in the first direction,
the element separation section being divided at at least a portion of an intersection of the pixel separation section that extends in the first direction and the second direction in a plan view (see e.g. Figs. 2B-2C and 12B-12C),
the element separation section electrically separating the plurality of pixel transistors and the plurality of light-receiving sections from each other (see e.g. para 118).
9. The imaging device according to claim 1, wherein the pixel separation section is provided in a grid pattern in a plan view (see e.g. Figs. 2B-2C, 12B-12C).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2-3 and 10-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Honda in view of US 2020/0227450 (“Ukigaya”).
Re claims 2-3 and 10-11, Honda teaches claim 1, but does not explicitly teach:
2. The imaging device according to claim 1, wherein a well contact region that applies fixed electric charge to the semiconductor substrate is formed on the second surface where the element separation section is divided.
3. The imaging device according to claim 1, wherein the pixel separation section at and near the intersection protrudes closer to the side of the second surface than the pixel separation section in another region.
10. The imaging device according to claim 1, wherein the plurality of pixel transistors comprises an amplification transistor, a selection transistor, and a reset transistor.
11. The imaging device according to claim 10, further comprising a conversion efficiency switching transistor as the plurality of pixel transistors.
Ukigaya teaches and/or would have suggested as obvious to one of ordinary skill in the art at the time of invention, in combination with Honda:
2. The imaging device according to claim 1, wherein a well contact region that applies fixed electric charge to the semiconductor substrate is formed on the second surface where the element separation section is divided (see e.g. para 53, 57, 58, Fig. 3).
3. The imaging device according to claim 1, wherein the pixel separation section at and near the intersection protrudes closer to the side of the second surface than the pixel separation section in another region (see e.g. para 53, 57, 58, Fig. 3).
10. The imaging device according to claim 1, wherein the plurality of pixel transistors comprises an amplification transistor, a selection transistor, and a reset transistor (see e.g. para 25).
11. The imaging device according to claim 10, further comprising a conversion efficiency switching transistor as the plurality of pixel transistors (see e.g. para 25).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add the invention of Ukigaya to the invention of Honda. The motivation to do so is that the combination produces the predictable results of providing improved electrical isolation (see e.g. para 3, 7) and providing the various types of transistors to transfer charges, amplify charges, generate signals based on the electric charges, and reset the charge in the photodiode (see e.g. para 25).
Claim(s) 4-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Honda in view of US 2021/0297611 (“Hwang”).
Re claims 4-5, Honda teaches claim 1, but does not explicitly teach:
4. The imaging device according to claim 1, wherein
the light-receiving pixels are arranged in a two-dimensional array, with a pixel unit including four light-receiving pixels being used as a minimum repeating unit, the four light-receiving pixels being adjacent to each other in the first direction and the second direction, and the element separation section is divided at at least a portion of the intersection of the pixel separation section provided at a boundary between a plurality of the pixel units provided side by side in the first direction or the second direction in a plan view.
5. The imaging device according to claim 1, wherein the plurality of light-receiving pixels is partitioned into a plurality of pixel blocks including the plurality of light-receiving pixels including color filters of same color, and are arranged in a two-dimensional array, with four pixel blocks, among the plurality of pixel blocks, being used as a minimum repeating unit, the four pixel blocks being provided side by side in the first direction and the second direction, and the element separation section is divided at at least a portion of the intersection of the pixel separation section provided at a boundary between the plurality of pixel blocks provided side by side in a plan view.
Hwang teaches and/or would have suggested as obvious to one of ordinary skill in the art at the time of invention, in combination with Honda:
4. The imaging device according to claim 1, wherein
the light-receiving pixels are arranged in a two-dimensional array, with a pixel unit including four light-receiving pixels being used as a minimum repeating unit, the four light-receiving pixels being adjacent to each other in the first direction and the second direction, and the element separation section is divided at at least a portion of the intersection of the pixel separation section provided at a boundary between a plurality of the pixel units provided side by side in the first direction or the second direction in a plan view (see e.g. Fig. 2 and para 39-40).
5. The imaging device according to claim 1, wherein the plurality of light-receiving pixels is partitioned into a plurality of pixel blocks including the plurality of light-receiving pixels including color filters of same color, and are arranged in a two-dimensional array, with four pixel blocks, among the plurality of pixel blocks, being used as a minimum repeating unit, the four pixel blocks being provided side by side in the first direction and the second direction, and the element separation section is divided at at least a portion of the intersection of the pixel separation section provided at a boundary between the plurality of pixel blocks provided side by side in a plan view (see e.g. Honda Figs. 2 and 12; modified by Hwang Fig. 3B and para 39-40).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add the invention of Hwang to the invention of Honda. The motivation to do so is that the combination produces the predictable results of optimizing the device to have shared pixels and sub-pixels (see e.g. para 39-43) in order to improve image quality with reduced pixel size (see e.g. para 4).
Claim(s) 6-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Honda in view of Hwang and US 2014/0285627 (“Kuboi”).
Re claims 6-8, Honda teaches claim 1, but does not explicitly teach:
6. The imaging device according to claim 5, wherein the plurality of pixel blocks is partitioned into a plurality of pixel pairs each including two light-receiving pixels adjacent to each other in the first direction, and in each of the plurality of pixel blocks, two of the pixel pairs arranged in the second direction are arranged to be shifted in the second direction.
7. The imaging device according to claim 5, wherein the plurality of pixel blocks includes a first pixel block and a second pixel block, in the first pixel block, the light-receiving pixels are arranged in a first arrangement pattern, and in the second pixel block, the light-receiving pixels are arranged in a second arrangement pattern.
8. The imaging device according to claim 7, wherein the number of the plurality of light-receiving pixels in the first pixel block is greater than the number of the plurality of light-receiving pixels in the second pixel block, the plurality of light-receiving pixels included in two of the first pixel blocks includes the color filters of green, the plurality of light-receiving pixels included in one of two of the second pixel blocks includes the color filters of red, and the plurality of light-receiving pixels included in another of the two of the second pixel blocks includes the color filters of blue.
Kuboi teaches and/or would have suggested as obvious to one of ordinary skill in the art at the time of invention, in combination with Honda:
6. The imaging device according to claim 5, wherein the plurality of pixel blocks is partitioned into a plurality of pixel pairs each including two light-receiving pixels adjacent to each other in the first direction, and in each of the plurality of pixel blocks, two of the pixel pairs arranged in the second direction are arranged to be shifted in the second direction (see e.g. Figs. 20A-20C).
7. The imaging device according to claim 5, wherein the plurality of pixel blocks includes a first pixel block and a second pixel block, in the first pixel block, the light-receiving pixels are arranged in a first arrangement pattern, and in the second pixel block, the light-receiving pixels are arranged in a second arrangement pattern (see e.g. Figs. 20A-20C).
8. The imaging device according to claim 7, wherein the number of the plurality of light-receiving pixels in the first pixel block is greater than the number of the plurality of light-receiving pixels in the second pixel block, the plurality of light-receiving pixels included in two of the first pixel blocks includes the color filters of green, the plurality of light-receiving pixels included in one of two of the second pixel blocks includes the color filters of red, and the plurality of light-receiving pixels included in another of the two of the second pixel blocks includes the color filters of blue (see e.g. Figs. 20A-20C).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add the invention of Kuboi to the invention of Honda. The motivation to do so is that the combination produces the predictable results of optimizing in order to improve focusing (see e.g. para 130), transmittance (see e.g. para 78), exposure period (see e.g. para 92), etc.
Conclusion
Conclusion / Prior Art
The prior art made of record, because it is considered pertinent to applicant's disclosure, but which is not relied upon specifically in the rejections above, is listed on the Notice of References Cited.
Conclusion / Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Kevin Parendo who can be contacted by phone at (571) 270-5030 or by direct fax at (571) 270-6030. The examiner can normally be reached Monday-Friday from 9 am to 4 pm ET.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Billy Kraig, can be reached at (571) 272-8660. The fax number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Kevin Parendo/Primary Examiner, Art Unit 2896
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