Prosecution Insights
Last updated: August 17, 2026
Application No. 18/703,809

IMAGING ELEMENT AND ELECTRONIC DEVICE

Non-Final OA §102§103§112
Filed
Apr 23, 2024
Priority
Nov 05, 2021 — JP 2021-180818 +1 more
Examiner
WARD, ERIC A
Art Unit
Tech Center
Assignee
Sony Group Corporation
OA Round
1 (Non-Final)
78%
Grant Probability
Favorable
1-2
OA Rounds
2m
Est. Remaining
91%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allowance Rate
580 granted / 745 resolved
+17.9% vs TC avg
Moderate +13% lift
Without
With
+13.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
24 currently pending
Career history
769
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
58.2%
+18.2% vs TC avg
§102
21.1%
-18.9% vs TC avg
§112
15.6%
-24.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 745 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 2,12-14,16,18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 2 recites “wherein the trench is filled with an insulator” but claim 2 depends on claim 1 and claim 1 recites “wherein the first inter-pixel isolation portion and the second inter-pixel isolation portion are each configured with a trench” and therefore it is unclear whether “the trench” of claim 2 is referring to the trench of the first inter-pixel isolation portion or the trench of the second inter-pixel isolation portion or both. For purposes of examination and since claims are interpreted under the doctrine of broadest reasonable interpretation (BRI, MPEP 2111), claim 2 is interpreted as “wherein the trench of either the first inter-pixel isolation portion or the second inter-pixel isolation portion is filled with an insulator”. Claim 12 recites “the second lens disposed in a first unit pixel and the first lens disposed in a second unit pixel adjacent to the first unit pixel are not placed in contact with each other” which is indefinite for a plurality of reasons including 1) the second lens is claimed to be in “a pixel unit” from claim 1 and therefore the second lens cannot also be disposed “in a first unit pixel”, and 2) the first lens is disposed in “a unit pixel” from claim 1 and therefore cannot be disposed “in a second unit pixel”. For purposes of examination, claim 12 is interpreted as “further comprising an adjacent unit pixel which includes: a first photoelectric conversion unit that is provided in the semiconductor substrate and generates a charge corresponding to an amount of light, a second photoelectric conversion unit having a smaller light-receiving area than the first photoelectric conversion unit, a first lens disposed on the first photoelectric conversion unit, and a second lens disposed on the second photoelectric conversion unit; wherein the first lens and the second lens that are disposed in the unit pixel are placed in contact with each other, and the second lens disposed in [[a first]]the unit pixel and the first lens disposed in [[a second]]the adjacent unit pixel Claim 13 is rejected as indefinite as a matter of form insofar as claim 13 depends on indefinite claim 12. Claim 14 recites “wherein the plurality of square-shaped first lenses” which lacks antecedent basis for the plurality of square-shaped first lenses. For purposes of examination, claim 14 is interpreted as “wherein the first lens comprises a[[the]] plurality of square-shaped first lenses Claim 16 recites “wherein the first lens has a different size for each color of a placed color filter” which is indefinite since the first lens cannot have different sizes. For purpose of examination, the language is interpreted as “wherein the [[first ]]lenses [[has a]]have different sizes for each color of a placed color filter”. Claim 18 recites in part “has an n-type impurity region in contact with the trench” which is indefinite since it is unclear which trench is being referenced. For purposes of examination, claim 18 is interpreted to recite in part “has an n-type impurity region in contact with the trench of either the first-inter-pixel isolation portion or the second inter-pixel isolation portion”. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-5,11,15,19 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by US 2022/0109020 A1 to LEE et al., “Lee `020”. Regarding claims 1 and 19, Lee `020 discloses (claim 1) an imaging element (FIG. 2A,2B) and (claim 19) a comprising an imaging element and a processing unit (e.g. read-out circuitry, ¶ [0020]) that processes a signal from the imaging element, the imaging element including: a first photoelectric conversion unit (PX1, ¶ [0025]) that is provided in a semiconductor substrate (100) and generates a charge corresponding to an amount of light; a second photoelectric conversion unit (PX2) having a smaller light-receiving area than the first photoelectric conversion unit; a first inter-pixel isolation portion (portion of 210, ¶ [0034], see solid line in Examiner-annotate figure below) that surrounds a unit pixel including the first photoelectric conversion unit (PX1) and the second photoelectric conversion unit (PX2); and a second inter-pixel isolation portion (portion of 210, see dashed line in Examiner-annotated figure below) provided between the first photoelectric conversion unit (PX1) and the second photoelectric conversion unit (PX2), wherein the first inter-pixel isolation portion and the second inter-pixel isolation portion are each configured with (FIG. 2B) a trench (191, ¶ [0034],[0035]) penetrating the semiconductor substrate (100). PNG media_image1.png 204 713 media_image1.png Greyscale Regarding claim 2 insofar as definite, Lee `020 discloses the imaging element according to claim 1, and Lee `020 further discloses wherein the trenches (191) of the first and second inter-pixel isolation structures are (partially) filled with an insulator (211, ¶ [0035]). Regarding claim 3, Lee `020 discloses the imaging element according to claim 1, and Lee `020 further discloses (e.g. FIG. 2B) wherein one or more transistors (with gate G2) and a contact are disposed in a region where the second photoelectric conversion unit (PX2) is formed in plan view (as evidenced by FIG. 2B since G2 overlaps with PD2 in PX2). Regarding claim 4, Lee `020 discloses the imaging element according to claim 1, and Lee `020 further discloses (FIG. 2B) wherein a capacitor (840, ¶ 0061]) is connected to the second photoelectric conversion unit (PX2). Regarding claim 5, Lee `020 discloses the imaging element according to claim 1, and Lee `020 further discloses wherein the unit pixel further includes (FIG. 2B) an element isolation region (220, ¶ [0044]) that separates elements, and the element isolation region (220) is configured with a trench (as pictured) not penetrating the semiconductor substrate (100). Regarding claim 11, Lee `020 discloses the imaging element according to claim 1, and Lee `020 further discloses (FIG. 2B) a first lens (510, ¶ [0050],[0051]) disposed on the first photoelectric conversion unit (PX1); and a second lens (520) disposed on the second photoelectric conversion unit (PX2), wherein the first lens (510) and the second lens (520) have different sizes (as pictured). Regarding claim 15, Lee `020 discloses the imaging element according to claim 11, and Lee `020 further discloses (FIG. 2A) wherein the second lens (520) disposed in a first unit pixel (UPG) is placed in contact with the first lens (510) disposed in the first unit pixel (UPG) and the first lens (510) disposed in a second unit pixel (another UPG) adjacent to the first unit pixel. Claims 1,11,16 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by US 2022/0328557 A1 to Park et al., “Park”. Regarding claim 1, Park discloses an imaging element (FIG. 4, FIG. 5), comprising: a first photoelectric conversion unit (LPD, ¶ [0034],[0035]) that is provided in a semiconductor substrate (110, ¶ [0056]) and generates a charge corresponding to an amount of light; a second photoelectric conversion unit (SPD) having a smaller light-receiving area than the first photoelectric conversion unit; a first inter-pixel isolation portion (150 on perimeter, ¶ [0060],[0061]) that surrounds a unit pixel including the first photoelectric conversion unit (LPD) and the second photoelectric conversion unit (SPD); and a second inter-pixel isolation portion (portion of 150 between LPD and SPD) provided between the first photoelectric conversion unit (LPD) and the second photoelectric conversion unit (LPD), wherein the first inter-pixel isolation portion and the second inter-pixel isolation portion (150) are each configured with a trench penetrating the semiconductor substrate (¶ [0060]-[0062]). Regarding claim 11, Park discloses the imaging element according to claim 1, and Park further discloses a first lens (180L, ¶ [0073]) disposed on the first photoelectric conversion unit (LPD); and a second lens (180S) disposed on the second photoelectric conversion unit (SPD), wherein the first lens (180L) and the second lens (180S) have different sizes. Regarding claim 16 insofar as definite, Park discloses the imaging element according to claim 11, and Park further discloses wherein the lenes (180L) have different sizes for each color of a placed color filter (color filters 170, ¶ [0072]). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over US 2019/0229138 A1 to LEE et al., “Lee `138”, in view of US 2022/0328557 A1 to Park et al., “Park”. Regarding claim 1, Lee `138 discloses an imaging element (FIG. 4), comprising: a first photoelectric conversion unit (112, ¶ [0040],[0041]) that is provided in a semiconductor substrate and generates a charge corresponding to an amount of light; a second photoelectric conversion unit (111) having a smaller light-receiving area than the first photoelectric conversion unit. Lee `138 fails to clearly teach a first inter-pixel isolation portion that surrounds a unit pixel including the first photoelectric conversion unit and the second photoelectric conversion unit; and a second inter-pixel isolation portion provided between the first photoelectric conversion unit and the second photoelectric conversion unit, wherein the first inter-pixel isolation portion and the second inter-pixel isolation portion are each configured with a trench penetrating the semiconductor substrate. Park teaches a first inter-pixel isolation portion (150 on perimeter, ¶ [0060],[0061]) that surrounds a unit pixel including the first photoelectric conversion unit (LPD) and the second photoelectric conversion unit (SPD); and a second inter-pixel isolation portion (portion of 150 between LPD and SPD) provided between the first photoelectric conversion unit (LPD) and the second photoelectric conversion unit (LPD), wherein the first inter-pixel isolation portion and the second inter-pixel isolation portion (150) are each configured with a trench penetrating the semiconductor substrate (¶ [0060]-[0062]). It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have formed the device of Lee `138 with inter-pixel isolations as taught by Park in order to prevent blooming phenomenon, i.e. prevent photocharges generated by one of the photodiodes from moving to the other photodiode (Park ¶ [0060]). Regarding claim 6, Lee `138 in view of Park yields the imaging element according to claim 1, and Lee `138 further teaches (FIG. 4) wherein the first photoelectric conversion unit (112) is L-shaped in plan view (as pictured), the second photoelectric conversion unit (111) is square-shaped, and a combination (110) of the first photoelectric conversion unit and the second photoelectric conversion unit is square-shaped (as pictured). Claims 1 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over US 2019/0096933 A1 to KIDO et al., “Kido”, in view of US 2022/0328557 A1 to Park et al., “Park”. Regarding claim 1, Kido discloses an imaging element (e.g. FIG. 7), comprising: a first photoelectric conversion unit (PD 121-1) that is provided in a semiconductor substrate and generates a charge corresponding to an amount of light; a second photoelectric conversion unit (PD 121-2) having a smaller light-receiving area (cross-sectional area in FIG. 7) than the first photoelectric conversion unit; a first inter-pixel isolation portion (portion of 112 to left of 121-2 and right of 121-1) that surrounds a unit pixel including the first photoelectric conversion unit and the second photoelectric conversion unit; and a second inter-pixel isolation portion (portion of 112 between 121-1 and 121-2) provided between the first photoelectric conversion unit and the second photoelectric conversion unit. Kido fails to clearly teach wherein the first inter-pixel isolation portion and the second inter-pixel isolation portion are each configured with a trench penetrating the semiconductor substrate. Park teaches a first inter-pixel isolation portion (150 on perimeter, ¶ [0060],[0061]) that surrounds a unit pixel including the first photoelectric conversion unit (LPD) and the second photoelectric conversion unit (SPD); and a second inter-pixel isolation portion (portion of 150 between LPD and SPD) provided between the first photoelectric conversion unit (LPD) and the second photoelectric conversion unit (LPD), wherein the first inter-pixel isolation portion and the second inter-pixel isolation portion (150) are each configured with a trench penetrating the semiconductor substrate (¶ [0060]-[0062]). It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have formed the device of Kido with inter-pixel isolations as taught by Park in order to prevent blooming phenomenon, i.e. prevent photocharges generated by one of the photodiodes from moving to the other photodiode (Park ¶ [0060]). Regarding claim 10, Kido in view of Park yields the imaging element according to claim 1, and Kido further teaches (FIG. 7) a first lens (101A-1) disposed on the first photoelectric conversion unit (121-1); and a second lens (101A-2) disposed on the second photoelectric conversion unit (121-2), wherein the first lens and the second lens are identical in size (as pictured). Claims 17 is rejected under 35 U.S.C. 103 as being unpatentable over US 2022/0328557 A1 to Park et al., “Park”, as applied to claim 1 above, and further in view of US 2017/0338265 A1 to YOSHIBA et al., “Yoshiba”. Regarding claim 17, although Park discloses the imaging element according to claim 1, Park fails to teach wherein a light shielding film provided on the second inter-pixel isolation portion is located at a position shifted toward the second photoelectric conversion unit. Yoshiba teaches (e.g. FIG. 2) wherein a light-shielding film (50 and/or 61A and/or 61B) is provided on inter-pixel isolations (regions between PDs 42) and are shifted from one photoelectric conversion unit (e.g. PD 42 on far left) towards another photoelectric conversion unit (adjacent PD 42) or generally shifted among all pixels according to the pixel location (FIG. 7 with peripheral pixels shifted to a greater degree than central pixels). It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have formed the device of Park with a light-shielding film above the inter-pixel isolations and shifted as taught by Yoshiba in order to enhance light defection with reduced oblique light characteristics (Yoshiba ¶ [0003],[0004],[0007]-[0009],[0146],[0147]). Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over US 2022/0328557 A1 to Park et al., “Park”, as applied to claim 1 above, and further in view of US 2019/0214420 A1 to Kim et al., “Kim”. Regarding claim 18 insofar as definite, although Park discloses the imaging element according to claim 1, Park fails to clearly teach wherein the trench of each of the first inter-pixel isolation portion and the second inter-pixel isolation portion includes a fixed charge film therein, and each of the first photoelectric conversion unit and the second photoelectric conversion unit has an n-type impurity region in contact with the trench of either the first inter-pixel isolation portion or the second inter-pixel isolation portion. Kim teaches (FIG. 7) wherein an inter-pixel isolation includes a fixed charge film (160, ¶ [0086]-[0088]) and an n-type impurity region (portion of n-type bulk substrate 100, ¶ [0073]) is in contact with the trench of each inter-pixel isolation portion (fixed charge films 160). It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have formed the device of Park with a fixed charge film connected to an n-type region for each inter-pixel isolation as taught by Kim in order to reduce the dark current by reducing EHP (electron-hole pair) (Kim ¶ [0086]). Allowable Subject Matter Claims 7-9 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 12-14 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Prior art generally teaches forming photoelectric conversion units (e.g. photodiodes) having different sizes as discussed about including forming inter-pixel isolation portions also discussed above. Prior art e.g. Lee `020 teaches the limitations of claim 1 and teaches integrating transistors (with gates G1 and G2) with the photoelectric conversion elements, and prior art e.g. US 2022/0052084 A1 to Jang teaches (FIG. 4,5) a gate (CGE) overlapping with an inter-pixel isolation (170). However, prior art fails to reasonably teach or suggest wherein two sides of a gate of at least one of a plurality of transistors constituting the unit pixel are located on the first inter-pixel isolation portion and the second inter-pixel isolation portion in plan view as claimed in claim 7 together with all of the limitations of claim 1. Similarly, prior art fails to reasonably teach or suggest wherein two sides of a gate of an amplification transistor are located on the first inter-pixel isolation portion and the second inter-pixel isolation portion in plan view as claimed in claim 8 together with all of the limitations of claim 1. Claim 9 is objected to as allowable insofar as it depends upon and includes all of the limitations of claim 8. Additionally, although prior art e.g. Lee `020 and Park teach lenses of different sizes as discussed above, prior art fails to reasonably teach wherein the first lens and the second lens that are disposed in the unit pixel are placed in contact with each other, and the second lens disposed in [[a first]]the unit pixel and the first lens disposed in [[a second]]the adjacent unit pixel together with all of the limitations of claims 11 and 1. Claim 13 is objected to as allowable insofar as it depends upon and includes all of the limitations of claim 12. Additionally, although prior art generally teaches square-shaped lenses e.g. US 2006/0119950 A1 to Boettinger et al. FIG. 4A,5A lenses 102 (¶ [0031]), prior art fails to reasonably teach or suggest “wherein the first lens comprises a[[the]] plurality of square-shaped first lenses are disposed on the first photoelectric conversion unit” as claimed in claim 14 insofar as definite together with all of the limitations of claim 1. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: US 2010/0328479 A1 to SAMBONGI teaches (FIG. 2) a first photoelectric conversion unit (PD2) that is provided in a semiconductor substrate and generates a charge corresponding to an amount of light, a second photoelectric conversion unit (PD1) having a smaller light-receiving area than the first photoelectric conversion unit, wherein the first photoelectric conversion unit (PD2) is L-shaped in plan view, the second photoelectric conversion unit (PD1) is square-shaped, and a combination of the first photoelectric conversion unit (PD2) and the second photoelectric conversion unit (PD1) is square-shaped. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC A WARD whose telephone number is (571)270-3406. The examiner can normally be reached M-F 10-6 ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at (571)272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Eric A. Ward/Primary Examiner, Art Unit 2891
Read full office action

Prosecution Timeline

Apr 23, 2024
Application Filed
Jul 29, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
78%
Grant Probability
91%
With Interview (+13.4%)
2y 5m (~2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 745 resolved cases by this examiner. Grant probability derived from career allowance rate.

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