DETAILED ACTION
This application, 18/18704766, attorney docket AKI2KYO-PT430, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This application is assigned to KYOCERA Corporation, and is a National Stage entry of PCT/JP2022/040205, International Filing Date, 10/27/2022 and claims foreign priority to 2021-176646, filed 10/28/2021.
Claims 1-5, 7-10 and 12-19 are pending and are considered below. Note that examiner will use numbers in parentheses to indicate numbered elements in prior art figures, and brackets to point to paragraph numbers where quoted material or specific teachings can be found.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claim 7 recites the limitation " a third direction orthogonal to the first direction and the second direction in a cross-sectional view taken along a plane intersecting with the second direction". There is insufficient antecedent basis for the second direction in the claim.
Claim 9 also recites “the second direction.” There is insufficient antecedent basis for the second direction in the claim.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 3, 5, 10, 12, 13 and 15-19 are rejected under 35 U.S.C. 102a1/a2 as being by Kurashima (U.S. 5,475,783).
As for claim 1,
Kurashima teaches in figure 1, a semiconductor package, comprising:
a body including a base (4) and a frame (vertical end walls),
the base including a first upper surface (4),
the frame being located on the first upper surface and including an inner side surface, an outer side surface, and an opening portion (u-shaped region at left side) extending through the frame in a first direction from the outer side surface to the inner side surface;
a fixing member (1) including a first portion located in the opening portion (rightmost cylindrical portion), a second portion (chamfered flange portion) continuous with the first portion and located on an outer side surface side of the frame, and
a through-hole extending through the first portion and the second portion in the first direction (shown as a pipe); and
an optical component (2) fixed to the fixing member
wherein in a cross-sectional view taken along a plane intersecting with the first direction, the opening portion at least partially includes a first linear portion, and the first portion includes a second linear portion facing the first linear portion (sidewalls are parallel to allow assembly).
As for claim 3,
Kurashima teaches the semiconductor package according to claim 1, and teaches the first portion has a shape conforming to the opening portion in a cross-sectional view taken along a plane intersecting with the first direction. (conformal around the radius)
As for claim 5,
Kurashima teaches the semiconductor package according to claim 1, and teaches that the first portion has a smaller length than the second portion in a second direction orthogonal to the first direction in a plan view. (the flange height is greater than the pipe portion).
As for claim 10,
Kurashima teaches the semiconductor package according to claim 1, wherein the first portion has a larger thickness than the frame in the first direction. (the first portion extends into the frames cavity)
As for claim 12,
Kurashima teaches the semiconductor package according to claim 1, and Kurashima teaches that the body includes a protrusion (6) on the first upper surface.
As for claim 13,
Kurashima teaches the semiconductor package according to claim 1, wherein the body includes an input-output terminal located on the outer side surface and separate from the opening portion, and the input-output terminal includes at least a first wiring layer and a second wiring layer, and the second wiring layer includes a portion protruding from the frame in a plan view. (bottom connectors (6) extend out from the bottom surface of the bottom )
As for claim 15,
Kurashima teaches the semiconductor package according to claim 1, and Kurashima teaches that the frame and the base comprise a same material and are integral with each other.
As for claim 16,
Kurashima teaches the semiconductor package according to claim 1, and teaches the fixing member comprises a metal ([co1 ln32]).
As for claim 17,
Kurashima teaches the semiconductor package according to claim 1, and teaches the frame comprises a metal. ([co1 ln44]).
As for claim 18,
Kurashima teaches the semiconductor package according to claim 1, wherein a portion of the fixing member defining the through-hole includes a holder recessed or protruding in a cross-sectional view taken along a plane intersecting with a second direction orthogonal to the first direction as viewed from above. (the hole acts as a holder for the component 2)
As for claim 19,
Kurashima teaches the semiconductor apparatus, comprising: the semiconductor package according to claim 1; and a semiconductor device (5) mounted on the first upper surface in the semiconductor package.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 2, 4, 8, 9 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Kurashima in view of Fujitsu (JP 7-218776).
As for claim 2,
Kurashima teaches the semiconductor package according to claim 1, but does not teach that the opening portion is polygonal in a cross-sectional view taken along a plane intersecting with the first direction.
However, Fujitsu teaches a square opening (31) in figure 1.
It would have been obvious to one skilled in the art at the effective filing date of this application to use the square hole of Fujitsu in the device of Kurashima so that the optical component cannot rotate in the hole, reducing stress on the wiring and fiber optic fibers. One skilled in the art would have combined these elements with a reasonable expectation of success.
As for claim 4,
Kurashima teaches the semiconductor package according to claim 1, and teaches the frame includes a second upper surface, the first portion includes a third upper surface, the opening portion reaches the second upper surface of the frame, but does not teach that the third upper surface of the first portion is flush with the second upper surface of the frame. (top edge of flange is above the top of the pipe).
However, Fujitsu teaches in figure 4, a first portion that is coplanar with the top edge of the frame.
It would have been obvious to one skilled in the art at the effective filing date of this application to make the inner portion of the pipe flat and coplanar with the upper surface of the frame to reduce twisting along the long axis of the pipe, or bending across the edge of the frame because it is secured against the lid One skilled in the art would have combined these elements with a reasonable expectation of success.
As for claim 8,
Kurashima in view of Fujitsu makes obvious the semiconductor package according to claim 4, and in the combination, Fujitsu teaches in figure 3 that the first portion is partially flush with the second portion in at least one of a cross- sectional view taken along a plane intersecting with the first direction or a cross-sectional view taken along a plane intersecting with the second direction.
As for claim 9,
Kurashima in view of Fujitsu makes obvious the semiconductor package according to claim 4, and in the combination, the first portion includes a recess recessed in at least one of the second direction or a third direction orthogonal to the first direction and the second direction. (the recess in Fujitsu secures the clip 4)
As for claim 14,
Kurashima teaches the semiconductor package according to claim 1, but does not teach that the opening portion is rectangular and the first portion is rectangular in a cross- sectional view taken along a plane intersecting with the first direction.
However, Fujitsu teaches in figure 1 opening portion (31) is rectangular and the first portion is rectangular in a cross- sectional view taken along a plane intersecting with the first direction.
It would have been obvious to one skilled in the art at the effective filing date of this application to use the square hole of Fujitsu in the device of Kurashima so that the optical component cannot rotate in the hole, reducing stress on the wiring and fiber optic fibers. One skilled in the art would have combined these elements with a reasonable expectation of success.
Conclusion
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/JOHN A BODNAR/Primary Examiner, Art Unit 2893