DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 6-8 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 6 recites “A mask pattern used to form vertical channel structures and at least one vertical connecting pattern in a 3D flash memory, ….the mask pattern comprising: a serif-shaped portion included in an area corresponding to an edge where the at least one vertical connecting pattern is brought into contact with each of the vertical channel structures.” Similar language occurs in claims 7-8.
The mask pattern is a portion of the intermediate step used to form the device. Therefore, it is unclear whether the Applicant is claiming the intermediate product, the process of making the device, or the final product. Even if Applicant states that the above claim is an article of manufacture, it is unclear at which step the article of manufacture is being claimed, as both the mask for forming the device AND the details of the device being formed are being claimed. (See response to Arguments)
Therefore, claims 6-8 are rejected under 35 USC 112(b) for being indefinite. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2, 4-5 and 9-14 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by KANEKO (US 20200098787 A1)
With regards to claim 1, Kaneko discloses a 3D flash memory (31A-31D) comprising:
interlayer insulating films (insulating strips 32) and word lines (word lines/conductive strips 46) configured to extend in a horizontal direction and alternately stacked in a vertical direction; (see FIGS. 31A and 31C)
vertical channel structures (channel 60 and memory film 50) configured to extend through the interlayer insulating films and the word lines in the vertical direction, wherein each of the vertical channel structures includes a vertical channel pattern (channel 60) configured to extend in the vertical direction and a data storage pattern (memory film 50) configured to surround an outer wall of the vertical channel pattern; and
at least one vertical connecting pattern (connecting pattern comprising layers 52 and 54 connecting adjacent structures 60 but not including structure 60, see FIG. 31D) configured to connect the vertical channel structures to each other on a horizontal plane and extend in the vertical direction, (See FIG. 31D)
wherein the at least one vertical connecting pattern is formed of only the data storage pattern included in each of the vertical channel structures. (see FIG. 31D, where the connecting pattern is comprised only of layers 52 and 54, see also response to Arguments)
With regards to claim 2, Kaneko discloses the 3D flash memory of claim 1.
It should be noted that the limitation “wherein the at least one vertical connecting pattern is simultaneously formed with the vertical channel structures through the same process” is being interpreted as a product by process, and will not be given patentable weight (See MPEP 2113 I.)
With regards to claim 4, Kaneko discloses the 3D flash memory of claim 1, wherein the at least one vertical connecting pattern has a size smaller than a size of each of the vertical channel structures on the horizontal plane. (See FIG. 31D, where the size on at least layer 52 is less than the size of layer 60)
With regards to claim 5, Kaneko discloses the 3D flash memory of claim 1, wherein the at least one vertical connecting pattern connects the vertical channel structures to each other to divide the word lines on the horizontal plane. (See FIG. 31D)
With regards to claim 9, Kaneko discloses a 3D flash memory (31A-31D) comprising:
interlayer insulating films (insulating strips 32) and word lines (word lines/conductive strips 46) configured to extend in a horizontal direction and alternately stacked in a vertical direction; (see FIGS. 31A and 31C)
vertical channel structures (channel 60 and memory film 50) configured to extend through the interlayer insulating films and the word lines in the vertical direction, wherein each of the vertical channel structures includes a vertical channel pattern (channel 60) configured to extend in the vertical direction and a data storage pattern (memory film 50) configured to surround an outer wall of the vertical channel pattern; and
at least one separation film (connecting pattern comprising layers 52 and 54 connecting adjacent structures 60, but not including structure 60, see FIG. 31D) configured to divide each of the word lines into a plurality of word lines on a horizontal plane, (See FIG. 31D)
wherein the at least one separation film is formed of only the data storage pattern included in each of the vertical channel structures. (see FIG. 31D, where the connecting pattern is comprised only of layers 52 and 54, see also Response to Arguments)
With regards to claim 10, Kaneko discloses the 3D flash memory of claim 9, wherein the at least one separation film connects vertical channel structures included in at least one row or column among the vertical channel structures on the horizontal plane. (See FIG. 31D)
With regards to claim 11, Kaneko discloses the 3D flash memory of claim 10, wherein the at least one separation film includes:
the vertical channel structures (channel 60) included in the at least one row or column; and
connecting parts (connecting portions of layers 52/54) configured to connect the vertical channel structures included in the at least one row or column on the horizontal plane. (See FIG. 31D)
With regards to claim 12, Kaneko discloses the 3D flash memory of claim 11, wherein each of the vertical channel structures included in the at least one row or column does not include the vertical channel pattern. (See FIG. 31D, where the vertical channel structure comprising the connection portion 52/54 does not include the channel pattern 60)
With regards to claim 13, Kaneko discloses the 3D flash memory of claim 9, wherein the at least one separation film has a shape in which protrusions and indentations are repeated in an extension direction on the horizontal plane to divide each of the word lines into the plurality of portions on the horizontal plane. (See FIG. 31SD, showing the protrusions and indentations of the layers 52/54 of the separation film)
With regards to claim 14, Kaneko discloses the 3D flash memory of claim 9.
It should be noted that the limitation “wherein the at least one vertical connecting pattern is simultaneously formed with the vertical channel structures through the same process” is being interpreted as a product by process, and will not be given patentable weight (See MPEP 2113 I.)
Response to Arguments
Applicant's arguments filed 06/28/2026 have been fully considered but they are not persuasive.
With regards to the rejection of claims 6-8 under 35 USC 112b, merely stating that the claim is directed to “an article of manufacture” does not overcome the rejection. Even if Applicant states that the above claim is an article of manufacture, it is unclear at which step the article of manufacture is being claimed, as both the mask for forming the device AND the details of the device being formed are being claimed.
With regards to the rejection of claims 1 and 9 under 35 USC 102, Examiner notes that the claim language does not require the pattern 60 to connect the vertical channel structures. Instead, the layers 52 and 54 connect the vertical channel structures by themselves. Additionally, the claims recite “the at least one vertical connecting pattern” so even if there are multiple connecting patterns (52, 54, and 60), the claims only require one pattern, which at least one of layers 52 and 54 meet that requirement.
Therefore, claims 1, 6, and 9 are properly rejected, and claims 2, 3-5, 7-8, and 10-14 are rejected for at least their dependencies.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEVEN M Page whose telephone number is (571)272-3249. The examiner can normally be reached M-F: 10:00AM-6:00PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine S. Kim can be reached at 571-272-8548. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/STEVEN M PAGE/Primary Patent Examiner, Art Unit 2812
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