DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 17 is objected to because of the following informalities: on line 3 of claim 17, a space is needed between ‘0.75’ and ‘µm,’ and a space is needed between ‘2.97’ and ‘µm’. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 11 – 30 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Koo et al. (WO 2021107654 A2).
Regarding claim 11, in Figures 12 - 13, Koo discloses a circuit board comprising: an insulating layer (110); an upper pad (comprising 120, 142) disposed on the insulating layer; and a through electrode (141) formed in a through hole (VH1, Figure 8) passing through the insulating layer and connected to the upper pad, wherein the upper pad includes a pad layer (comprising 120, 142) disposed on an upper surface of the insulating layer and having an opening (opening of VH1 having the width W1) overlapping the through hole in a vertical direction, and wherein an inclination angle of an inner wall of the pad layer forming the opening is different from an inclination angle of an inner wall of the insulating layer forming the through hole (the layer 120 tapers from the top surface of insulation layer 110 towards the central portion of the insulating layer 110, thus the inclination angle of the inner wall of the layer 120 is smaller than the inclination angle of the inner wall of the insulating layer 110).
Regarding claim 12, Koo discloses wherein the upper pad is in contact with an upper surface of the through electrode and has a thickness in a range of 1.0 µm to 12 µm (Figures 12 – 13).
Regarding claim 13, Koo discloses wherein the through electrode has a first width at an upper surface and a second width less than the first width at a first region below the upper surface, wherein the first region is a region with a smallest width in an entire region in a thickness direction of the through electrode, and wherein the second width satisfies a range of 70% to 99% of the first width (Figures 12 – 13).
Regarding claim 14, Koo discloses wherein the first width is one of a maximum width and an average width of the upper surface of the through electrode (Figures 12 – 13).
Regarding claim 15, Koo discloses wherein one half of a difference value between the first width and the second width of the through electrode satisfies a range of 0.1% to 20% of the first width (Figures 12 – 13).
Regarding claim 16, Koo discloses wherein the upper pad has a third width, and wherein one half of a difference value between the third width of the upper pad and the second width of the through electrode is 4.0 µm or less (Figures 12 – 13).
Regarding claim 17, Koo discloses wherein the upper pad has a third width, and wherein one half of a difference value between the third width of the upper pad and the first width of the through electrode satisfies a range of 0.75µm to 2.97µm (Figures 12 – 13).
Regarding claim 18, Koo discloses wherein the through electrode includes: a first metal layer formed on the inner wall of the through hole; and a second metal layer formed on the first metal layer and filling the through hole, and wherein the upper pad includes: a third metal layer disposed on the pad layer and extending from the first metal layer; and a fourth metal layer extending from the second metal layer (Figures 12 – 13).
Regarding claim 19, Koo discloses a lower pad disposed on a lower surface of the insulating layer and connected to a lower surface of the through electrode, wherein the lower pad has a thickness in a range of 1.0 µm to 12 µm (Figures 12 – 13).
Regarding claim 20, Koo discloses wherein the third metal layer of the upper pad does not directly contact the upper surface of the insulating layer (Figures 12 – 13).
Regarding claim 21, Koo discloses wherein the inner wall of the pad layer of the upper pad is in contact with the third metal layer (Figures 12 – 13).
Regarding claim 22, Koo discloses wherein the inclination of the inner wall of the pad layer is closer to 90 degrees than the inclination of the inner wall of the through hole (Figures 12 – 13).
Regarding claim 23, in Figures 12 - 13, Koo discloses a semiconductor package comprising: an insulating layer (110); an upper pad (comprising 120, 142) disposed on the insulating layer; a through electrode (141) formed in a through hole (VH1, Figure 8) passing through the insulating layer and connected to the upper pad; and a semiconductor device disposed on the insulating layer (the insulating layer may form wiring for mounting electrical components and connecting them in a circuit; page 8, 1st paragraph), wherein the upper pad includes a pad layer (comprising 120, 142) disposed on an upper surface of the insulating layer and having an opening (opening of VH1 having the width W1) overlapping the through hole in a vertical direction, and wherein an inclination angle of an inner wall of the pad layer forming the opening is different from an inclination angle of an inner wall of the insulating layer forming the through hole (the layer 120 tapers from the top surface of insulation layer 110 towards the central portion of the insulating layer 110, thus the inclination angle of the inner wall of the layer 120 is smaller than the inclination angle of the inner wall of the insulating layer 110).
Regarding claim 24, Koo discloses wherein the upper pad is in contact with an upper surface of the through electrode and has a thickness in a range of 1.0 µm to 12 µm (Figures 12 – 13).
Regarding claim 25, Koo discloses wherein the through electrode has a first width at an upper surface and a second width less than the first width at a first region below the upper surface, wherein the first region is a region with a smallest width in an entire region in a thickness direction of the through electrode, and wherein the second width satisfies a range of 70% to 99% of the first width (Figures 12 – 13).
Regarding claim 26, Koo discloses wherein one half of a difference value between the first width and the second width of the through electrode satisfies a range of 0.1% to 20% of the first width (Figures 12 – 13).
Regarding claim 27, Koo discloses wherein the upper pad has a third width, and wherein one half of a difference value between the third width of the upper pad and the second width of the through electrode is 4.0 µm or less (Figures 12 – 13).
Regarding claim 28, Koo discloses wherein the through electrode includes: a first metal layer formed on the inner wall of the through hole; and a second metal layer formed on the first metal layer and filling the through hole, and wherein the upper pad includes: a third metal layer disposed on the pad layer and extending from the first metal layer; and a fourth metal layer extending from the second metal layer (Figures 12 – 13).
Regarding claim 29, Koo discloses wherein the third metal layer of the upper pad does not directly contact the upper surface of the insulating layer, and wherein the inner wall of the pad layer of the upper pad is in contact with the third metal layer (Figures 12 – 13).
Regarding claim 30, Koo discloses wherein the inclination of the inner wall of the pad layer is closer to 90 degrees than the inclination of the inner wall of the through hole (Figures 12 – 13).
Conclusion
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TREMESHA W. BURNS
Primary Examiner
Art Unit 2847
/TREMESHA W BURNS/Primary Examiner, Art Unit 2847
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