DETAILED ACTION
Examiner’s Note
Applicant is reminded that the Examiner is entitled to give the broadest reasonable interpretation to the language of the claims. Furthermore, the Examiner is not limited to Applicants' definition which is not specifically set forth in the claims. See MPEP 2111, 2123, 2125, 2141.02 VI, and 2182.
Examiner has cited particular paragraphs, columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. See MPEP 2141.02 VI.
In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Election/Restrictions
Applicant’s election of Invention I (semiconductor device), reflected in claims 1-18 in the reply filed on 07/30/2026 is acknowledged. Claims 19-21 are withdrawn from further consideration pursuant to 37 CFR 1.142 (b), as being drawn to the nonelected group.
Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.03(a)).
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2-3, 5 and 16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claims 2-3 and 5 recites “dimension”. The term ‘dimension’ is indefinite as it is a general word which could mean any of length, width, height, thickness etc.
Claim 16 recites, “The through-via substrate according to claim 14, wherein the first wire is integrated with the first portion”. It is not understood what it means by ‘integrated’.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2, 4, 7, 14 and 17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by NAGANO et al. (US 20190273038 A1, hereinafter Nagano’038).
Regarding independent claim 1, Nagano’038 teaches, “A through-via substrate (10B, fig. 1-30; ¶ [0001] - ¶ [0138]) comprising:
a substrate (100B, fig. 20-24) including a first surface (102B) and a second surface (104B, fig. 22) located on a side opposite to the first surface (102B),
the substrate (100B) being provided with a through hole (110B) including a wall surface extending from the first surface (102B) to the second surface (104B); and
a through via (140B) located in the through hole (110B), the through via (140B) extending from the first surface (102B) to the second surface (104B),
wherein the through via (140B) includes
a seed layer (142B, fig. 23-24) located on the wall surface, the seed layer (142B) spreading along the wall surface from the first surface (102B) toward the second surface (104B),
a first portion (144B) covering the seed layer (142B), and
a second portion (146B) touching the first portion (144B) at an interface traversing the through hole (110B)”.
Regarding claim 2, Nagano’038 further teaches, “The through-via substrate according to claim 1, wherein a dimension of the first portion (144B) is smaller than a dimension of the second portion (146B) in a thickness direction of the substrate.
Regarding claim 4, Nagano’038 further teaches, “The through-via substrate according to claim 1, wherein the interface includes a depression depressed toward the first surface (102B)”.
Regarding claim 7, Nagano’038 further teaches, “The through-via substrate according to claim 1, wherein the first portion (144B) includes a superconducting material containing at least one element selected from the group consisting of Nb, Pb, Ta, Sn, In, and Al” (¶ [0114]).
Regarding claim 14, Nagano’038 further teaches, “The through-via substrate according to claim 1, further comprising a first wire (420B, fig. 19) located on the first surface and connected to the first portion (140B)”.
Regarding claim 17, Nagano’038 further teaches, “A mounting substrate comprising: the through-via substrate according to claim 1, and an element (¶ [0003]) electrically connected to the through via of the through-via substrate”.
Claims 1, 9 and 11-12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tone et al. (JP 2009238957 A, hereinafter Tone’957).
Regarding independent claim 1, Tone’957 teaches, “A through-via substrate (2, fig. 1-12; related descriptions) comprising:
a substrate (20/20a, fig. 4) including a first surface (bottom surface) and a second surface (top surface) located on a side opposite to the first surface,
the substrate being provided with a through hole (22) including a wall surface extending from the first surface to the second surface; and
a through via (24, 27) located in the through hole (22), the through via (24) extending from the first surface to the second surface,
wherein the through via (24, 27) includes
a seed layer (26) located on the wall surface, the seed layer (26) spreading along the wall surface from the first surface toward the second surface,
a first portion (27) covering the seed layer (26), and
a second portion (24) touching the first portion at an interface traversing the through hole (22)”.
Regarding claim 9, Tone’957 further teaches, “The through-via substrate according to claim 1, further comprising a first pad (27a, 27b, fig. 6-7) located at the first surface so as to cover the through hole in a plan view and connected to the first portion (27)”.
Regarding claim 11, Tone’957 further teaches, “The through-via substrate according to claim 9, wherein the first pad (27a, 27b, fig. 6-7) is integrated with the first portion (27)”.
Regarding claim 12, Tone’957 further teaches, “The through-via substrate according to claim 9, wherein the first pad (27a, 27b, fig. 6-7) covers the through hole in a plan view”.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 3, 5-6 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Nagano’038 as applied to claim 7 as above, and further in view of Suzuki et al. (JP 2017098402 A, hereinafter Suzuki’402).
Regarding claim 3, Nagano’038 teaches all the limitations described in claim 7.
But Nagano’038 is silent upon the provision of wherein a ratio T11/T0 of a dimension T11 of the seed layer in the thickness direction of the substrate to a thickness T0 of the substrate is 0.025 or higher and 0.275 or lower.
However, Suzuki’402 teaches a similar through-via substrate (6-7), wherein a ratio T11/T0 of a dimension T11 (thickness 50-400 nm) of the seed layer (112) in the thickness direction of the substrate (102, thickness 100-800 µm) to a thickness T0 of the substrate is 0.025 or higher and 0.275 or lower.
While the cited prior art does not explicitly disclose the particular claimed value, the teachings therein would have led one of ordinary skill in the art at the time of invention to discover the claimed value during routine experimentation and optimization.
The Applicant has not presented persuasive evidence that the claimed values are for a particular purpose that is critical to the overall claimed invention (i.e., the invention would not work without the specific claimed values). Also, the applicant has not shown that the claimed values produce a result that was new or unexpected enough to patentably distinguish the claimed invention over the cited prior art. Thus, because it has been held that where “the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation" (see MPEP 2144.05; In re Aller, 220 F.2d 454, 456, 105 USPQ 223, 225 (CCPA 1955)), it would have been obvious to add the claimed values to the rest of the claimed invention.
Regarding claim 5, Nagano’038 modified with Suzuki’402 further teaches, “The through-via substrate according to claim 1, wherein a ratio T0/R1 of a thickness T0 of the substrate to a dimension R1 of the through hole at the first surface is 3.0 or higher and 25.0 or lower” (Suzuki’402, R1=60 µm and T0=100-800 µm). The Applicant has not presented persuasive evidence that the claimed values are for a particular purpose that is critical to the overall claimed invention (i.e., the invention would not work without the specific claimed values). Also, the applicant has not shown that the claimed values produce a result that was new or unexpected enough to patentably distinguish the claimed invention over the cited prior art. Thus, because it has been held that where “the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation" (see MPEP 2144.05; In re Aller, 220 F.2d 454, 456, 105 USPQ 223, 225 (CCPA 1955)), it would have been obvious to add the claimed values to the rest of the claimed invention.
Regarding claim 6, Nagano’038 modified with Suzuki’402 further teaches, “The through-via substrate according to claim 1, wherein a thickness of the seed layer is 5 nm or greater and 50 nm or less (50 nm, Suzuki’402).
Regarding claim 8, Nagano’038 modified with Suzuki’402 further teaches, wherein the first and second portions (110a, 110b) includes a superconducting material containing Al. It would have been obvious to one having ordinary skill in the art before the effective filling date of the invention to select Al when forming the first and second portions, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Tone’957 as applied to claim 9 as above, and further in view of Suzuki et al. (US 20080128848 A1, hereinafter Suzuki’848).
Regarding claim 10, Tone’957 teaches all the limitations described in claim 9.
But Tone’957 is silent upon the provision of wherein the first pad includes a superconducting material containing at least one element selected from the group consisting of Nb, Pb, Ta, Sn, In, and Al.
However, Suzuki’848 teaches a similar structure (fig. 8) wherein the first pad (12, ¶ [0007]) includes a superconducting material containing at least one element selected from the group consisting of Nb, Pb, Ta, Sn, In, and Al.
It would have been obvious to one having ordinary skill in the art before the effective filling date of the invention to select Al when forming the pads, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416.
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Tone’957 as applied to claim 9 as above, and further in view of Kudo et al. (US 20210035874 A1, hereinafter Kudo’874).
Regarding claim 13, Tone’957 teaches all the limitations described in claim 9.
But Tone’957 is silent upon the provision of wherein a first inorganic layer located on the first surface, the first inorganic layer being adjacent to the first pad in a plane direction and containing an inorganic insulating material.
However, Suzuki’848 teaches a similar structure (fig. 8) wherein a first inorganic layer (36, 37) located on the first surface, the first inorganic layer being adjacent to the first pad (35) in a plane direction and containing an inorganic insulating material.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of Tone’957 and Suzuki’848 to include inorganic layers according to the teachings of Suzuki’848 with a general motivation of insulating the electrical elements.
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Nagano’038 as applied to claim 14 as above, and further in view of Morita et al. (US 20070075425 A1, hereinafter Morita’425).
Regarding claim 15, Nagano’038 teaches all the limitations described in claim 14.
But Nagano’038 is silent upon the provision of wherein the first wire includes a superconducting material containing at least one element selected from the group consisting of Nb, Pb, Ta, Sn, In, and Al.
However, Morita’425 teaches a similar device, wherein the first wire (10, fig. 7) includes a superconducting material containing at least one element selected from the group consisting of Nb, Pb, Ta, Sn, In, and Al (¶ [0030]).
Nagano’038 and Morita’425 are analogous art because they both are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Nagano’038 with the features of Morita’425 because they are from the same field of endeavor.
It would have been obvious to one having ordinary skill in the art before the effective filling date of the invention to select Al when forming the wire, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416.
Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Nagano’038 as applied to claim 14 as above, and further in view of Huang (US 20210280765 A1, hereinafter Huang’765).
Regarding claim 16, Nagano’038 teaches all the limitations described in claim 14.
Nagano’038 further teaches, the third wiring (420B) connected to the penetrating electrode (140B).
But Nagano’038 is silent upon the provision of wherein the first wire is integrated with the first portion.
However, Huang’765 teaches a similar device, wherein the chip (210, fig. 2B; ¶ [0028], ¶ [0036]) can be welded into the superconductor material (325) arranged within the insulator (322) and the superconducting layer deposits tin, indium, lead etc.
Nagano’038 and Huang’765 are analogous art because they both are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Nagano’038 with the features of Huang’765 because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of Nagano’038 and Huang’765 to form the wire with the through via according to the teachings of Huang’765 with a general motivation of reducing contact resistance.
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Nagano’038 as applied to claim 1 as above, and further in view of Nakamura et al. (JP 2020061554 A, hereinafter Nakamura’554).
Regarding claim 18, Nagano’038 teaches all the limitations described in claim 1.
But Nagano’038 is silent upon the provision of wherein the element includes a quantum chip containing a quantum bit.
However, Nakamura’554 teaches wherein the element includes a quantum chip containing a quantum bit (Quantum Computing Circuit).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of Nagano’038 and Nakamura’554 to use the through-via substrate with quantum chip according to the teachings of Nakamura’554 as through-via substrate is an essential component to connect the quantum chip with supply ground etc.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD M HOQUE whose telephone number is (571)272-6266 and email address is mohammad.hoque@uspto.gov. The examiner can normally be reached 9AM-7PM EST.
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/MOHAMMAD M HOQUE/Primary Examiner, Art Unit 2817
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