DETAILED ACTION
This Office Action is in response to the applicant's application filed May 8th, 2024. In virtue of this communication, claims 16-30 are currently presented in the instant application.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 16-30 are rejected under 35 U.S.C. 103 as being unpatentable over Bour et al. (US 2016/0197232 A1; hereinafter Bour).
With respect to claim 16, Bour discloses a method for manufacturing an optoelectronic semiconductor chip in at least Figs. 17A-17F with Figs. 1A-11D teaching overlapping subject matter, the method comprising:
providing a functional layer stack 115 , wherein the functional layer stack comprises a first layer 104 with a dopant of a first conductivity type (n-doped), an active region 108 arranged on the first layer 104, a second layer 112 with a dopant of a second conductivity type (p-doped) arranged on the active region 108 and a residual oxide layer (native oxide) arranged on at least one side surface of the first layer 104 and/or the second layer 112 and/or the active region 108 (see Figs. 17A, 17B, and paragraphs 71-74, 115);
placing the functional layer stack 115 in a liquid phase chemical reactor (acid dip) (see Figs. 17A, 17B, and paragraph 115);
removing oxygen (native oxide) from the at least one side surface in the liquid phase chemical reactor (acid dip) (see Figs. 17A, 17B, and paragraph 115).
Bour does not explicitly disclose growing an oxidatively stable layer on the at least one side surface in the liquid phase chemical reactor.
However, it is noted that the acid dip includes an HCl or bromine based mixture (see paragraph 115), and the oxidatively stable layer of the instant application comprises an initial material including halides like bromine (see paragraph 27 of originally filed specification). Additionally, the functional layer stack 115 of Bour is made of the same III-V materials as that of the functional layer stack of claimed invention (see paragraph 70 of Bour and paragraph 13 of originally filed specification). Because the same initial material (bromine) is present in the removal of the native oxide from the same functional layer stack materials, a resultant growth of an oxidatively stable layer comprising the bromine on at least one side surface is understood to be present (see MPEP 2144 I and MPEP 2112.01).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the method of Bour would comprise growing an oxidatively stable layer on the at least one side surface in the liquid phase chemical reactor because the prior art optoelectronic semiconductor chip of Bour is understood to be produced by an identical or substantially identical process. Products produced by identical or substantially identical processes, cannot have mutually exclusive properties. A chemical composition and its properties are inseparable. Therefore, if the prior art teaches the identical chemical structure, the properties applicant discloses and/or claims are necessarily present (see MPEP 2112.01).
With respect to claim 17, Bour discloses the method according to claim 16, wherein removing the oxygen from the at least one side surface comprises removing the residual oxide layer (native oxide) from the at least one side surface in a wet etching process (acid dip) (see Figs. 17A, 17B, and paragraph 115).
With respect to claim 18, Bour discloses the method according to claim 16, wherein removing the oxygen from the at least one side surface comprises removing the oxygen from the residual oxide layer (native oxide) by breaking oxide bonds in the residual oxide layer and having the oxygen react with a reactant component (see Figs. 17A, 17B, and paragraph 115). Products produced by identical or substantially identical processes, cannot have mutually exclusive properties. A chemical composition and its properties are inseparable. Therefore, if the prior art teaches the identical chemical structure, the properties applicant discloses and/or claims are necessarily present (see MPEP 2112.01).
With respect to claim 19, Bour discloses the method according to claim 16, wherein providing the functional layer stack 115 comprises epitaxially growing the first layer 104, the second layer 112 and the active region 108 between the first and the second layer by vapor deposition (see Figs. 1A-1F, 11A-11D, 17A-17F, and paragraphs 70, 101, 115; p-n diode layer epitaxially grown; well known that growth substrate used for vapor deposition; see MPEP 2144 I).
With respect to claim 20, Bour discloses the method according to claim 16, wherein providing the functional layer stack 115 comprises structuring (note 118 and 120) the functional layer stack 115, wherein the residual oxide layer (native oxide) is formed along at least a portion of a resulting structure due to the structuring (see Figs. 1A, 1B, 17A, 17B, and paragraphs 74, 115).
With respect to claim 21, Bour discloses the method according to claim 16, wherein the oxidatively stable layer (bromine) is a temporary protection layer (see Figs. 17A, 17B, and paragraph 115; note subsequent in-situ plasma treatment would remove bromine of sidewalls so its temporary).
With respect to claim 22, Bour discloses the method according to claim 21.
Bour does not explicitly disclose wherein the temporary protection layer has a thickness of less than 5 nm.
However, Bour discloses that a subsequent passivation layer 170 has a thickness of less than 5 nm (see Figs. 17C and paragraph 116).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the temporary protection layer of Bour would have a thickness of less than 5 nm because Bour discloses the general conditions of the claim and it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only ordinary skill in the art (see MPEP 2144.05 I). Additionally, it is noted that the specification contains no disclosure of either the critical nature of the claimed dimensions or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the Applicant must show that the chosen dimensions are critical (see MPEP 2144.05 III A).
With respect to claim 23, Bour discloses the method according to claim 21, further comprising placing the functional layer stack 115 in an epi reactor or a deposition chamber after the growing the oxidatively stable layer (see Figs. 17A-17C and paragraph 115, 116; note layer 170 is formed after the acid dip by ALD which is in a different reactor/chamber).
With respect to claim 24, Bour discloses the method according to claim 21, further comprising removing the oxidatively stable layer (bromine) (see Figs. 17A, 17B, and paragraph 115; note subsequent in-situ plasma treatment would remove bromine of sidewalls).
With respect to claim 25, Bour discloses the method according to claim 24, further comprising growing or depositing a permanent protection layer 170 on the at least one side surface (see Fig. 17C and paragraphs 116; passivation provides protection).
With respect to claim 26, Bour discloses the method according to claim 16, further comprising annealing the oxidatively stable layer or a permanent protection layer 170 (see Figs. 6A-6E, 17B, 17C, and paragraphs 88, 115; note passivation layer heating for solid source diffusion and also in-situ plasma treatment).
With respect to claim 27, Bour discloses the method according to claim 16, wherein growing the oxidatively stable layer (bromine) comprises an exposure to an inert gas and an addition of desired reactants (see Figs. 17A, 17B, and paragraph 115; note in-situ plasma treatment with argon, hydrogen, or nitrogen).
With respect to claim 28, Bour discloses the method according to claim 16, wherein the oxidatively stable layer comprises an initial material selected from the group consisting of halides, amines, organic amines, organic imines, sulfides, boranes, thiols, carboxylic acids, phosphonic acids, phosphinic acids, phosphates and salts of phosphates, organic phosphines, multidentate organics, mixed organics, and multidentate polymers (see Figs. 17A, 17B, and paragraph 115; note bromine based mixture, bromine is a halide).
With respect to claim 29, Bour discloses an optoelectronic semiconductor chip in at least Figs. 17A-17F with Figs. 1A-10H teaching overlapping subject matter comprising:
a functional layer stack 115 comprising: a first layer 104 with a dopant of a first conductivity type (n-doped); an active region 108 arranged on the first layer 104; and a second layer 112 with a dopant of a second conductivity type (p-doped) arranged on the active region 108 (see Figs. 17A, 17B, and paragraphs 71-74, 115).
Bour does not explicitly disclose an oxidatively stable layer arranged on at least one side surface of the first layer and/or the second layer and/or the active region, or wherein the oxidatively stable layer comprises an initial material, which is grown in liquid phase.
However, Bour discloses removing oxygen (native oxide) from the at least one side surface in the liquid phase chemical reactor (acid dip) (see Figs. 17A, 17B, and paragraph 115). It is noted that the acid dip includes an HCl or bromine based mixture (see paragraph 115), and the oxidatively stable layer of the instant application comprises an initial material including halides like bromine (see paragraph 27 of originally filed specification). Additionally, the functional layer stack 115 of Bour is made of the same III-V materials as that of the functional layer stack of claimed invention (see paragraph 70 of Bour and paragraph 13 of originally filed specification). Because the same initial material (bromine) is present in the removal of the native oxide, a resultant growth of an oxidatively stable layer comprising the bromine on at least one side surface is understood to be present (see MPEP 2144 I and MPEP 2112.01).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the optoelectronic semiconductor chip of Bour would comprise an oxidatively stable layer (bromine) arranged on at least one side surface of the first layer 104 and/or the second layer 112 and/or the active region 108, wherein the oxidatively stable layer comprises an initial material, which is grown in liquid phase because the prior art optoelectronic semiconductor chip of Bour is understood to be produced by an identical or substantially identical process. Products produced by identical or substantially identical processes, cannot have mutually exclusive properties. A chemical composition and its properties are inseparable. Therefore, if the prior art teaches the identical chemical structure, the properties applicant discloses and/or claims are necessarily present (see MPEP 2112.01).
With respect to claim 30, Bour discloses the optoelectronic semiconductor chip according to claim 29, wherein the oxidatively stable layer comprises the initial material selected from the group consisting of halides, amines, organic amines, organic imines, sulfides, boranes, thiols, carboxylic acids, phosphonic acids, phosphinic acids, phosphates and salts of phosphates, organic phosphines, multidentate organics, mixed organics, and multidentate polymers (see Figs. 17A, 17B, and paragraph 115; note bromine based mixture, bromine is a halide).
Inquiry
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JORDAN M KLEIN whose telephone number is (571)270-7544. The examiner can normally be reached 9:00 am - 5:00 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached at 571-272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/J.M.K/Examiner, Art Unit 2893
/SUE A PURVIS/ Supervisory Patent Examiner, Art Unit 2893
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