DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement(s) (IDS) submitted on 12/16/2025, 07/01/2025 and 05/14/2024 have been considered by the Examiner.
Claim Objections
Claim(s) 1 and 5 are objected to because of the following informalities:
Claim(s) 1 and 5 recite a phrase “… between the voltage and the reference signal;” in paragraph 5 and 2, respectively. Examiner suggests amending the phrase to recite “… between a phase of the voltage and a phase of the reference signal;” to restore clarity.
Claim(s) 1 and 5 recite a phrase “… between the current flowing in the measurement target object and the reference signal;” in paragraph 6 and 3, respectively. Examiner suggests amending the phrase to recite “… between a phase of the current flowing in the measurement target object and a phase of the reference signal;” to restore clarity.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 3 and 5 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by SAITO et al. (JP 2015122701; hereinafter SAITO).
Regarding claim 1, SAITO discloses in figure(s) 1-4 a measurement apparatus comprising:
a current generation circuit (signal source 2; fig. 1) causing an alternating constant current (current @ 1a) corresponding to a reference signal (reference signal S0, sre1, sre2; pg. 6 - signal source 2 amplifies the reference signal S0 to a sine wave voltage S2 and applies the amplified signal to one electrode of the measurement object 100 via the signal supply terminal 1a) with a predetermined frequency (pg. 2 - 128 Hz) to occur and supplying the alternating constant current to a measurement target object (100; pg. 2 - sine wave signal S2 is applied to the measurement object 100 via one signal supply terminal 1a);
a voltage detection circuit (voltage detection unit 4/21) detecting a voltage that has occurred in the measurement target object (100);
a signal generation circuit (current detection unit 3/11, A/D 15) detecting a current flowing in the measurement target object and generating a binary signal synchronized with the detected current (I);
a first synchronous detection unit (22,12) performing synchronous detection of the voltage detected by the voltage detection circuit, based on the reference signal and calculating an amplitude of the voltage and a voltage phase difference that is a phase difference between the voltage and the reference signal (pg. 2 - synchronous detection circuit … detect the amplitude of the input signal by matching the phase of the reference signal with the phase of the input signal);
a second synchronous detection unit (13) performing synchronous detection of the binary signal based on the reference signal and calculating a current phase difference that is a phase difference between the current flowing in the measurement target object and the reference signal (pg. 2 - a phase difference θ is generated between the sine wave signal S1 due to a capacitance component and an inductance component existing in the path of the sine wave current I. It flows to the measuring object 100); and
an arithmetic unit (5/1) calculating electrical characteristics (R) of the measurement target object (pg. 6 - a resistance calculation process for calculating the resistance value R of the object 100) based on the amplitude of the voltage and the voltage phase difference calculated by the first synchronous detection unit, the current phase difference calculated by the second synchronous detection unit, and an amplitude of the current flowing in the measurement target object (pg. 8 - processing unit 5 … amplitude of the sine wave current I is calculated).
Regarding claim 3, SAITO discloses in figure(s) 1-4 the measurement apparatus according to claim 1, wherein the signal generation circuit compares a voltage signal obtained by converting the current flowing in the measurement target object to a voltage (Vi) and a reference voltage and generates the binary signal (Ddc1, ddc2) corresponding to a result of the comparison (pg. 3 - a sine wave voltage Vi output from the current-voltage conversion circuit 11 as a sine wave signal. And the sine wave voltage Vi are synchronously detected by the first reference signal Sre1 and the second reference signal Sre2 synchronized with the sine wave voltage Vi, and the DC component Vdc1 of the sine wave voltage Vi is output. the DC component Vdc1 is one component that indicates the DC component Idc of the sine wave current I.).
Regarding claim 5, SAITO discloses in figure(s) 1-4 a measurement method comprising:
a first step of, by performing synchronous detection (@22,12; fig. 1) of a voltage that occurs in a measurement target object (100; fig. 1) when an alternating constant current corresponding to a reference signal (reference signal S0, sre1, sre2; pg. 6 - signal source 2 amplifies the reference signal S0 to a sine wave voltage S2 and applies the amplified signal to one electrode of the measurement object 100 via the signal supply terminal 1a) with a predetermined frequency is supplied to the measurement target object, based on the reference signal (pg. 2 - 128 Hz), calculating an amplitude of the voltage and a voltage phase difference that is a phase difference between the voltage and the reference signal (pg. 2 - synchronous detection circuit … detect the amplitude of the input signal by matching the phase of the reference signal with the phase of the input signal);
a second step of, by performing synchronous detection (@13) of a binary signal synchronized with a current flowing in the measurement target object when the constant current is supplied to the measurement target object, based on the reference signal, calculating a current phase difference that is a phase difference between the current flowing in the measurement target object and the reference signal (pg. 2 - a phase difference θ is generated between the sine wave signal S1 due to a capacitance component and an inductance component existing in the path of the sine wave current I. It flows to the measuring object 100); and
a third step of calculating (@5/1) electrical characteristics (R) of the measurement target object based on the amplitude of the voltage and the voltage phase difference calculated at the first step and the current phase difference calculated at the second step (pg. 6 - a resistance calculation process for calculating the resistance value R of the object 100).
Allowable Subject Matter
Claim(s) 2 and 4 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 2, the prior arts of record do not fairly teach or suggest “a communication circuit performing, in a state of a first circuit side including the signal generation circuit and a second circuit side including the first synchronous detection unit, the second synchronous detection unit, and the arithmetic unit being electrically insulated from each other, transmission/reception of signals between the first circuit side and the second circuit side” including all of the limitations of the base claim and any intervening claims.
Regarding claim 4, the prior arts of record do not fairly teach or suggest “wherein the first synchronous detection unit calculates the amplitude of the voltage and the voltage phase difference by multiplying a digital signal of the voltage detected by the voltage detection circuit and a digital signal indicating the reference signal and multiplying the digital signal of the voltage detected by the voltage detection circuit and a digital signal with a phase displaced by 900 relative to the reference signal, and the second synchronous detection unit calculates the current phase difference by multiplying the binary signal and the digital signal indicating the reference signal and multiplying the binary signal and the digital signal with the phase displaced by 900 relative to the reference signal” including all of the limitations of the base claim and any intervening claims.
Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
See the List of References cited in the US PT0-892.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AKM ZAKARIA whose telephone number is (571)270-0664. The examiner can normally be reached on 8-5 PM (PST).
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Judy Nguyen can be reached on (571) 272-2258. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/AKM ZAKARIA/
Primary Examiner, Art Unit 2858