DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 11/8/2024, 5/26/2025, 4/3/2026 was filed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2, 8, 11, 13-18 and 20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ma (US 2021/0335221).
Regarding claim 1, Ma discloses, in at least figures 2, 5, 10, 18 and related text, a display substrate, comprising:
a first display region (120, [29]);
the first display region (120, [29]) comprises a plurality of display island regions (122, [49]) spaced apart from each other and a light-transmitting region (121, [49]) located between adjacent display island regions (122, [49]);
at least one of the display island regions (122, [49]) comprises a plurality of first pixel circuits (20, [49]) and a plurality of first light emitting elements (10, [29]) disposed on a base substrate ([59]), at least one first pixel circuit among the plurality of first pixel circuits (20, [49]) is electrically connected with at least one first light emitting element among the plurality of first light emitting elements (10, [29]), and the at least one first pixel circuit is configured to drive the at least one first light emitting element to emit light ([29]);
first pixel circuits (20, [49]) in adjacent display island regions (adjacent 122, [40]) in a first direction (D1 direction) are electrically connected through a first signal trace (horizontal 30, [31]), and first pixel circuits (20, [49]) in adjacent display island region (adjacent 122, [40]) in a second direction (D2 direction) are electrically connected through a second signal trace (vertical 30, [31]); the first direction (D1 direction) intersects with the second direction (D2 direction); and materials of the first signal trace (horizontal 30, [31]) and the second signal trace (vertical 30, [31]) comprise transparent conductive materials ([31]).
Regarding claim 2, Ma discloses the display substrate according to claim 1 as described above.
Ma further discloses, in at least figures 2, 5, 10, 18 and related text, at least portions of the first signal trace (horizontal 30, [31]) and the second signal trace (vertical 30, [31]) are located in the light-transmitting region (121, [49]).
Regarding claim 8, Ma discloses the display substrate according to claim 1 as described above.
Ma further discloses, in at least figures 2, 5, 10, 18 and related text, the plurality of display island regions (122, [49]) are arranged in a plurality of rows and columns (figures), one row of display island regions (122, [49]) comprises a plurality of display island regions (122, [49]) arranged along the first direction (D1 direction, figures), and one column of display island regions (122, [49]) comprises a plurality of display island regions (122, [49]) arranged along the second direction (D2 direction, figures); two adjacent display island regions (122, [49]) in at least one column of display island regions (122, [49]) are arranged every other at least one row (figures), and two adjacent display island regions (122, [49]) in at least one row of display island regions (122, [49]) are arranged every other at least one column (figures).
Regarding claim 11, Ma discloses the display substrate according to claim 1 as described above.
Ma further discloses, in at least figures 2, 5, 10, 18 and related text, the first signal trace (horizontal 30, [31]) and the second signal trace (vertical 30, [31]) are located on a side of the first pixel circuit (20, [49]) away from the base substrate ([59]) and located on a side of the first light emitting element (10, [29]) close to the base substrate ([59]) ([74]).
Regarding claim 13, Ma discloses the display substrate according to claim 1 as described above.
Ma further discloses, in at least figures 2, 5, 10, 18 and related text, the first signal trace (horizontal 30, [31]) is a straight line segment extending along the first direction (D1 direction, figures) and the second signal trace (vertical 30, [31]) is a polyline segment extending along the second direction (D2 direction, figures).
Regarding claim 14, Ma discloses the display substrate according to claim 1 as described above.
Ma further discloses, in at least figures 2, 5, 10, 18 and related text, the first signal trace (horizontal 30, [31]) comprises a first initial connection line for transmitting a first initial signal ([35]), a first scan connection line for transmitting a scan signal ([35]), a second scan connection line for transmitting a first reset control signal, and a light emitting control line for transmitting a light emitting control signal ([35]).
Regarding claim 15, Ma discloses the display substrate according to claim 1 as described above.
Ma further discloses, in at least figures 2, 5, 10, 18 and related text, the second signal trace (vertical 30, [31]) comprises: a data line ([35]), a power supply connection line for transmitting a first voltage signal ([35]).
Regarding claim 16, Ma discloses the display substrate according to claim 1 as described above.
Ma further discloses, in at least figures 2, 5, 10, 18 and related text, a second display region (110, [29], [30]) located on at least one side of the first display region (120, [29]); the second display region (110, [29], [30]) comprises a plurality of second pixel circuits (20, [29]) and a plurality of second light emitting elements (10, [29]) disposed on the base substrate ([59]), at least one second pixel circuit among the plurality of second pixel circuits (20, [29]) is electrically connected with at least one second light emitting element among the plurality of second light emitting elements (10, [29]), and the at least one second pixel circuit is configured to drive the at least one second light emitting element to emit light ([29]).
Regarding claim 17, Ma discloses the display substrate according to claim 1 as described above.
The claimed limitation of " A display apparatus, comprising the display substrate according to claim 1" has not patentable weight because it is interpreted as intended use.
Regarding claim 18, Ma discloses the display substrate according to claim 17 as described above.
Ma further discloses, in at least figures 2, 5, 10, 18 and related text, a sensor (310, [76]) located at one side of a non-display surface of the display substrate (200, [75]), wherein an orthographic projection of the sensor (310, [76]) on the display substrate (200, [75]) is overlapped with the first display region (120, [29]) of the display substrate (200, [75]).
Regarding claim 20, Ma discloses the display substrate according to claim 2 as described above.
Ma further discloses, in at least figures 2, 5, 10, 18 and related text, the plurality of display island regions (122, [49]) are arranged in a plurality of rows and columns (figures), one row of display island regions (122, [49]) comprises a plurality of display island regions (122, [49]) arranged along the first direction (D1 direction, figures), and one column of display island regions (122, [49]) comprises a plurality of display island regions (122, [49]) arranged along the second direction (D2 direction, figures); two adjacent display island regions (122, [49]) in at least one column of display island regions (122, [49]) are arranged every other at least one row (figures), and two adjacent display island regions (122, [49]) in at least one row of display island regions (122, [49]) are arranged every other at least one column (figures).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 3-7 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ma (US 2021/0335221) in view of Zhang (CN 113707704B).
Regarding claim 3, Ma discloses the display substrate according to claim 1 as described above.
Ma does not explicitly disclose four first pixel circuits and four first light emitting elements; the four first pixel circuits are electrically connected with the four first light emitting elements in one-to-one correspondence; the four first pixel circuits are sequentially arranged along the first direction.
Zhang teaches, in at least figures 6b, 13-15, and related text, the device comprising four first pixel circuits (pixel circuits for R/G/B/G, figures) and four first light emitting elements (R/G/B/G, page 13); the four first pixel circuits (pixel circuits for R/G/B/G, figures) are electrically connected with the four first light emitting elements (R/G/B/G, page 13) in one-to-one correspondence; the four first pixel circuits (pixel circuits for R/G/B/G, figures) are sequentially arranged along the first direction (horizontal direction, figures), for the purpose of reducing the power consumption and improving the display quality (page 7).
Ma and Zhang are analogous art because they both are directed to semiconductor device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Ma with the specified features of Zhang because they are from the same field of endeavor.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the structure disclosed in Ma to have the four first pixel circuits and four first light emitting elements; the four first pixel circuits being electrically connected with the four first light emitting elements in one-to-one correspondence; the four first pixel circuits being sequentially arranged along the first direction, as taught by Zhang, for the purpose of reducing the power consumption and improving the display quality (page 7, Zhang).
Regarding claim 4, Ma in view of Zhang discloses the display substrate according to claim 3 as described above.
Zhang further teaches, in at least figures 6b, 13-15, and related text, a first light emitting element (R, page 13) emitting light of a first color (Red, page 13), a first light emitting element (B, page 13) emitting light of a second color (Blue, page 13), and two first light emitting elements (G, page 13) emitting light of a third color (Green, page 13), for the purpose of reducing the power consumption and improving the display quality (page 7).
Regarding claim 5, Ma in view of Zhang discloses the display substrate according to claim 4 as described above.
Zhang further teaches, in at least figures 6b, 13-15, and related text, the first light emitting element emitting light (R, page 13) of the first color (Red, page 13) and the first light emitting element (B, page 13) emitting light of the second color (Blue, page 13) are arranged in a same row, the two first light emitting elements (G, page 13) emitting light of the third color (Green, page 13) are arranged in a same row, and the first light emitting element (R, page 13) of the first color (Red, page 13), one first light emitting element (G, page 13) emitting light of the third color (Green, page 13), the first light emitting element (B, page 13) emitting light of the second color (Blue, page 13), and the other first light emitting element (G, page 13) emitting light of the third color (Green, page 13) are arranged in different columns (figures), for the purpose of reducing the power consumption and improving the display quality (page 7).
Regarding claim 6, Ma in view of Zhang discloses the display substrate according to claim 4 as described above.
Zhang further teaches, in at least figures 6b, 13-15, and related text, orthographic projections of light emitting regions of the two first light emitting elements (G, page 13) emitting light of the third color (Green, page 13) on the base substrate (page 2) are not overlapped with an orthographic projection of an electrically connected first pixel circuit on the base substrate (page 2) (figures); an orthographic projection of a light emitting region of the first light emitting element (R, page 13) of the first color (Red, page 13) on the base substrate (page 2) is overlapped with an orthographic projection of an electrically connected first pixel circuit on the base substrate (page 2) (figures); an orthographic projection of a light emitting region of the first light emitting element (B, page 13) emitting light of the second color (Blue, page 13) on the base substrate (page 2) is overlapped with an orthographic projection of an electrically connected first pixel circuit on the base substrate (page 2) (figures), for the purpose of reducing the power consumption and improving the display quality (page 7).
Regarding claim 7, Ma in view of Zhang discloses the display substrate according to claim 4 as described above.
Zhang further teaches, in at least figures 6b, 13-15, and related text, orthographic projections of the first light emitting elements (G, page 13) emitting light of the third color (Green, page 13) on the base substrate (page 2) are overlapped with an orthographic projection of the second signal trace (42, page 4) on the base substrate (page 2) (figures), for the purpose of reducing the power consumption and improving the display quality (page 7).
Regarding claim 19, Ma in view of Zhang discloses the display substrate according to claim 5 as described above.
Zhang further teaches, in at least figures 6b, 13-15, and related text, orthographic projections of light emitting regions of the two first light emitting elements (G, page 13) emitting light of the third color (Green, page 13) on the base substrate (page 2) are not overlapped with an orthographic projection of an electrically connected first pixel circuit on the base substrate (page 2) (figures); an orthographic projection of a light emitting region of the first light emitting element (R, page 13) of the first color (Red, page 13) on the base substrate (page 2) is overlapped with an orthographic projection of an electrically connected first pixel circuit on the base substrate (page 2) (figures); an orthographic projection of a light emitting region of the first light emitting element (B, page 13) emitting light of the second color (Blue, page 13) on the base substrate (page 2) is overlapped with an orthographic projection of an electrically connected first pixel circuit on the base substrate (page 2) (figures), for the purpose of reducing the power consumption and improving the display quality (page 7).
Allowable Subject Matter
Claim 9 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record neither anticipates nor render obvious the limitations of the base claims 1, 8, and 9 that recite "a third first pixel circuit in a display island region of a k-th row and an m-th column is electrically connected with a first first pixel circuit of a (k+1)-th row and an (m+1)-th column through the second signal trace, and a fourth first pixel circuit in the display island region of the k-th row and the m-th column is electrically connected with a second first pixel circuit of the (k+1)-th row and the (m+1)-th column through the second signal trace; wherein k and m are integers" in combination with other elements of the base claims 1, 8, and 9.
Claim 10 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record neither anticipates nor render obvious the limitations of the base claims 1, 3, and 10 that recite "the second signal trace electrically connected with the first first pixel circuit and the second signal trace electrically connected with the fourth first pixel circuit are substantially symmetrical about a centerline of the four first pixel circuits in the first direction, and the second signal trace electrically connected with the second first pixel circuit and the second signal trace electrically connected with the third first pixel circuit are substantially symmetrical about the centerline of the four first pixel circuits in the first direction" in combination with other elements of the base claims 1, 3, and 10.
Claim 12 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record neither anticipates nor render obvious the limitations of the base claims 1 and 12 that recite " the first signal trace and the second signal trace are of a same layer structure " in combination with other elements of the base claims 1 and 12.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
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/TONG-HO KIM/Primary Examiner, Art Unit 2811
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