Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim Rejections - 35 USC § 102
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 9-10, 18 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kumar et al (US2018/0374736).
Referring to claim 1. Kumar et al (herein “Kumar”) discloses an “Electrostatic Carrier For Die Bonding Applications”. See Figs. 1-20 and respective potions of the specification. Kumar further discloses a processing system configured to process multiple chips (dies), comprising a chip placing apparatus configured to pick up chips and dispose them on an attraction surface of a first electrostatic carrier. Specifically, Kumar discloses a die-assembling system (700) that includes a loading robot (770) having a gripper (778) configured to pick the plurality of dies (780) onto the electrostatic carrier (100), wherein the top surface (112) of the carrier serves as the attraction surface upon which the dies are disposed (See Sect. 006, 0034). Kumar further discloses wherein the chip placing apparatus comprises a placement carrier holder configured to hold the first electrostatic carrier (100) (See at least Sect. 0027, 0033) and that the chip placing apparatus comprises a power supply (145) configured to apply a voltage to the first electrostatic carrier held by the placement carrier holder (See Sect. 0027, 0040).
Referring to claim 9. Kumar discloses the system as described above as set forth above as applied to claim 1. Kumar further discloses a bonding apparatus for assembling a plurality of dies held on an electrostatic carrier onto a substrate, wherein die-assembling system (800) configured to assemble the plurality of dies (780) disposed on the electrostatic carrier with a substrate (875) (See Sects. 0020, 0035) and wherein the carrier holding platform (860) is configured to receive and hold the electrostatic carrier during the die assembly operation, wherein a pocket (864) defined by wall (862) of the carrier holding platform receives and holds the electrostatic carrier (See Sect. 0035), thus teaching bond carrier holder configured to hold an electrostatic carrier. Moreover, Kumar discloses a power supply (865) configured to apply a voltage to the electrostatic carrier held by the bonding carrier holder and a that substrate holder is configured to hold a substate such that the substrate faces the electrostatic carrier held by the bonding carrier holder and specifically a robot (870) having a gripper (878) configured to hold the substrate (875) above the electrostatic carrier (100), wherein an actuator (874) is configured to move the gripper up and down such that the substrate moves toward and away from the plurality of dies electrostatically chucked to the electrostatic carrier on the carrier holding platform. Likewise, Kumar discloses the gripper may be a vacuum chuck, electrostatic chuck, or other suitable substrate holder (See Sect. 0036).
Referring to claim 10. Kumar discloses the system as described above as set forth above as applied to claim 1. Kumar discloses an electrostatic carrier (100) a body (110) having a top surface (112) serving as the attraction surface upon which a plurality of dies (78) are attracted and held (See Sect. 0021), a main body having an electrical insulation property, and that the body (110) of the electrostatic carrier (100) is fabricated from one or more layers of dielectric material vertically stacked on each other, including a middle layer (115) made of dielectric material to avoid electrical arcing issues and additional layers (113, 117) made of dielectric material such as ceramic or polyimide material (Sect. 0022-0024). Further, Kumar discloses multiple attraction electrodes disposed inside the main body and specifically that an electrostatic carrier (500) having a plurality of interdigitated bipolar chucking electrodes (520) disposed within the body, wherein each bipolar chucking electrode (520) is configured to electrostatically attract and secure one die (580) on the top surface (512) of the electrostatic carrier, such that multiple attraction electrodes correspond respectively to the multiple chips (Sect. 0030). Moreover, Kumar discloses a control terminal disposed inside the main body configured to control application of voltage to each of the multiple attraction electrodes independently and that controller (615) controls the open and closed states of switches (125, 125’) to independently control the voltage applied to a first bipolar chucking electrode (120) and a second bipolar chucking electrode (120’) independently of one another, wherein the controller may be located inside the electrostatic carrier (Sect. 0031).
Referring to claim 18. Kumar discloses the system as described above as set forth above as applied to claims 1-3, 8-10. With respect to claim 18, the method described in these claims would inherently result from the use of Kumar’s “Electrostatic Carrier For Die Bonding Applications” as advanced above, as Kumar clearly discloses an apparatus and method of transferring multiple chips held by an electrostatic carrier, bonding the chips to a mounting surface, and separating the chips from the electrostatic carrier by applying a voltage (See at least Sects. 0043, 0049-0050) and claim rejections of claims 1-3, 8-10.
Claim(s) 2 are rejected under 35 U.S.C. 103 as being unpatentable over Kumar et al (US2018/0374736) in view of Hsiao (US20120227886).
Referring to claim 2. Kumar discloses the system as described above as set forth above as applied to claim 1. Kumar further discloses that the chip placing apparatus comprise means for independently controlling the holding state of each chip on the electrostatic carrier. Specifically, Kumar discloses a controller (615) that controls the open and closed states of switches (125, 125’) to independently control a first bipolar chucking electrode (120) relative to a second bipolar chucking electrode (120’), wherein each bipolar chucking electrode is configured to electrostatically attract and secure one die, thereby enabling the holding state of each die to be controlled independently (See Sect. 0030-0031). Kumar does not disclose a communicator configured to transmit a holding control signal for controlling a holding state of each of the multiple chips independently to the first electrostatic carrier. Hsiao discloses a “Substrate Assembly Carrier Using Electrostatic Force”. See Figs. 1-20 and respective portions of the specification. Hsiao further discloses a fully sealed electrostatic chuck carrier having signal receptors (80, 82), disposed within the electrostatic chuck carrier, wherein signal receptor (80) receives an optical activation signal transmitted from outside the carrier, which signal is used to activate charge station (72) to charge the electrodes (28), while signal receptor (82) receives a separate signal, which is transferred to activate discharge station (74) to discharge the electrodes. Thus, Hsiao teaches a communicator configured to receive transmitted holding control signals that control the charge state and holding state of the electrodes within the electrostatic carrier (Sect. 0024). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify the system of Kumar to incorporate the wireless signal receptor of Hsiao for transmitting holding control signals to the electrostatic carrier in order to enable remote, contactless control of the electrode activation state while the carrier is in operation.
Claim(s) 3 is rejected under 35 U.S.C. 103 as being unpatentable over Kumar et al (US2018/0374736) in view of Kiyota (WO2018135492).
Referring to claim 3. Kumar discloses the system as described above as applied to claims 1-2. Kumar discloses the electrostatic carrier (100) holds a plurality of dies (780) on its top surface (attraction surface, 112) via an electrostatic force generated by bipolar chucking electrodes, and transports the dies through subsequent processing and assembly operations (See Sect. 006, 0020, 0034, 0040). Kumar does not disclose a protective film forming apparatus, a processing apparatus configured to grind a non-holding surface side of each of the multiple chips that is not held by the first electrostatic carrier or a protective film removing apparatus configured to remove the first protective film remaining on the attraction side of the first electrostatic carrier. Kiyota discloses a “Method of Processing Semiconductor substrate and device for processing semiconductor substate”. See Figs. 1-30 and respective portions of the specification. Kiyota further discloses a protective film forming apparatus via applying a hardening agent for a protective film to the one surface side of a semiconductor substate on which a plurality of integrated circuit chips are formed, supplying energy to the hardening agent to cure it, and thereby forming a protective film layer on the chip-bearing surface side of the substrate (See Sect. 0009, 0012), a processing apparatus configured to grind the non-holding surface, by teaching shaving (grinding and polishing) the other surface side, the back surface of the semiconductor substate to reduce its thickness after the protective film has been formed on the chip-bearing front surface side (See Sect. 0009, 0013), and a protective film removing apparatus through teaching irradiating the protective film with laser light to generate gas and cause the protective film to peel off from the surface of the wafer, and then lifting and removing the film using an adsorption member (See Sect. 0037). Furthermore, Kiyota discloses a dedicated module (66) for removing a protective film and an adsorption member (662) configured to adsorb onto the surface of the protective film and remove it from the wafer surface (See Sect. 0062). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify the system of Kumar to incorporate the protective film forming, grinding and protective film removing apparatus of Kiyota in order to enable thinning of chips by back surface grinding while the chips are held on the electrostatic carrier, without damaging the chip surfaces facing the attraction surface of the carrier.
Allowable Subject Matter
Claims 4-8, 11-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/TERRELL H MATTHEWS/Primary Examiner, Art Unit 3653
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