DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 02/09/2026 has been entered.
Response to Arguments
Applicant’s arguments with respect to at least independent claims 1 and 13 have been considered, but are not persuasive. The new ground of rejection cites Shimura US 2017/0090257 as teaching the amended claim limitations in claims 1 and 13.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 3, 4 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Hamada KR 20150091258A (see document of 18710360_2025-05-14_KR_20150091258_A_M.pdf) and Shimura US 2017/0090257.
Regarding claim 1, Shimada discloses a display device, in at least figs.1-4B, comprising:
a first transistor (23);
a first conductive layer (7’(7b));
a second conductive layer (11);
a first insulating layer (9);
a second insulating layer (18);
an alignment film (16 or 18a); and
a liquid crystal layer (17),
wherein the first transistor is electrically connected to the first conductive layer (see figs.2B and 4B),
wherein the first insulating layer is provided over the first transistor and the first conductive layer (see figs.2B and 4B),
wherein the first insulating layer comprises an opening portion (10) penetrating the first insulating layer in a region overlapping the first conductive layer (see figs.2A and 4A),
wherein the second conductive layer is provided to be in contact with a top surface of the first insulating layer (see figs.2A and 4A), a side surface of the opening portion (see figs.2A and 4A), and the first conductive layer exposed to a bottom portion of the opening portion (see figs.2A and 4A),
wherein the second insulating layer is provided to be in contact with the second conductive layer to fill a step caused by the opening portion (see figs.2A and 4A),
wherein the alignment film (16 or 18a) is provided over the first insulating layer and the second conductive layer,
wherein the liquid crystal layer is provided over the alignment film (see figs.2A and 4A),
wherein the first conductive layer (ITO), the second conductive layer (ITO), the first insulating layer (made of transparent acrylic resin), and the second insulating layer (made of transparent acrylic resin, col.8, lines 1-7) each have a property of transmitting visible light,
wherein a width of the bottom portion of the opening portion is less than or equal to 3 µm (see figs.2A and 4A and col.8 and lines 51-52, a width of the bottom portion of the opening portion is less than the thickness/height of layer 9, so that a width of the bottom portion of the opening portion is less than or equal to 3 µm), and
wherein a width (W2) of the first conductive layer is less than or equal to twice the width (W1) of the bottom portion of the opening portion and the width of the first conductive layer is greater than the width of the bottom portion of the opening portion (see annotated fig.1 below discloses W2 is less than or equal to twice W1 and W2 greater than W1).
PNG
media_image1.png
408
606
media_image1.png
Greyscale
PNG
media_image2.png
889
661
media_image2.png
Greyscale
Shimada does not explicitly disclose a third conductive layer is provided to be in contact with the second conductive layer and the second insulating layer, the third conductive layer is provided over the second conductive layer, the alignment film is provided over the third conductive layer and the third conductive layer has a property of transmitting visible light, and the width of the first conductive layer is less than or equal to 1.5 times the width of the bottom portion of the opening portion.
Hamada discloses a display device, in at least figs.4-6, a third conductive layer (110 or 110-2, made of ITO, page 10, bottom up lines 1-4) is provided to be in contact with the second conductive layer (108, made of ITO, page 10, bottom up lines 1-4) and the second insulating layer (109 or 109-2, page 8, bottom up 4th paragraph), the third conductive layer is provided over the second conductive layer (see figs.4 and 6), the alignment film (140) is provided over the third conductive layer (see figs.4 and 6) and the third conductive layer has a property of transmitting visible light (the third conductive layer is made of ITO, page 10, bottom up lines 1-4) for the purpose of reducing disturbances of liquid crystal caused by the contact hole and improving characteristics (page 12, 4th paragraph).
Shimura discloses a display device, in at least figs.1-3 and 7-12, the width (W) of the first conductive layer (107) is less than or equal to 1.5 times the width (dv, dh or d) of the bottom portion of the opening portion (130)(see fig.2 below and table 8 and claim 4, dv, dh or d can be 4 µm or less and can be 3 µm) for the purpose of preventing generation of display unevenness (para.66).
PNG
media_image3.png
860
828
media_image3.png
Greyscale
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a third conductive layer is provided to be in contact with the second conductive layer and the second insulating layer, the third conductive layer is provided over the second conductive layer, the alignment film is provided over the third conductive layer and the third conductive layer has a property of transmitting visible light, and the width of the first conductive layer is less than or equal to 1.5 times the width of the bottom portion of the opening portion as taught by Hamada and Shimura in the display device of Shimada for the purpose of reducing disturbances of liquid crystal caused by the contact hole and improving characteristics and preventing generation of display unevenness.
Regarding claim 3, Shimada discloses a semiconductor layer (4), wherein the semiconductor layer comprises a channel formation region of the first transistor (see figs.2B and 4B), wherein the first conductive layer comprises a metal oxide (ITO), and wherein the first conductive layer is electrically connected to the semiconductor layer through a metal layer (8b).
Regarding claim 4, Shimada discloses the first conductive layer and the metal layer are configured to function as one electrode of a capacitor (col.5, line 65-col.6, line 8).
Regarding claim 13, Shimada discloses a display device comprising:
a first transistor (23);
a first conductive layer (7’(7b));
a second conductive layer (11);
a first insulating layer (9);
a second insulating layer (18);
an alignment film (16 or 18a); and
a liquid crystal layer (17),
wherein the first transistor is electrically connected to the first conductive layer (see figs.2B and 4B),
wherein the first insulating layer is provided over the first transistor and the first conductive layer (see figs.2B and 4B),
wherein the first insulating layer comprises an opening portion (10) penetrating the first insulating layer in a region overlapping the first conductive layer (see figs.2A and 4A),
wherein the second conductive layer is provided to be in contact with a top surface of the first insulating layer (see figs.2A and 4A), a side surface of the opening portion (see figs.2A and 4A), and a top surface of the first conductive layer (see figs.2A and 4A),
wherein the second insulating layer is provided to be in contact with the second conductive layer (see figs.2A and 4A),
wherein the alignment film (16 or 18a) is provided over the first insulating layer and the second conductive layer,
wherein the liquid crystal layer is provided over the alignment film (see figs.2A and 4A),
wherein the first conductive layer (ITO), the second conductive layer (ITO), the first insulating layer (made of transparent acrylic resin), and the second insulating layer (made of transparent acrylic resin, col.8, lines 1-7) each have a property of transmitting visible light,
wherein a width of the bottom portion of the opening portion is less than or equal to 3 µm (see figs.2A and 4A and col.8 and lines 51-52, a width of the bottom portion of the opening portion is less than the thickness/height of layer 9, so that a width of the bottom portion of the opening portion is less than or equal to 3 µm), and
wherein a width (W2) of the first conductive layer is less than or equal to twice the width (W1) of the bottom portion of the opening portion and the width of the first conductive layer is greater than the width of the bottom portion of the opening portion (see annotated fig.1 below discloses W2 is less than or equal to twice W1 and W2 greater than W1).
PNG
media_image1.png
408
606
media_image1.png
Greyscale
PNG
media_image2.png
889
661
media_image2.png
Greyscale
Shimada does not explicitly disclose a third conductive layer is provided to be in contact with the second conductive layer and the second insulating layer, the third conductive layer is provided over the second conductive layer, the alignment film is provided over the third conductive layer and the third conductive layer has a property of transmitting visible light, and the width of the first conductive layer is less than or equal to 1.5 times the width of the bottom portion of the opening portion.
Hamada discloses a display device, in at least figs.4-6, a third conductive layer (110 or 110-2, made of ITO, page 10, bottom up lines 1-4) is provided to be in contact with the second conductive layer (108, made of ITO, page 10, bottom up lines 1-4) and the second insulating layer (109 or 109-2, page 8, bottom up 4th paragraph), the third conductive layer is provided over the second conductive layer (see figs.4 and 6), the alignment film (140) is provided over the third conductive layer (see figs.4 and 6) and the third conductive layer has a property of transmitting visible light (the third conductive layer is made of ITO, page 10, bottom up lines 1-4) for the purpose of reducing disturbances of liquid crystal caused by the contact hole and improving characteristics (page 12, 4th paragraph).
Shimura discloses a display device, in at least figs.1-3 and 7-12, the width (W) of the first conductive layer (107) is less than or equal to 1.5 times the width (dv, dh or d) of the bottom portion of the opening portion (130)(see fig.2 below and table 8 and claim 4, dv, dh or d can be 4 µm or less and can be 3 µm) for the purpose of preventing generation of display unevenness (para.66).
PNG
media_image3.png
860
828
media_image3.png
Greyscale
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a third conductive layer is provided to be in contact with the second conductive layer and the second insulating layer, the third conductive layer is provided over the second conductive layer, the alignment film is provided over the third conductive layer and the third conductive layer has a property of transmitting visible light, and the width of the first conductive layer is less than or equal to 1.5 times the width of the bottom portion of the opening portion as taught by Hamada and Shimura in the display device of Shimada for the purpose of reducing disturbances of liquid crystal caused by the contact hole and improving characteristics and preventing generation of display unevenness.
Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Hamada KR 20150091258A and Shimura US 2017/0090257 as applied to claim 1 above, and further in view of Yoo US 2006/0164352.
Regarding claim 2, Shimada discloses a light-blocking layer (13) is provided over the liquid crystal layer, wherein in a plan view, the light-blocking layer does not comprise a region overlapping the opening portion (see figs.2A and 4A).
Shimada in view of Hamada and Shimura does not explicitly disclose in the plan view, the light-blocking layer comprises a region overlapping a channel formation region of the first transistor.
Yoo discloses a display device, in at least figs.18 and 19, in the plan view, the light-blocking layer (220) comprises a region overlapping a channel formation region of the first transistor (see fig.19) for the purpose of preventing light leakage in a vicinity of the TFT (para.265 and 266).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have in the plan view, the light-blocking layer comprises a region overlapping a channel formation region of the first transistor as taught by Yoo in the display device of Shimada in view of Hamada and Shimura for the purpose of preventing light leakage in a vicinity of the TFT.
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Hamada KR 20150091258A and Shimura US 2017/0090257 as applied to claim 3 above, and further in view of Takahashi WO 2021038392A1 (see document of 18710360_2025-05-13_WO_2021038392_A1_M.pdf).
Regarding claim 5, Shimada in view of Hamada and Shimura does not explicitly disclose the semiconductor layer comprises a metal oxide.
Takahashi discloses a display device, the semiconductor layer comprises a metal oxide (page 20, lines 5-6) for the purpose of forming the semiconductor layer (page 20, line 5).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the semiconductor layer comprises a metal oxide as taught by Takahashi in the display device of Shimada in view of Hamada and Shimura for the purpose of forming the semiconductor layer.
Claim(s) 6-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Hamada KR 20150091258A and Shimura US 2017/0090257 as applied to claim 1 above, and further in view of Ajichi US 2019/0146277.
Regarding claim 6, Shimada in view of Hamada and Shimura does not explicitly disclose a backlight device, wherein the backlight device comprises a light-emitting diode.
Ajichi discloses a display device, in at least figs.1-3, a backlight device (600), wherein the backlight device comprises a light-emitting diode (63) for the purpose of irradiating the back surface of the liquid crystal panel with backlight light (para.69) and suppressing occurrence of coloration at a screen end portion (abstract).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a backlight device, wherein the backlight device comprises a light-emitting diode as taught by Ajichi in the display device of Shimada in view of Hamada and Shimura for the purpose of irradiating the back surface of the liquid crystal panel with backlight light and suppressing occurrence of coloration at a screen end portion.
Regarding claim 7, Ajichi discloses light emitted from the light-emitting diode is blue light (para.72), wherein a color conversion layer (65, para.73) is provided over the light-emitting diode, and wherein the backlight device emits white light (Abstract and para.73) for the purpose of irradiating the back surface of the liquid crystal panel with backlight light (para.69) and suppressing occurrence of coloration at a screen end portion (abstract). The reason for combining is the same as claim 6.
Regarding claim 8, Ajichi discloses the color conversion layer (the color conversion layer can be a quantum dot sheet, para.99) comprises a quantum dot (para.99) for the purpose of suppressing occurrence of coloration at a screen end portion (abstract) and widening of the color gamut of the liquid crystal display apparatus (para.99). The reason for combining is the same as claim 7.
Claim(s) 9 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Hamada KR 20150091258A, Shimura US 2017/0090257 and Ajichi US 2019/0146277 as applied to claim 6 above, and further in view of Kusunoki US 2020/0403028.
Regarding claims 9 and 10, Ajichi discloses a display device, in at least figs.1-3 and 8, a driver circuit (500 or 50), wherein the light-emitting diode is electrically connected to a second transistor (54), wherein the driver circuit is configured to drive the second transistor (see figs.1 and 8) for the purpose of controlling the luminance of the light source in the backlight device (para.69) and driving blue LEDs (para.80). The reason for combining is the same as claim 6.
Shimada in view of Hamada, Shimura and Ajichi does not explicitly disclose when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit overlaps the light-emitting diode, the second transistor comprises a metal oxide in a channel formation region, and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region.
Kusunoki discloses a display device, in at least fig.6, when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit (130a or 130b in driver circuit, para.141) overlaps the light-emitting diode (110a or 110b), the second transistor (120a or 120b) comprises a metal oxide in a channel formation region (para.140,141 and 136), and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region (para.140,141 and 136) for the purpose of downsizing the display device with narrow frame (para.142).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit overlaps the light-emitting diode, the second transistor comprises a metal oxide in a channel formation region, and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region as taught by Kusunoki in the display device of Shimada in view of Hamada, Shimura and Ajichi for the purpose of downsizing the display device with narrow frame.
Regarding claims 9 and 10, Shimada in view of Hamada, Shimura and Ajichi does not explicitly disclose a driver circuit, wherein the light-emitting diode is electrically connected to a second transistor, wherein the driver circuit is configured to drive the second transistor, when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit overlaps the light-emitting diode, the second transistor comprises a metal oxide in a channel formation region, and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region.
Kusunoki discloses a display device, in at least fig.6, a driver circuit (para.141), wherein the light-emitting diode (110a or 110b) is electrically connected to a second transistor (120a or 120b), wherein the driver circuit is configured to drive the second transistor (see fig.6), when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit overlaps the light-emitting diode (see fig.6), the second transistor comprises a metal oxide in a channel formation region (para.140,141 and 136), and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region (para.140,141 and 136) for the purpose of downsizing the display device with narrow frame (para.142).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a driver circuit, wherein the light-emitting diode is electrically connected to a second transistor, wherein the driver circuit is configured to drive the second transistor, when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit overlaps the light-emitting diode, the second transistor comprises a metal oxide in a channel formation region, and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region as taught by Kusunoki in the display device of Shimada in view of Hamada, Shimura and Ajichi for the purpose of downsizing the display device with narrow frame.
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Hamada KR 20150091258A, Shimura US 2017/0090257 and Ajichi US 2019/0146277 as applied to claim 6 above, and further in view of Takahashi WO 2021038392A1 (see document of 18710360_2025-05-13_WO_2021038392_A1_M.pdf).
Regarding claim 11, Shimada in view of Hamada, Shimura and Ajichi does not explicitly disclose the light-emitting diode is a mini LED or a micro LED.
Takahashi discloses a display device, the light-emitting diode is a mini LED or a micro LED (page 10, bottom up line 6) for the purpose of forming the light-emitting diode (page 10, bottom up line 6) and obtaining a display device with reduced power consumption.
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the light-emitting diode is a mini LED or a micro LED as taught by Takahashi in the display device of Shimada in view of Hamada, Shimura and Ajichi for the purpose of forming the light-emitting diode and obtaining a display device with reduced power consumption.
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Hamada KR 20150091258A and Shimura US 2017/0090257 as applied to claim 1 above, and further in view of Takahashi WO 2021038392A1 (see document of 18710360_2025-05-13_WO_2021038392_A1_M.pdf).
Regarding claim 12, Shimada in view of Hamada and Shimura discloses an electronic device comprising: the display device according to claim 1 (see the rejection of claim 1 above).
Shimada in view of Hamada and Shimura does not explicitly disclose the electronic device comprising a camera.
Takahashi discloses an electronic device, in at least figs.20A the electronic device (6500) comprising a camera (6507) for the purpose of having the electronic device with a camera feature (page 49, lines 10 and 11).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the electronic device comprising a camera as taught by Takahashi in the electronic device of Shimada in view of Hamada and Shimura for the purpose of having the electronic device with a camera feature.
Claim(s) 1, 3, 4 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Saito JP H1138440A and Shimura US 2017/0090257.
Regarding claim 1, Shimada discloses a display device, in at least figs.1-4B, comprising:
a first transistor (23);
a first conductive layer (7’(7b));
a second conductive layer (11);
a first insulating layer (9);
a second insulating layer (18);
an alignment film (16 or 18a); and
a liquid crystal layer (17),
wherein the first transistor is electrically connected to the first conductive layer (see figs.2B and 4B),
wherein the first insulating layer is provided over the first transistor and the first conductive layer (see figs.2B and 4B),
wherein the first insulating layer comprises an opening portion (10) penetrating the first insulating layer in a region overlapping the first conductive layer (see figs.2A and 4A),
wherein the second conductive layer is provided to be in contact with a top surface of the first insulating layer (see figs.2A and 4A), a side surface of the opening portion (see figs.2A and 4A), and the first conductive layer exposed to a bottom portion of the opening portion (see figs.2A and 4A),
wherein the second insulating layer is provided to be in contact with the second conductive layer to fill a step caused by the opening portion (see figs.2A and 4A),
wherein the alignment film is provided over the first insulating layer and the second conductive layer,
wherein the liquid crystal layer is provided over the alignment film (see figs.2A and 4A), and
wherein the first conductive layer (ITO), the second conductive layer (ITO), the first insulating layer (made of transparent acrylic resin), and the second insulating layer (made of transparent acrylic resin, col.8, lines 1-7) each have a property of transmitting visible light,
wherein a width of the bottom portion of the opening portion is less than or equal to 3 µm (see figs.2A and 4A and col.8 and lines 51-52, a width of the bottom portion of the opening portion is less than the thickness/height of layer 9, so that a width of the bottom portion of the opening portion is less than or equal to 3 µm), and
wherein a width (W2) of the first conductive layer is less than or equal to twice the width (W1) of the bottom portion of the opening portion and the width of the first conductive layer is greater than the width of the bottom portion of the opening portion (see annotated fig.1 below discloses W2 is less than or equal to twice W1 and W2 greater than W1).
PNG
media_image1.png
408
606
media_image1.png
Greyscale
PNG
media_image2.png
889
661
media_image2.png
Greyscale
Shimada does not explicitly disclose a third conductive layer is provided to be in contact with the second conductive layer and the second insulating layer, the third conductive layer is provided over the second conductive layer, the alignment film is provided over the third conductive layer and the third conductive layer has a property of transmitting visible light, and the width of the first conductive layer is less than or equal to 1.5 times the width of the bottom portion of the opening portion.
Saito discloses a display device, in at least fig.1, a third conductive layer (16, made of ITO, para.45) is provided to be in contact with the second conductive layer (14, made of ITO, para.44), the third conductive layer is provided over the second conductive layer (see fig.1), the alignment film (an alignment film, para.46) is provided over the third conductive layer (para.46 and fig.1) and the third conductive layer has a property of transmitting visible light (the third conductive layer is made of ITO, para.45) for the purpose of reducing disturbances in the alignment of the liquid crystal layer and improving connection between pixel electrode and the drain electrode (para.26).
Shimura discloses a display device, in at least figs.1-3 and 7-12, the width (W) of the first conductive layer (107) is less than or equal to 1.5 times the width (dv, dh or d) of the bottom portion of the opening portion (130)(see fig.2 below and table 8 and claim 4, dv, dh or d can be 4 µm or less and can be 3 µm) for the purpose of preventing generation of display unevenness (para.66).
PNG
media_image3.png
860
828
media_image3.png
Greyscale
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a third conductive layer is provided to be in contact with the second conductive layer, the third conductive layer is provided over the second conductive layer, the alignment film is provided over the third conductive layer and the third conductive layer has a property of transmitting visible light and the width of the first conductive layer is less than or equal to 1.5 times the width of the bottom portion of the opening portion as taught by Saito and Shimura in the display device of Shimada in order to have a third conductive layer is provided to be in contact with the second conductive layer and the second insulating layer, the third conductive layer is provided over the second conductive layer, the alignment film is provided over the third conductive layer and the third conductive layer has a property of transmitting visible light, and the width of the first conductive layer is less than or equal to 1.5 times the width of the bottom portion of the opening portion because Shimada discloses the second insulating layer is provided to be in contact with the second conductive layer to fill a step caused by the opening portion (see figs.2A and 4A), so that the third conductive layer will be in contact with the second conductive layer and the second insulating layer at the same time for the purpose of reducing disturbances in the alignment of the liquid crystal layer and improving connection between pixel electrode and the drain electrode, and preventing generation of display unevenness.
Regarding claim 3, Shimada discloses a semiconductor layer (4), wherein the semiconductor layer comprises a channel formation region of the first transistor (see figs.2B and 4B), wherein the first conductive layer comprises a metal oxide (ITO), and wherein the first conductive layer is electrically connected to the semiconductor layer through a metal layer (8b).
Regarding claim 4, Shimada discloses the first conductive layer and the metal layer are configured to function as one electrode of a capacitor (col.5, line 65-col.6, line 8).
Regarding claim 13, Shimada discloses a display device comprising:
a first transistor (23);
a first conductive layer (7’(7b));
a second conductive layer (11);
a first insulating layer (9);
a second insulating layer (18);
an alignment film (16 or 18a); and
a liquid crystal layer (17),
wherein the first transistor is electrically connected to the first conductive layer (see figs.2B and 4B),
wherein the first insulating layer is provided over the first transistor and the first conductive layer (see figs.2B and 4B),
wherein the first insulating layer comprises an opening portion (10) penetrating the first insulating layer in a region overlapping the first conductive layer (see figs.2A and 4A),
wherein the second conductive layer is provided to be in contact with a top surface of the first insulating layer (see figs.2A and 4A), a side surface of the opening portion (see figs.2A and 4A), and a top surface of the first conductive layer (see figs.2A and 4A),
wherein the second insulating layer is provided to be in contact with the second conductive layer to fill a step caused by the opening portion (see figs.2A and 4A),
wherein the alignment film (16 or 18a) is provided over the first insulating layer and the second conductive layer,
wherein the liquid crystal layer is provided over the alignment film (see figs.2A and 4A),
wherein the first conductive layer (ITO), the second conductive layer (ITO), the first insulating layer (made of transparent acrylic resin), and the second insulating layer (made of transparent acrylic resin, col.8, lines 1-7) each have a property of transmitting visible light,
wherein a width of the bottom portion of the opening portion is less than or equal to 3 µm (see figs.2A and 4A and col.8 and lines 51-52, a width of the bottom portion of the opening portion is less than the thickness/height of layer 9, so that a width of the bottom portion of the opening portion is less than or equal to 3 µm), and
wherein a width (W2) of the first conductive layer is less than or equal to twice the width (W1) of the bottom portion of the opening portion and the width of the first conductive layer is greater than the width of the bottom portion of the opening portion (see annotated fig.1 below discloses W2 is less than or equal to twice W1 and W2 greater than W1).
PNG
media_image1.png
408
606
media_image1.png
Greyscale
PNG
media_image2.png
889
661
media_image2.png
Greyscale
Shimada does not explicitly disclose a third conductive layer is provided to be in contact with the second conductive layer and the second insulating layer, the third conductive layer is provided over the second conductive layer, the alignment film is provided over the third conductive layer and the third conductive layer has a property of transmitting visible light, and the width of the first conductive layer is less than or equal to 1.5 times the width of the bottom portion of the opening portion.
Saito discloses a display device, in at least fig.1, a third conductive layer (16, made of ITO, para.45) is provided to be in contact with the second conductive layer (14, made of ITO, para.44), the third conductive layer is provided over the second conductive layer (see fig.1), the alignment film (an alignment film, para.46) is provided over the third conductive layer (para.46 and fig.1) and the third conductive layer has a property of transmitting visible light (the third conductive layer is made of ITO, para.45) for the purpose of reducing disturbances in the alignment of the liquid crystal layer and improving connection between pixel electrode and the drain electrode (para.26).
Shimura discloses a display device, in at least figs.1-3 and 7-12, the width (W) of the first conductive layer (107) is less than or equal to 1.5 times the width (dv, dh or d) of the bottom portion of the opening portion (130)(see fig.2 below and table 8 and claim 4, dv, dh or d can be 4 µm or less and can be 3 µm) for the purpose of preventing generation of display unevenness (para.66).
PNG
media_image3.png
860
828
media_image3.png
Greyscale
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a third conductive layer is provided to be in contact with the second conductive layer, the third conductive layer is provided over the second conductive layer, the alignment film is provided over the third conductive layer and the third conductive layer has a property of transmitting visible light and the width of the first conductive layer is less than or equal to 1.5 times the width of the bottom portion of the opening portion as taught by Saito and Shimura in the display device of Shimada in order to have a third conductive layer is provided to be in contact with the second conductive layer and the second insulating layer, the third conductive layer is provided over the second conductive layer, the alignment film is provided over the third conductive layer and the third conductive layer has a property of transmitting visible light, and the width of the first conductive layer is less than or equal to 1.5 times the width of the bottom portion of the opening portion because Shimada discloses the second insulating layer is provided to be in contact with the second conductive layer to fill a step caused by the opening portion (see figs.2A and 4A), so that the third conductive layer will be in contact with the second conductive layer and the second insulating layer at the same time for the purpose of reducing disturbances in the alignment of the liquid crystal layer and improving connection between pixel electrode and the drain electrode, and preventing generation of display unevenness.
Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Saito JP H1138440A and Shimura US 2017/0090257 as applied to claim 1 above, and further in view of Yoo US 2006/0164352.
Regarding claim 2, Shimada discloses a light-blocking layer (13) is provided over the liquid crystal layer, wherein in a plan view, the light-blocking layer does not comprise a region overlapping the opening portion (see figs.2A and 4A).
Shimada in view of Saito and Shimura does not explicitly disclose in the plan view, the light-blocking layer comprises a region overlapping a channel formation region of the first transistor.
Yoo discloses a display device, in at least figs.18 and 19, in the plan view, the light-blocking layer (220) comprises a region overlapping a channel formation region of the first transistor (see fig.19) for the purpose of preventing light leakage in a vicinity of the TFT (para.265 and 266).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have in the plan view, the light-blocking layer comprises a region overlapping a channel formation region of the first transistor as taught by Yoo in the display device of Shimada in view of Saito and Shimura for the purpose of preventing light leakage in a vicinity of the TFT.
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Saito JP H1138440A and Shimura US 2017/0090257 as applied to claim 3 above, and further in view of Takahashi WO 2021038392A1 (see document of 18710360_2025-05-13_WO_2021038392_A1_M.pdf).
Regarding claim 5, Shimada in view of Saito and Shimura does not explicitly disclose the semiconductor layer comprises a metal oxide.
Takahashi discloses a display device, the semiconductor layer comprises a metal oxide (page 20, lines 5-6) for the purpose of forming the semiconductor layer (page 20, line 5).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the semiconductor layer comprises a metal oxide as taught by Takahashi in the display device of Shimada in view of Saito and Shimura for the purpose of forming the semiconductor layer.
Claim(s) 6-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Saito JP H1138440A and Shimura US 2017/0090257 as applied to claim 1 above, and further in view of Ajichi US 2019/0146277.
Regarding claim 6, Shimada in view of Saito and Shimura does not explicitly disclose a backlight device, wherein the backlight device comprises a light-emitting diode.
Ajichi discloses a display device, in at least figs.1-3, a backlight device (600), wherein the backlight device comprises a light-emitting diode (63) for the purpose of irradiating the back surface of the liquid crystal panel with backlight light (para.69) and suppressing occurrence of coloration at a screen end portion (abstract).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a backlight device, wherein the backlight device comprises a light-emitting diode as taught by Ajichi in the display device of Shimada in view of Saito and Shimura for the purpose of irradiating the back surface of the liquid crystal panel with backlight light and suppressing occurrence of coloration at a screen end portion.
Regarding claim 7, Ajichi discloses light emitted from the light-emitting diode is blue light (para.72), wherein a color conversion layer (65, para.73) is provided over the light-emitting diode, and wherein the backlight device emits white light (Abstract and para.73) for the purpose of irradiating the back surface of the liquid crystal panel with backlight light (para.69) and suppressing occurrence of coloration at a screen end portion (abstract). The reason for combining is the same as claim 6.
Regarding claim 8, Ajichi discloses the color conversion layer (the color conversion layer can be a quantum dot sheet, para.99) comprises a quantum dot (para.99) for the purpose of suppressing occurrence of coloration at a screen end portion (abstract) and widening of the color gamut of the liquid crystal display apparatus (para.99). The reason for combining is the same as claim 7.
Claim(s) 9 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Saito JP H1138440A, Shimura US 2017/0090257 and Ajichi US 2019/0146277 as applied to claim 6 above, and further in view of Kusunoki US 2020/0403028.
Regarding claims 9 and 10, Ajichi discloses a display device, in at least figs.1-3 and 8, a driver circuit (500 or 50), wherein the light-emitting diode is electrically connected to a second transistor (54), wherein the driver circuit is configured to drive the second transistor (see figs.1 and 8) for the purpose of controlling the luminance of the light source in the backlight device (para.69) and driving blue LEDs (para.80). The reason for combining is the same as claim 6.
Shimada in view of Saito, Shimura and Ajichi does not explicitly disclose when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit overlaps the light-emitting diode, the second transistor comprises a metal oxide in a channel formation region, and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region.
Kusunoki discloses a display device, in at least fig.6, when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit (130a or 130b in driver circuit, para.141) overlaps the light-emitting diode (110a or 110b), the second transistor (120a or 120b) comprises a metal oxide in a channel formation region (para.140,141 and 136), and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region (para.140,141 and 136) for the purpose of downsizing the display device with narrow frame (para.142).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit overlaps the light-emitting diode, the second transistor comprises a metal oxide in a channel formation region, and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region as taught by Kusunoki in the display device of Shimada in view of Saito, Shimura and Ajichi for the purpose of downsizing the display device with narrow frame.
Regarding claims 9 and 10, Shimada in view of Saito, Shimura and Ajichi does not explicitly disclose a driver circuit, wherein the light-emitting diode is electrically connected to a second transistor, wherein the driver circuit is configured to drive the second transistor, when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit overlaps the light-emitting diode, the second transistor comprises a metal oxide in a channel formation region, and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region.
Kusunoki discloses a display device, in at least fig.6, a driver circuit (para.141), wherein the light-emitting diode (110a or 110b) is electrically connected to a second transistor (120a or 120b), wherein the driver circuit is configured to drive the second transistor (see fig.6), when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit overlaps the light-emitting diode (see fig.6), the second transistor comprises a metal oxide in a channel formation region (para.140,141 and 136), and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region (para.140,141 and 136) for the purpose of downsizing the display device with narrow frame (para.142).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a driver circuit, wherein the light-emitting diode is electrically connected to a second transistor, wherein the driver circuit is configured to drive the second transistor, when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit overlaps the light-emitting diode, the second transistor comprises a metal oxide in a channel formation region, and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region as taught by Kusunoki in the display device of Shimada in view of Saito, Shimura and Ajichi for the purpose of downsizing the display device with narrow frame.
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Saito JP H1138440A, Shimura US 2017/0090257 and Ajichi US 2019/0146277 as applied to claim 6 above, and further in view of Takahashi WO 2021038392A1 (see document of 18710360_2025-05-13_WO_2021038392_A1_M.pdf).
Regarding claim 11, Shimada in view of Saito, Shimura and Ajichi does not explicitly disclose the light-emitting diode is a mini LED or a micro LED.
Takahashi discloses a display device, the light-emitting diode is a mini LED or a micro LED (page 10, bottom up line 6) for the purpose of forming the light-emitting diode (page 10, bottom up line 6) and obtaining a display device with reduced power consumption.
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the light-emitting diode is a mini LED or a micro LED as taught by Takahashi in the display device of Shimada in view of Saito, Shimura and Ajichi for the purpose of forming the light-emitting diode and obtaining a display device with reduced power consumption.
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Saito JP H1138440A and Shimura US 2017/0090257 as applied to claim 1 above, and further in view of Takahashi WO 2021038392A1 (see document of 18710360_2025-05-13_WO_2021038392_A1_M.pdf).
Regarding claim 12, Shimada in view of Saito and Shimura discloses an electronic device comprising: the display device according to claim 1 (see the rejection of claim 1 above).
Shimada in view of Saito and Shimura does not explicitly disclose the electronic device comprising a camera.
Takahashi discloses an electronic device, in at least figs.20A the electronic device (6500) comprising a camera (6507) for the purpose of having the electronic device with a camera feature (page 49, lines 10 and 11).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the electronic device comprising a camera as taught by Takahashi in the electronic device of Shimada in view of Saito and Shimura for the purpose of having the electronic device with a camera feature.
Claim(s) 1, 3, 4 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Saito JP H1138440A and Shimura US 2017/0090257.
Regarding claim 1, Shimada discloses a display device, in at least figs.1-4B, comprising:
a first transistor (23);
a first conductive layer (7’(7b));
a second conductive layer (11);
a first insulating layer (9);
a second insulating layer (18);
an alignment film (16 or 18a); and
a liquid crystal layer (17),
wherein the first transistor is electrically connected to the first conductive layer (see figs.2B and 4B),
wherein the first insulating layer is provided over the first transistor and the first conductive layer (see figs.2B and 4B),
wherein the first insulating layer comprises an opening portion (10) penetrating the first insulating layer in a region overlapping the first conductive layer (see figs.2A and 4A),
wherein the second conductive layer is provided to be in contact with a top surface of the first insulating layer (see figs.2A and 4A), a side surface of the opening portion (see figs.2A and 4A), and the first conductive layer exposed to a bottom portion of the opening portion (see figs.2A and 4A),
wherein the second insulating layer is provided to be in contact with the second conductive layer to fill a step caused by the opening portion (see figs.2A and 4A),
wherein the alignment film (16 or 18a) is provided over the first insulating layer and the second conductive layer,
wherein the liquid crystal layer is provided over the alignment film (see figs.2A and 4A), and
wherein the first conductive layer (ITO), the second conductive layer (ITO), the first insulating layer (made of transparent acrylic resin), and the second insulating layer (made of transparent acrylic resin, col.8, lines 1-7) each have a property of transmitting visible light, and
wherein a width (W2) of the first conductive layer is less than or equal to twice the width (W1) of the bottom portion of the opening portion and the width of the first conductive layer is greater than the width of the bottom portion of the opening portion (see annotated fig.1 below discloses W2 is less than or equal to twice W1 and W2 greater than W1).
PNG
media_image2.png
889
661
media_image2.png
Greyscale
Shimada does not explicitly disclose a third conductive layer is provided to be in contact with the second conductive layer and the second insulating layer, the third conductive layer is provided over the second conductive layer, the alignment film is provided over the third conductive layer and the third conductive layer has a property of transmitting visible light, and a width of the bottom portion of the opening portion is less than or equal to 3 µm, the width of the first conductive layer is less than or equal to 1.5 times the width of the bottom portion of the opening portion.
Saito discloses a display device, in at least fig.1, a third conductive layer (16, made of ITO, para.45) is provided to be in contact with the second conductive layer (14, made of ITO, para.44), the third conductive layer is provided over the second conductive layer (see fig.1), the alignment film (an alignment film, para.46) is provided over the third conductive layer (para.46 and fig.1) and the third conductive layer has a property of transmitting visible light (the third conductive layer is made of ITO, para.45) for the purpose of reducing disturbances in the alignment of the liquid crystal layer and improving connection between pixel electrode and the drain electrode (para.26).
Shimura discloses a display device, in at least figs.1-3 and 7-12, a width (dv, dh or d) of the bottom portion of the opening portion (130) is less than or equal to 3 µm (4 µm or less and can be 3 µm shown in table 8, see claim 4), the width (W) of the first conductive layer (107) is less than or equal to 1.5 times the width of the bottom portion of the opening portion (see fig.2 below) for the purpose of preventing generation of display unevenness (para.66).
PNG
media_image3.png
860
828
media_image3.png
Greyscale
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a third conductive layer is provided to be in contact with the second conductive layer, the third conductive layer is provided over the second conductive layer, the alignment film is provided over the third conductive layer and the third conductive layer has a property of transmitting visible light and a width of the bottom portion of the opening portion is less than or equal to 3 µm, the width of the first conductive layer is less than or equal to 1.5 times the width of the bottom portion of the opening portion as taught by Saito and Shimura in the display device of Shimada in order to have a third conductive layer is provided to be in contact with the second conductive layer and the second insulating layer, the third conductive layer is provided over the second conductive layer, the alignment film is provided over the third conductive layer and the third conductive layer has a property of transmitting visible light, and a width of the bottom portion of the opening portion is less than or equal to 3 µm, the width of the first conductive layer is less than or equal to 1.5 times the width of the bottom portion of the opening portion because Shimada discloses the second insulating layer is provided to be in contact with the second conductive layer to fill a step caused by the opening portion (see figs.2A and 4A), so that the third conductive layer will be in contact with the second conductive layer and the second insulating layer at the same time for the purpose of reducing disturbances in the alignment of the liquid crystal layer and improving connection between pixel electrode and the drain electrode, and preventing generation of display unevenness.
Regarding claim 3, Shimada discloses a semiconductor layer (4), wherein the semiconductor layer comprises a channel formation region of the first transistor (see figs.2B and 4B), wherein the first conductive layer comprises a metal oxide (ITO), and wherein the first conductive layer is electrically connected to the semiconductor layer through a metal layer (8b).
Regarding claim 4, Shimada discloses the first conductive layer and the metal layer are configured to function as one electrode of a capacitor (col.5, line 65-col.6, line 8).
Regarding claim 13, Shimada discloses a display device comprising:
a first transistor (23);
a first conductive layer (7’(7b));
a second conductive layer (11);
a first insulating layer (9);
a second insulating layer (18);
an alignment film (16 or 18a); and
a liquid crystal layer (17),
wherein the first transistor is electrically connected to the first conductive layer (see figs.2B and 4B),
wherein the first insulating layer is provided over the first transistor and the first conductive layer (see figs.2B and 4B),
wherein the first insulating layer comprises an opening portion (10) penetrating the first insulating layer in a region overlapping the first conductive layer (see figs.2A and 4A),
wherein the second conductive layer is provided to be in contact with a top surface of the first insulating layer (see figs.2A and 4A), a side surface of the opening portion (see figs.2A and 4A), and a top surface of the first conductive layer (see figs.2A and 4A),
wherein the second insulating layer is provided to be in contact with the second conductive layer to fill a step caused by the opening portion (see figs.2A and 4A),
wherein the alignment film (16 or 18a) is provided over the first insulating layer and the second conductive layer,
wherein the liquid crystal layer is provided over the alignment film (see figs.2A and 4A), and
wherein the first conductive layer (ITO), the second conductive layer (ITO), the first insulating layer (made of transparent acrylic resin), and the second insulating layer (made of transparent acrylic resin, col.8, lines 1-7) each have a property of transmitting visible light, and
wherein a width (W2) of the first conductive layer is less than or equal to twice the width (W1) of the bottom portion of the opening portion and the width of the first conductive layer is greater than the width of the bottom portion of the opening portion (see annotated fig.1 below discloses W2 is less than or equal to twice W1 and W2 greater than W1).
PNG
media_image2.png
889
661
media_image2.png
Greyscale
Shimada does not explicitly disclose a third conductive layer is provided to be in contact with the second conductive layer and the second insulating layer, the third conductive layer is provided over the second conductive layer, the alignment film is provided over the third conductive layer and the third conductive layer has a property of transmitting visible light, and a width of the bottom portion of the opening portion is less than or equal to 3 µm, the width of the first conductive layer is less than or equal to 1.5 times the width of the bottom portion of the opening portion.
Saito discloses a display device, in at least fig.1, a third conductive layer (16, made of ITO, para.45) is provided to be in contact with the second conductive layer (14, made of ITO, para.44), the third conductive layer is provided over the second conductive layer (see fig.1), the alignment film (an alignment film, para.46) is provided over the third conductive layer (para.46 and fig.1) and the third conductive layer has a property of transmitting visible light (the third conductive layer is made of ITO, para.45) for the purpose of reducing disturbances in the alignment of the liquid crystal layer and improving connection between pixel electrode and the drain electrode (para.26).
Shimura discloses a display device, in at least figs.1-3 and 7-12, a width (dv, dh or d) of the bottom portion of the opening portion (130) is less than or equal to 3 µm (4 µm or less and can be 3 µm shown in table 8, see claim 4), the width (W) of the first conductive layer (107) is less than or equal to 1.5 times the width of the bottom portion of the opening portion (see fig.2 below) for the purpose of preventing generation of display unevenness (para.66).
PNG
media_image3.png
860
828
media_image3.png
Greyscale
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a third conductive layer is provided to be in contact with the second conductive layer, the third conductive layer is provided over the second conductive layer, the alignment film is provided over the third conductive layer and the third conductive layer has a property of transmitting visible light and a width of the bottom portion of the opening portion is less than or equal to 3 µm, the width of the first conductive layer is less than or equal to 1.5 times the width of the bottom portion of the opening portion as taught by Saito and Shimura in the display device of Shimada in order to have a third conductive layer is provided to be in contact with the second conductive layer and the second insulating layer, the third conductive layer is provided over the second conductive layer, the alignment film is provided over the third conductive layer and the third conductive layer has a property of transmitting visible light, and a width of the bottom portion of the opening portion is less than or equal to 3 µm, the width of the first conductive layer is less than or equal to 1.5 times the width of the bottom portion of the opening portion because Shimada discloses the second insulating layer is provided to be in contact with the second conductive layer to fill a step caused by the opening portion (see figs.2A and 4A), so that the third conductive layer will be in contact with the second conductive layer and the second insulating layer at the same time for the purpose of reducing disturbances in the alignment of the liquid crystal layer and improving connection between pixel electrode and the drain electrode, and preventing generation of display unevenness.
Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Saito JP H1138440A and Shimura US 2017/0090257 as applied to claim 1 above, and further in view of Yoo US 2006/0164352.
Regarding claim 2, Shimada discloses a light-blocking layer (13) is provided over the liquid crystal layer, wherein in a plan view, the light-blocking layer does not comprise a region overlapping the opening portion (see figs.2A and 4A).
Shimada in view of Saito and Shimura does not explicitly disclose in the plan view, the light-blocking layer comprises a region overlapping a channel formation region of the first transistor.
Yoo discloses a display device, in at least figs.18 and 19, in the plan view, the light-blocking layer (220) comprises a region overlapping a channel formation region of the first transistor (see fig.19) for the purpose of preventing light leakage in a vicinity of the TFT (para.265 and 266).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have in the plan view, the light-blocking layer comprises a region overlapping a channel formation region of the first transistor as taught by Yoo in the display device of Shimada in view of Saito and Shimura for the purpose of preventing light leakage in a vicinity of the TFT.
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Saito JP H1138440A and Shimura US 2017/0090257 as applied to claim 3 above, and further in view of Takahashi WO 2021038392A1 (see document of 18710360_2025-05-13_WO_2021038392_A1_M.pdf).
Regarding claim 5, Shimada in view of Saito and Shimura does not explicitly disclose the semiconductor layer comprises a metal oxide.
Takahashi discloses a display device, the semiconductor layer comprises a metal oxide (page 20, lines 5-6) for the purpose of forming the semiconductor layer (page 20, line 5).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the semiconductor layer comprises a metal oxide as taught by Takahashi in the display device of Shimada in view of Saito and Shimura for the purpose of forming the semiconductor layer.
Claim(s) 6-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Saito JP H1138440A and Shimura US 2017/0090257 as applied to claim 1 above, and further in view of Ajichi US 2019/0146277.
Regarding claim 6, Shimada in view of Saito and Shimura does not explicitly disclose a backlight device, wherein the backlight device comprises a light-emitting diode.
Ajichi discloses a display device, in at least figs.1-3, a backlight device (600), wherein the backlight device comprises a light-emitting diode (63) for the purpose of irradiating the back surface of the liquid crystal panel with backlight light (para.69) and suppressing occurrence of coloration at a screen end portion (abstract).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a backlight device, wherein the backlight device comprises a light-emitting diode as taught by Ajichi in the display device of Shimada in view of Saito and Shimura for the purpose of irradiating the back surface of the liquid crystal panel with backlight light and suppressing occurrence of coloration at a screen end portion.
Regarding claim 7, Ajichi discloses light emitted from the light-emitting diode is blue light (para.72), wherein a color conversion layer (65, para.73) is provided over the light-emitting diode, and wherein the backlight device emits white light (Abstract and para.73) for the purpose of irradiating the back surface of the liquid crystal panel with backlight light (para.69) and suppressing occurrence of coloration at a screen end portion (abstract). The reason for combining is the same as claim 6.
Regarding claim 8, Ajichi discloses the color conversion layer (the color conversion layer can be a quantum dot sheet, para.99) comprises a quantum dot (para.99) for the purpose of suppressing occurrence of coloration at a screen end portion (abstract) and widening of the color gamut of the liquid crystal display apparatus (para.99). The reason for combining is the same as claim 7.
Claim(s) 9 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Saito JP H1138440A, Shimura US 2017/0090257 and Ajichi US 2019/0146277 as applied to claim 6 above, and further in view of Kusunoki US 2020/0403028.
Regarding claims 9 and 10, Ajichi discloses a display device, in at least figs.1-3 and 8, a driver circuit (500 or 50), wherein the light-emitting diode is electrically connected to a second transistor (54), wherein the driver circuit is configured to drive the second transistor (see figs.1 and 8) for the purpose of controlling the luminance of the light source in the backlight device (para.69) and driving blue LEDs (para.80). The reason for combining is the same as claim 6.
Shimada in view of Saito, Shimura and Ajichi does not explicitly disclose when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit overlaps the light-emitting diode, the second transistor comprises a metal oxide in a channel formation region, and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region.
Kusunoki discloses a display device, in at least fig.6, when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit (130a or 130b in driver circuit, para.141) overlaps the light-emitting diode (110a or 110b), the second transistor (120a or 120b) comprises a metal oxide in a channel formation region (para.140,141 and 136), and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region (para.140,141 and 136) for the purpose of downsizing the display device with narrow frame (para.142).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit overlaps the light-emitting diode, the second transistor comprises a metal oxide in a channel formation region, and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region as taught by Kusunoki in the display device of Shimada in view of Saito, Shimura and Ajichi for the purpose of downsizing the display device with narrow frame.
Regarding claims 9 and 10, Shimada in view of Saito, Shimura and Ajichi does not explicitly disclose a driver circuit, wherein the light-emitting diode is electrically connected to a second transistor, wherein the driver circuit is configured to drive the second transistor, when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit overlaps the light-emitting diode, the second transistor comprises a metal oxide in a channel formation region, and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region.
Kusunoki discloses a display device, in at least fig.6, a driver circuit (para.141), wherein the light-emitting diode (110a or 110b) is electrically connected to a second transistor (120a or 120b), wherein the driver circuit is configured to drive the second transistor (see fig.6), when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit overlaps the light-emitting diode (see fig.6), the second transistor comprises a metal oxide in a channel formation region (para.140,141 and 136), and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region (para.140,141 and 136) for the purpose of downsizing the display device with narrow frame (para.142).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a driver circuit, wherein the light-emitting diode is electrically connected to a second transistor, wherein the driver circuit is configured to drive the second transistor, when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit overlaps the light-emitting diode, the second transistor comprises a metal oxide in a channel formation region, and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region as taught by Kusunoki in the display device of Shimada in view of Saito, Shimura and Ajichi for the purpose of downsizing the display device with narrow frame.
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Saito JP H1138440A, Shimura US 2017/0090257 and Ajichi US 2019/0146277 as applied to claim 6 above, and further in view of Takahashi WO 2021038392A1 (see document of 18710360_2025-05-13_WO_2021038392_A1_M.pdf).
Regarding claim 11, Shimada in view of Saito, Shimura and Ajichi does not explicitly disclose the light-emitting diode is a mini LED or a micro LED.
Takahashi discloses a display device, the light-emitting diode is a mini LED or a micro LED (page 10, bottom up line 6) for the purpose of forming the light-emitting diode (page 10, bottom up line 6) and obtaining a display device with reduced power consumption.
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the light-emitting diode is a mini LED or a micro LED as taught by Takahashi in the display device of Shimada in view of Saito, Shimura and Ajichi for the purpose of forming the light-emitting diode and obtaining a display device with reduced power consumption.
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Saito JP H1138440A and Shimura US 2017/0090257 as applied to claim 1 above, and further in view of Takahashi WO 2021038392A1 (see document of 18710360_2025-05-13_WO_2021038392_A1_M.pdf).
Regarding claim 12, Shimada in view of Saito and Shimura discloses an electronic device comprising: the display device according to claim 1 (see the rejection of claim 1 above).
Shimada in view of Saito and Shimura does not explicitly disclose the electronic device comprising a camera.
Takahashi discloses an electronic device, in at least figs.20A the electronic device (6500) comprising a camera (6507) for the purpose of having the electronic device with a camera feature (page 49, lines 10 and 11).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the electronic device comprising a camera as taught by Takahashi in the electronic device of Shimada in view of Saito and Shimura for the purpose of having the electronic device with a camera feature.
Claim(s) 1, 3, 4 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Hamada KR 20150091258A (see document of 18710360_2025-05-14_KR_20150091258_A_M.pdf) and Shimura US 2017/0090257.
Regarding claim 1, Shimada discloses a display device, in at least figs.1-4B, comprising:
a first transistor (23);
a first conductive layer (7’(7b));
a second conductive layer (11);
a first insulating layer (9);
a second insulating layer (18);
an alignment film (16 or 18a); and
a liquid crystal layer (17),
wherein the first transistor is electrically connected to the first conductive layer (see figs.2B and 4B),
wherein the first insulating layer is provided over the first transistor and the first conductive layer (see figs.2B and 4B),
wherein the first insulating layer comprises an opening portion (10) penetrating the first insulating layer in a region overlapping the first conductive layer (see figs.2A and 4A),
wherein the second conductive layer is provided to be in contact with a top surface of the first insulating layer (see figs.2A and 4A), a side surface of the opening portion (see figs.2A and 4A), and the first conductive layer exposed to a bottom portion of the opening portion (see figs.2A and 4A),
wherein the second insulating layer is provided to be in contact with the second conductive layer to fill a step caused by the opening portion (see figs.2A and 4A),
wherein the alignment film (16 or 18a) is provided over the first insulating layer and the second conductive layer,
wherein the liquid crystal layer is provided over the alignment film (see figs.2A and 4A), and
wherein the first conductive layer (ITO), the second conductive layer (ITO), the first insulating layer (made of transparent acrylic resin), and the second insulating layer (made of transparent acrylic resin, col.8, lines 1-7) each have a property of transmitting visible light, and
wherein a width (W2) of the first conductive layer is less than or equal to twice the width (W1) of the bottom portion of the opening portion and the width of the first conductive layer is greater than the width of the bottom portion of the opening portion (see annotated fig.1 below discloses W2 is less than or equal to twice W1 and W2 greater than W1).
PNG
media_image2.png
889
661
media_image2.png
Greyscale
Shimada does not explicitly disclose a third conductive layer is provided to be in contact with the second conductive layer and the second insulating layer, the third conductive layer is provided over the second conductive layer, the alignment film is provided over the third conductive layer and the third conductive layer has a property of transmitting visible light, and a width of the bottom portion of the opening portion is less than or equal to 3 µm, the width of the first conductive layer is less than or equal to 1.5 times the width of the bottom portion of the opening portion.
Hamada discloses a display device, in at least figs.4-6, a third conductive layer (110 or 110-2, made of ITO, page 10, bottom up lines 1-4) is provided to be in contact with the second conductive layer (108, made of ITO, page 10, bottom up lines 1-4) and the second insulating layer (109 or 109-2, page 8, bottom up 4th paragraph), the third conductive layer is provided over the second conductive layer (see figs.4 and 6), the alignment film (140) is provided over the third conductive layer (see figs.4 and 6) and the third conductive layer has a property of transmitting visible light (the third conductive layer is made of ITO, page 10, bottom up lines 1-4) for the purpose of reducing disturbances of liquid crystal caused by the contact hole and improving characteristics (page 12, 4th paragraph).
Shimura discloses a display device, in at least figs.1-3 and 7-12, a width (dv, dh or d) of the bottom portion of the opening portion (130) is less than or equal to 3 µm (4 µm or less and can be 3 µm shown in table 8, see claim 4), the width (W) of the first conductive layer (107) is less than or equal to 1.5 times the width of the bottom portion of the opening portion (see fig.2 below) for the purpose of preventing generation of display unevenness (para.66).
PNG
media_image3.png
860
828
media_image3.png
Greyscale
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a third conductive layer is provided to be in contact with the second conductive layer and the second insulating layer, the third conductive layer is provided over the second conductive layer, the alignment film is provided over the third conductive layer and the third conductive layer has a property of transmitting visible light, and a width of the bottom portion of the opening portion is less than or equal to 3 µm, the width of the first conductive layer is less than or equal to 1.5 times the width of the bottom portion of the opening portion as taught by Hamada and Shimura in the display device of Shimada for the purpose of reducing disturbances of liquid crystal caused by the contact hole and improving characteristics and preventing generation of display unevenness.
Regarding claim 3, Shimada discloses a semiconductor layer (4), wherein the semiconductor layer comprises a channel formation region of the first transistor (see figs.2B and 4B), wherein the first conductive layer comprises a metal oxide (ITO), and wherein the first conductive layer is electrically connected to the semiconductor layer through a metal layer (8b).
Regarding claim 4, Shimada discloses the first conductive layer and the metal layer are configured to function as one electrode of a capacitor (col.5, line 65-col.6, line 8).
Regarding claim 13, Shimada discloses a display device comprising:
a first transistor (23);
a first conductive layer (7’(7b));
a second conductive layer (11);
a first insulating layer (9);
a second insulating layer (18);
an alignment film (16 or 18a); and
a liquid crystal layer (17),
wherein the first transistor is electrically connected to the first conductive layer (see figs.2B and 4B),
wherein the first insulating layer is provided over the first transistor and the first conductive layer (see figs.2B and 4B),
wherein the first insulating layer comprises an opening portion (10) penetrating the first insulating layer in a region overlapping the first conductive layer (see figs.2A and 4A),
wherein the second conductive layer is provided to be in contact with a top surface of the first insulating layer (see figs.2A and 4A), a side surface of the opening portion (see figs.2A and 4A), and a top surface of the first conductive layer (see figs.2A and 4A),
wherein the second insulating layer is provided to be in contact with the second conductive layer (see figs.2A and 4A),
wherein the alignment film (16 or 18a) is provided over the first insulating layer and the second conductive layer,
wherein the liquid crystal layer is provided over the alignment film (see figs.2A and 4A), and
wherein the first conductive layer (ITO), the second conductive layer (ITO), the first insulating layer (made of transparent acrylic resin), and the second insulating layer (made of transparent acrylic resin, col.8, lines 1-7) each have a property of transmitting visible light, and
wherein a width (W2) of the first conductive layer is less than or equal to twice the width (W1) of the bottom portion of the opening portion and the width of the first conductive layer is greater than the width of the bottom portion of the opening portion (see annotated fig.1 below discloses W2 is less than or equal to twice W1 and W2 greater than W1).
PNG
media_image2.png
889
661
media_image2.png
Greyscale
Shimada does not explicitly disclose a third conductive layer is provided to be in contact with the second conductive layer and the second insulating layer, the third conductive layer is provided over the second conductive layer, the alignment film is provided over the third conductive layer and the third conductive layer has a property of transmitting visible light, and a width of the bottom portion of the opening portion is less than or equal to 3 µm, the width of the first conductive layer is less than or equal to 1.5 times the width of the bottom portion of the opening portion.
Hamada discloses a display device, in at least figs.4-6, a third conductive layer (110 or 110-2, made of ITO, page 10, bottom up lines 1-4) is provided to be in contact with the second conductive layer (108, made of ITO, page 10, bottom up lines 1-4) and the second insulating layer (109 or 109-2, page 8, bottom up 4th paragraph), the third conductive layer is provided over the second conductive layer (see figs.4 and 6), the alignment film (140) is provided over the third conductive layer (see figs.4 and 6) and the third conductive layer has a property of transmitting visible light (the third conductive layer is made of ITO, page 10, bottom up lines 1-4) for the purpose of reducing disturbances of liquid crystal caused by the contact hole and improving characteristics (page 12, 4th paragraph).
Shimura discloses a display device, in at least figs.1-3 and 7-12, a width (dv, dh or d) of the bottom portion of the opening portion (130) is less than or equal to 3 µm (4 µm or less and can be 3 µm shown in table 8, see claim 4), the width (W) of the first conductive layer (107) is less than or equal to 1.5 times the width of the bottom portion of the opening portion (see fig.2 below) for the purpose of preventing generation of display unevenness (para.66).
PNG
media_image3.png
860
828
media_image3.png
Greyscale
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a third conductive layer is provided to be in contact with the second conductive layer and the second insulating layer, the third conductive layer is provided over the second conductive layer, the alignment film is provided over the third conductive layer and the third conductive layer has a property of transmitting visible light, and a width of the bottom portion of the opening portion is less than or equal to 3 µm, the width of the first conductive layer is less than or equal to 1.5 times the width of the bottom portion of the opening portion as taught by Hamada and Shimura in the display device of Shimada for the purpose of reducing disturbances of liquid crystal caused by the contact hole and improving characteristics and preventing generation of display unevenness.
Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Hamada KR 20150091258A and Shimura US 2017/0090257 as applied to claim 1 above, and further in view of Yoo US 2006/0164352.
Regarding claim 2, Shimada discloses a light-blocking layer (13) is provided over the liquid crystal layer, wherein in a plan view, the light-blocking layer does not comprise a region overlapping the opening portion (see figs.2A and 4A).
Shimada in view of Hamada and Shimura does not explicitly disclose in the plan view, the light-blocking layer comprises a region overlapping a channel formation region of the first transistor.
Yoo discloses a display device, in at least figs.18 and 19, in the plan view, the light-blocking layer (220) comprises a region overlapping a channel formation region of the first transistor (see fig.19) for the purpose of preventing light leakage in a vicinity of the TFT (para.265 and 266).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have in the plan view, the light-blocking layer comprises a region overlapping a channel formation region of the first transistor as taught by Yoo in the display device of Shimada in view of Hamada and Shimura for the purpose of preventing light leakage in a vicinity of the TFT.
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Hamada KR 20150091258A and Shimura US 2017/0090257 as applied to claim 3 above, and further in view of Takahashi WO 2021038392A1 (see document of 18710360_2025-05-13_WO_2021038392_A1_M.pdf).
Regarding claim 5, Shimada in view of Hamada and Shimura does not explicitly disclose the semiconductor layer comprises a metal oxide.
Takahashi discloses a display device, the semiconductor layer comprises a metal oxide (page 20, lines 5-6) for the purpose of forming the semiconductor layer (page 20, line 5).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the semiconductor layer comprises a metal oxide as taught by Takahashi in the display device of Shimada in view of Hamada and Shimura for the purpose of forming the semiconductor layer.
Claim(s) 6-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Hamada KR 20150091258A and Shimura US 2017/0090257 as applied to claim 1 above, and further in view of Ajichi US 2019/0146277.
Regarding claim 6, Shimada in view of Hamada and Shimura does not explicitly disclose a backlight device, wherein the backlight device comprises a light-emitting diode.
Ajichi discloses a display device, in at least figs.1-3, a backlight device (600), wherein the backlight device comprises a light-emitting diode (63) for the purpose of irradiating the back surface of the liquid crystal panel with backlight light (para.69) and suppressing occurrence of coloration at a screen end portion (abstract).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a backlight device, wherein the backlight device comprises a light-emitting diode as taught by Ajichi in the display device of Shimada in view of Hamada and Shimura for the purpose of irradiating the back surface of the liquid crystal panel with backlight light and suppressing occurrence of coloration at a screen end portion.
Regarding claim 7, Ajichi discloses light emitted from the light-emitting diode is blue light (para.72), wherein a color conversion layer (65, para.73) is provided over the light-emitting diode, and wherein the backlight device emits white light (Abstract and para.73) for the purpose of irradiating the back surface of the liquid crystal panel with backlight light (para.69) and suppressing occurrence of coloration at a screen end portion (abstract). The reason for combining is the same as claim 6.
Regarding claim 8, Ajichi discloses the color conversion layer (the color conversion layer can be a quantum dot sheet, para.99) comprises a quantum dot (para.99) for the purpose of suppressing occurrence of coloration at a screen end portion (abstract) and widening of the color gamut of the liquid crystal display apparatus (para.99). The reason for combining is the same as claim 7.
Claim(s) 9 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Hamada KR 20150091258A, Shimura US 2017/0090257 and Ajichi US 2019/0146277 as applied to claim 6 above, and further in view of Kusunoki US 2020/0403028.
Regarding claims 9 and 10, Ajichi discloses a display device, in at least figs.1-3 and 8, a driver circuit (500 or 50), wherein the light-emitting diode is electrically connected to a second transistor (54), wherein the driver circuit is configured to drive the second transistor (see figs.1 and 8) for the purpose of controlling the luminance of the light source in the backlight device (para.69) and driving blue LEDs (para.80). The reason for combining is the same as claim 6.
Shimada in view of Hamada, Shimura and Ajichi does not explicitly disclose when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit overlaps the light-emitting diode, the second transistor comprises a metal oxide in a channel formation region, and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region.
Kusunoki discloses a display device, in at least fig.6, when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit (130a or 130b in driver circuit, para.141) overlaps the light-emitting diode (110a or 110b), the second transistor (120a or 120b) comprises a metal oxide in a channel formation region (para.140,141 and 136), and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region (para.140,141 and 136) for the purpose of downsizing the display device with narrow frame (para.142).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit overlaps the light-emitting diode, the second transistor comprises a metal oxide in a channel formation region, and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region as taught by Kusunoki in the display device of Shimada in view of Hamada, Shimura and Ajichi for the purpose of downsizing the display device with narrow frame.
Regarding claims 9 and 10, Shimada in view of Hamada, Shimura and Ajichi does not explicitly disclose a driver circuit, wherein the light-emitting diode is electrically connected to a second transistor, wherein the driver circuit is configured to drive the second transistor, when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit overlaps the light-emitting diode, the second transistor comprises a metal oxide in a channel formation region, and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region.
Kusunoki discloses a display device, in at least fig.6, a driver circuit (para.141), wherein the light-emitting diode (110a or 110b) is electrically connected to a second transistor (120a or 120b), wherein the driver circuit is configured to drive the second transistor (see fig.6), when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit overlaps the light-emitting diode (see fig.6), the second transistor comprises a metal oxide in a channel formation region (para.140,141 and 136), and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region (para.140,141 and 136) for the purpose of downsizing the display device with narrow frame (para.142).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a driver circuit, wherein the light-emitting diode is electrically connected to a second transistor, wherein the driver circuit is configured to drive the second transistor, when seen from a direction perpendicular to a top surface of a substrate over which the driver circuit is formed, at least part of the driver circuit overlaps the light-emitting diode, the second transistor comprises a metal oxide in a channel formation region, and wherein a third transistor included in the driver circuit comprises silicon in a channel formation region as taught by Kusunoki in the display device of Shimada in view of Hamada, Shimura and Ajichi for the purpose of downsizing the display device with narrow frame.
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Hamada KR 20150091258A, Shimura US 2017/0090257 and Ajichi US 2019/0146277 as applied to claim 6 above, and further in view of Takahashi WO 2021038392A1 (see document of 18710360_2025-05-13_WO_2021038392_A1_M.pdf).
Regarding claim 11, Shimada in view of Hamada, Shimura and Ajichi does not explicitly disclose the light-emitting diode is a mini LED or a micro LED.
Takahashi discloses a display device, the light-emitting diode is a mini LED or a micro LED (page 10, bottom up line 6) for the purpose of forming the light-emitting diode (page 10, bottom up line 6) and obtaining a display device with reduced power consumption.
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the light-emitting diode is a mini LED or a micro LED as taught by Takahashi in the display device of Shimada in view of Hamada, Shimura and Ajichi for the purpose of forming the light-emitting diode and obtaining a display device with reduced power consumption.
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimada US Patent 5877832 in view of Hamada KR 20150091258A and Shimura US 2017/0090257 as applied to claim 1 above, and further in view of Takahashi WO 2021038392A1 (see document of 18710360_2025-05-13_WO_2021038392_A1_M.pdf).
Regarding claim 12, Shimada in view of Hamada and Shimura discloses an electronic device comprising: the display device according to claim 1 (see the rejection of claim 1 above).
Shimada in view of Hamada and Shimura does not explicitly disclose the electronic device comprising a camera.
Takahashi discloses an electronic device, in at least figs.20A the electronic device (6500) comprising a camera (6507) for the purpose of having the electronic device with a camera feature (page 49, lines 10 and 11).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the electronic device comprising a camera as taught by Takahashi in the electronic device of Shimada in view of Hamada and Shimura for the purpose of having the electronic device with a camera feature.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JIA X PAN whose telephone number is (571)270-7574. The examiner can normally be reached M-F: 11:00AM - 5:00PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Michael H Caley can be reached at (571)272-2286. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/JIA X PAN/Primary Examiner, Art Unit 2871