/DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2, 4-6, 13, is/are rejected under 35 U.S.C. 102(a1) as being anticipated by Wang et al., (CN-115020508-A included in Applicant submitted IDS filed May 16, 2024).
Claim 1. Wang et al., disclose a preparation method for an IBC cell, comprising the following steps (such as the one in figs. 1-3, wherein is disclosed the manufacturing method of the full-back-contact solar cell according to the embodiment of the invention comprises step S110, step S120, step S130, step S140, step S150, step S160 and step S170):
-(1) subjecting a raw silicon wafer to a texturing treatment, coating a protective layer, and subjecting the protective layer to an etching modification treatment (this limitation would read through the abstract wherein is disclosed a manufacturing method uses silicon nitride mask layer to protect the textured structure of the front face of the substrate, which effectively solves the problem that the polysilicon thin film winding and phosphorus impurity around the cleaning and removing operation is complicated in the process of forming the tunnel passivation contact which is good for simplifying the subsequent cleaning process, figs. 1, 2);
-(2) subjecting the silicon wafer modified to a polishing treatment, and subjecting the silicon wafer polished to LPCVD for growing a TOPC on cell structure (this limitation would read through the reference, wherein is disclosed polishing the back surface of the P-type silicon substrate, so that the back surface of the P-type silicon substrate is formed as a polishing surface), and then performing laser ablation (this limitation would read through the reference, wherein is disclosed removing the second silicon nitride mask opposite to the through hole area by laser etching); and
-(3) cleaning a polycrystalline silicon layer and the protective layer of the silicon wafer after the laser ablation, preparing a passivation layer (this limitation would read through the abstract wherein is disclosed the manufacturing method uses silicon nitride mask layer to protect the textured structure of the front face of the substrate, which effectively solves the problem that the polysilicon thin film winding and phosphorus impurity around the cleaning and removing operation is complicated in the process of forming the tunnel passivation contact which is good for simplifying the subsequent cleaning process), and then performing metallization to obtain the IBC cell (this limitation would read through the abstract wherein is disclosed forming a first electrode with the substrate contact the through hole area, and forming a second contact with the tunnelling passivation contact).
Claim 2. Wang et al., disclose the preparation method according to claim 1, wherein the texturing treatment in step (1) is performed at a temperature of 75-82 °C (this limitation would read through the reference, wherein is disclosed the back surface form a pyramid textured. wherein the alkali etching temperature is 60 degrees centigrade to 95 degrees centigrade).
Claim 4. Wang et al., disclose the preparation method according to claim 1, wherein the preparation method comprises performing pre-alkali washing before the texturing treatment (this limitation would read through the reference, wherein is disclosed the first step, firstly by using KOH solution and the P-type silicon wafer substrate 10 for alkali etching, so that the P-type silicon wafer substrate 10 of the positive surface and the back surface form a pyramid textured. wherein the alkali etching temperature is 60 degrees centigrade to 95 degrees centigrade).
Claim 5. Wang et al., disclose the preparation method according to claim 1, wherein an alkaline solution of the texturing treatment comprises sodium hydroxide and an additive; preferably, in the alkaline solution, the sodium hydroxide has a mass concentration of 1.5-5%; preferably, in the alkaline solution, the additive has a mass concentration of 0.3-1.5%; preferably, the preparation method comprises performing post-alkali washing, acid pickling, slow-lifting, and a drying treatment after the texturing treatment (this limitation would read through the reference, wherein is disclosed the second step, by using the mass percentage concentration is 1 % to 10 % of HF solution or HCl solution to the P-type silicon wafer substrate 10 to acid, to clean and remove the residual impurities on the substrate surface).
Claim 6. Wang et al., disclose the preparation method according to claim 1, wherein a material of the protective layer in step (1) comprises silicon nitride; preferably, the protective layer has a thickness of 60-200 nm (this limitation would read through the reference, wherein is disclosed in one example, the thickness of the first silicon nitride mask is 60 nm ~ 120nm).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or non-obviousness.
Claim(s) 3, 7-8, is/are rejected under 35 U.S.C. 103 as being unpatentable over CN-115020508-A. in view of Meng et al. (U.S. Pub. No. 2025/0126923 A1).
With regard to claim 3, Wang discloses the preparation method according to claim 1, above. Wang appears to not specify wherein the texturing treatment is performed for a period of 400-600s.
However, in a similar process, [0094] of Meng et al., indicates a pretreated silicon wafer substrate 110 is subjected to a texturing treatment in which the silicon wafer substrate 110 having the silicon-containing film 123 and the patterned region 111 is placed in a texturing solution containing a monobasic strong base at a concentration of 0.15 mol/L to 0.35 mol/L for texturing for 400 s to 600 s to prepare the silicon wafer substrate 110 having a textured surface.
At the time of the invention, it would have been obvious to a person having ordinary skill in the art to have optimized the time of the texturing treatment of the substrate and arrive at the claimed range through routine experimentation (see MPEP 2144.05). As well known, the 400–600 s texturing duration in IBC cell preparation is a result of optimizing optical performance, uniformity, compatibility with downstream layers, defect control, and process stability. It ensures the front surface has the right pyramid size and shape to maximize light absorption while maintaining structural integrity for the rest of the cell fabrication sequence.
With regard to claim 7, Wang discloses the preparation method according to claim 1 above, wherein the modification treatment in step (1) comprises an etching treatment; preferably, an etching solution used in the etching treatment comprises hydrofluoric acid (this limitation would read through the reference, wherein is disclosed he second step, by using the mass percentage concentration is 1 % to 10 % of HF solution or HCl solution to the P-type silicon wafer substrate 10 to acid, to clean and remove the residual impurities on the substrate surface).
Wang appears to not preferably specify wherein the hydrofluoric acid has a concentration of 75-85%; preferably, the modification treatment is performed for a period of 30-60 s.
However, in a similar process, [0092] of Meng et al., indicates step of treating the mask layer material coated on the second surface of the substrate 110 with a hydrofluoric acid solution having a concentration of 4 mol/L to 6 mol/L prior to texturing is also included. Further, [0092] discloses the second surface of the substrate 110 is in contact with the hydrofluoric acid solution to remove the silicon oxide mask layer generated by the wrap plating, and the cleaning time is 60s to 240s.
At the time of the invention, it would have been obvious to a person having ordinary skill in the art to have optimized the time of the texturing treatment of the substrate and arrive at the claimed range through routine experimentation (see MPEP 2144.05).
With regard to claim 8, Wang discloses the polishing treatment of the preparation method according to claim 1 above, as indicated in the reference by polishing the back surface of the P-type silicon wafer substrate 10 to form a polishing surface.
Wang appears to not preferably specify wherein, the polishing treatment is performed for a period of 200-300s; preferably, an alkaline solution used in the polishing treatment contains sodium hydroxide by a mass concentration of 1.5-5%; preferably, in the alkaline solution, an additive has a mass concentration of 0.9-1.4%; preferably, the preparation method comprises performing alkali washing, acid pickling, slow-lifting, and a drying treatment after the polishing treatment.
However, in a similar process, [0098] of Meng et al., indicates step after the texturing, the silicon wafer substrate 110 with the textured surface may be subjected to, but is not limited to, water washing, alkaline washing, water washing, acid washing, water washing and drying. Further, [0099] disclose the alkaline washing is carried out using a sodium hydroxide aqueous solution with a substance amount of 0.1% to 0.2%
At the time of the invention, it would have been obvious to a person having ordinary skill in the art to have optimized the time of the texturing treatment of the substrate and arrive at the claimed range through routine experimentation (see MPEP 2144.05). As well known, the 400–600 s texturing duration in IBC cell preparation is a result of optimizing optical performance, uniformity, compatibility with downstream layers, defect control, and process stability. It ensures the front surface has the right pyramid size and shape to maximize light absorption while maintaining structural integrity for the rest of the cell fabrication sequence.
Allowable Subject Matter
4. Claims 9-12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
(A) Claim 9, contain allowable subject matter because none of references of record teach or suggest, either singularly or in combination, at least the limitation of wherein for the growth of the TOPC on cell structure in step (2), a tunnel layer has a thickness of 1.2-1.8 nm; preferably, for the growth of the TOPC on cell structure, a polycrystalline silicon layer has a thickness of 80-180 nm; preferably, for the growth of the TOPC on cell structure, a phosphorus concentration is le20-4e21/cm3.
(B) Claim 10, contains allowable subject matter because none of references of record teach or suggest, either singularly or in combination, at least the limitation of wherein the laser ablation in step (2) is performed at a power of 20-40 W; preferably, the laser ablation is performed at a frequency of 400-800 kHz; preferably, the laser ablation is performed with a busbar width of 800-1000 pm; preferably, the laser ablation is performed with a busbar spacing of 15-20 mm; preferably, the laser ablation is performed with a finger width of 180-250 pm; preferably, the laser ablation is performed with a finger spacing of 1.1-1.5 mm.
(C) Claim 11, contains allowable subject matter because none of references of record teach or suggest, either singularly or in combination, at least the limitation of wherein the polycrystalline silicon layer in step (3) is cleaned at a temperature of 70-85 °C; preferably, the polycrystalline silicon layer is cleaned for a period of 300-450 s; preferably, in a cleaning solution for the polycrystalline silicon layer, NaOH has a concentration of 1.5-5%; preferably, in the cleaning solution for the polycrystalline silicon layer, an additive has a concentration of 0.5-2.5%; preferably, in a cleaning solution for the protective layer, HF has a concentration of 8- 20%; preferably, in the cleaning solution for the protective layer, HCl has a concentration of 4.5-10%; preferably, the protective layer is cleaned for a period of 150-300s.
(D) Claim 12, contains allowable subject matter because none of references of record teach or suggest, either singularly or in combination, at least the limitation of wherein the passivation layer in step (3) comprises an aluminum oxide layer and a silicon nitride layer; preferably, the aluminum oxide layer has a thickness of 2-10 nm; preferably, the silicon nitride layer has a thickness of 60-180 nm; preferably, in the metallization, a laser off/on ratio is (0.5-0.8):0.3; preferably, in the metallization, a silver grid line has an aspect ratio of 1: (3-6); preferably, in the metallization, an aluminum grid line has an aspect ratio of 1: (5-7); preferably, in the metallization, a silver paste has a total wet weight of 120-170 g; preferably, in the metallization, an aluminum paste has a total wet weight of 120-150 g.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILNER JEAN BAPTISTE whose telephone number is (571)270-7394. The examiner can normally be reached M-T 8:00-6:00.
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/W.J/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
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