DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The prior art documents submitted by applicant in the Information Disclosure Statement filed on 05/16/2024 has been considered and made of record.
Specification
The disclosure is objected to because of the following informalities:
Paragraph [0005], row 1, “The present disclosure has been made to solve” should read “The present disclosure has been made in order to solve”.
Paragraphs [0006], [0007], [0008]and [0009], row 2 in all 4 paragraphs: “for marking a semiconductor chip” is repeated twice. One instance should be deleted.
Paragraph [0044] rows 8-12: “Further, as the first, second, and fourth embodiments” should read , Further, as described in the first, second, and fourth embodiments” and “ the recognition pattern changes, a case where the size of the recess portion becomes larger” should read “ the recognition pattern changes, or in a case where the size of the recess portion becomes larger” .
Appropriate correction is required.
The authors collaboration is requested in order to correct other minor informalities that may be present in the specification.
Claim Objections
Claims 3-5, and 8 are objected to because of the following informalities:
Regarding claim 3, “pushing an edge of the recess portion by a probe needle and shaving a part of the edge.” should read “pushing an edge of the recess portion using a probe needle and shaving a part of the edge.”
Regarding claim 4, “marking is performed by opening a hole in the lid portion by a probe needle.” should read “marking is performed by opening a hole in the lid portion using a probe needle.”
Regarding claim 5, “pushing the bar portion by a probe needle which is moved in a direction horizontal to the surface” should read “pushing the bar portion with a probe needle which is moved in a direction parallel to the surface”.
Regarding claim 8, “a recognition pattern protruding from a surface on the surface of the semiconductor substrate” should read “a recognition pattern protruding from a surface .
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1, 6, 9, 10, 12 and 14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation: “a recognition pattern protruding from a surface is formed on the surface of the semiconductor substrate”. The surface from each the recognition pattern protrudes can be interpreted as a surface of the semiconductor chip or a surface of the semiconductor substrate. Therefore, the claim is indefinite. For the purpose of examination, claim 1 will be interpreted as: A method for marking a semiconductor chip, the semiconductor chip including a semiconductor substrate, wherein in the semiconductor chip, a recognition pattern protruding from a surface of the semiconductor substrate is formed on the surface of the semiconductor substrate, and marking is performed by causing the recognition pattern to fall using a probe needle.
Claims 6, 10, 12 and 14 recite the limitation: “wherein a recognition pad is formed on the surface, and when the semiconductor chip is seen in a direction perpendicular to the surface, a shape change between times before and after the marking occurs only in the recognition pad”. The surface from each the recognition pattern protrudes can be interpreted as a surface of the semiconductor chip or a surface of the semiconductor substrate. Therefore, the claims are indefinite. For the purpose of examination, the surface will be interpreted as the surface of the semiconductor substrate. Also, the claim does not require the recognition pad to overlap with the recognition pattern when seen in a direction perpendicular to the surface of the semiconductor, at a time before the marking. If this condition is not satisfied, when the semiconductor chip is seen in a direction perpendicular to the surface of the semiconductor, a shape change between times before and after the marking cannot occur only in the area of the recognition pad. Therefore, the claim is indefinite. For the purpose of examination, claims 6, 10, 12 and 14 will be interpreted as: wherein a recognition pad is formed on the surface of the semiconductor substrate, such that of the semiconductor substrate, a shape change between times before and after the marking occurs only in an area inside the recognition pad.
Claim 9 recites the limitation: “and a first bridge pier and a second bridge pier, which protrude from a surface”. The surface from each the bridge piers protrude can be interpreted as a surface of the semiconductor chip or a surface of the semiconductor substrate. Therefore, the claim is indefinite. For the purpose of examination, claim 9 will be interpreted as: A semiconductor chip comprising: a semiconductor substrate; and a first bridge pier and a second bridge pier, which protrude from a surface of the semiconductor substrate, and a bar portion, which connects together upper portions of the first bridge pier and the second bridge pier, on the surface of the semiconductor substrate, wherein the first bridge pier is thicker than the second bridge pier.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 6, 7 and 8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Maurer et al., (United States Patent Application Publication Number, US 2021/0242148 A1), hereinafter referenced as Maurer.
Regarding claim 1, Maurer teaches a method for marking a semiconductor chip, the semiconductor chip (Fig.1A, element #100_1) including a semiconductor substrate (Fig.1A, element #110), wherein in the semiconductor chip, a recognition pattern protruding from a surface of the semiconductor substrate is formed on the surface of the semiconductor substrate (Fig.7, element #752), and marking is performed by causing the recognition pattern to fall using a probe needle (Fig.7, paragraph [0060], rows 9-18).
Regarding claim 6, Maurer teaches a method of claim 1 as set forth in the anticipation rejection. Maurer further teaches the method for marking a semiconductor chip according to claim 1, wherein a recognition pad is formed on the surface of the semiconductor substrate (Fig.7, element #700), such that of the semiconductor substrate, a shape change between times before and after the marking occurs only in an area inside the recognition pad (Fig.9A and 9B).
Regarding claim 7, Maurer teaches a method of claim 1 as set forth in the anticipation rejection. Maurer further teaches a method for manufacturing a semiconductor chip, wherein the semiconductor chip is manufactured by using the method for marking a semiconductor chip according to claim 1 (Fig.1A, shows the semiconductor device, element #100_1 and manufacturing includes the formation of pattern and marking the pattern).
Regarding claim 8, Maurer teaches a method of claim 1 as set forth in the anticipation rejection. Maurer further teaches a semiconductor chip comprising: a semiconductor substrate (Fig.1A, element #110); and a recognition pattern protruding from a surface .
Claims 1, 6 and 7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Osaka, (Japanese Patent Number, JP 3768071 B2), hereinafter referenced as Osaka.
Regarding claim 1, Osaka teaches a method for marking a semiconductor chip, the semiconductor chip (Fig.5 entire structure) including a semiconductor substrate (Fig.5, element #1), wherein in the semiconductor chip, a recognition pattern protruding from a surface of the semiconductor substrate is formed on the surface of the semiconductor substrate (Fig.6, element #14 in the middle), and marking is performed by causing the recognition pattern to fall using a probe needle (Fig.6, needle #18 causes element #14 to fall and leaves a mark).
Regarding claim 6, Osaka teaches a method of claim 1 as set forth in the anticipation rejection. Osaka further teaches the method for marking a semiconductor chip according to claim 1, wherein a recognition pad is formed on the surface of the semiconductor substrate (Fig.5, element #11), such that of the semiconductor substrate, a shape change between times before and after the marking occurs only in an area inside the recognition pad (falling pattern, element #14, is located inside an area inside the recognition pad, element #11).
Regarding claim 7, Osaka teaches a method of claim 1 as set forth in the anticipation rejection. Osaka further teaches a method for manufacturing a semiconductor chip, wherein the semiconductor chip is manufactured by using the method for marking a semiconductor chip according to claim 1 (Fig.5, shows the semiconductor device, and manufacturing includes the formation of pattern and marking the pattern).
Claim 9 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al., (United States Patent Application Publication Number, US 2020/0243405 A1), hereinafter referenced as Kim.
Regarding claim 9, Kim teaches a semiconductor chip comprising: a semiconductor substrate (Fig.1A, chips #119 must have substrates); and a first bridge pier and a second bridge pier, which protrude from a surface of the semiconductor substrate, and a bar portion, which connects together upper portions of the first bridge pier and the second bridge pier, on the surface of the semiconductor substrate, wherein the first bridge pier is thicker than the second bridge pier (Fig.1A, bridge element #101, the left side pier is thicker in the horizontal direction than the right side pier).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Osaka in view of Maurer.
Regarding claim 2, Osaka teaches a method of claim 1 as set forth in the anticipation rejection. Osaka further teaches the method for marking a semiconductor chip according to claim 1, wherein the recognition pattern is a rectangular cuboid (Fig.5 and Fig 7a show top and side view), a direction perpendicular to the surface of the semiconductor substrate is set as a z direction (Fig.5, vertical direction, perpendicular to the top surface of substrate, element #1), between two orthogonal sides in a plane of the rectangular cuboid, the plane being perpendicular to the z direction, a direction of a short side is set as an x direction (Fig.5, horizontal direction, parallel to the top surface of substrate, element #1), when lengths of the rectangular cuboid in the x direction and the z direction are respectively set as X and Z (Fig.5, Z is length of element #14 in z direction and X is the length of element 14 in the x direction.
Osaka does not teach wherein Z > 2 * X. Maurer teaches, wherein the recognition pattern is a rectangular cuboid (Fig 7 and paragraph [0060], rows 7-8), a direction perpendicular to the surface is set as a z direction (Fig.7, vertical direction, perpendicular to the top surface of element #110), between two orthogonal sides in a plane of the rectangular cuboid, the plane being perpendicular to the z direction, a direction of a short side is set as an x direction (Fig.7, horizontal direction, parallel to the top surface of element #110), when lengths of the rectangular cuboid in the x direction and the z direction are respectively set as X and Z, Z > 2 * X (Fig.7, length of element #752 in z direction is more than twice as large as the length in x direction). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Maurer and disclose the shape of the cuboid as claimed. As disclosed by Maurer, the recognition patterns having this shapes are easy to break upon being press-contacted by a needle tip, and therefore the marking can be easily realized (paragraph [0060], rows 9-12).
Osaka further teaches and when the recognition pattern is caused to fall, a side surface of the rectangular cuboid, the side surface being perpendicular to the x direction, is pushed by the probe needle (Fig.6 and 12 side surface is pushed by the needle).
Allowable Subject Matter
Claim 3 is allowed if amended so that it overcomes the claim objections. Claim 11 is allowed as being dependent of claim 3. Claim 10 is allowed if amended so that it overcomes the 112(b) rejection.
Claim 4 is allowed if amended so that it overcomes the claim objections. Claim 13 is allowed as being dependent of claim 4. Claim 12 is allowed if amended so that it overcomes the 112(b) rejection.
Claim 5 is allowed if amended so that it overcomes the claim objections Claim 15 is allowed as being dependent of claim 5. Claim 14 is allowed if amended so that it overcomes the 112(b) rejection.
The following is a statement of reasons for the indication of allowable subject matter.
Regarding claim 3 the cited prior art does not teach or fairly suggests, along with other
claimed features: “and marking is performed by pushing an edge of the recess portion by a probe needle and shaving a part of the edge”. Jin et al, (KR 2005/0061866 A) teaches a recess portion formed in a surface of top layer of a chip, and not a surface of the semiconductor substrate, and pushing an edge of the recess portion by a probe needle and shaving a part of the edge during testing (Fig.1 and 2). Montoya, (US 6433571 B1) also teaches a recess portion formed in a surface of top layer of a chip, and not a surface of the semiconductor substrate, and pushing an edge of the recess portion by a probe needle and shaving a part of the edge during testing (Fig.2).
Regarding claim 4 the cited prior art does not teach or fairly suggests, along with other
claimed features: “a recess portion and a lid portion covering the recess portion are formed in a surface of the semiconductor substrate, and marking is performed by opening a hole in the lid portion by a probe needle”. Toyoda (US 7675183 B2) teaches a recess formed in the top surface of an insulating layer (Fig.25, top surface of element #70) and a lid covering the recess portion (Fig.25, element #73) and opening a hole in the lid portion by a probe needle (Fig.26). However, the insulating layer cannot be replaced by a semiconductor material.
Regarding claim 5 the cited prior art does not teach or fairly suggests, along with other
claimed features: “and marking is performed by detaching the second bridge pier from the surface by pushing the bar portion by a probe needle which is moved in a direction horizontal to the surface and further by rotating the recognition pattern around the first bridge pier as a center when the semiconductor chip is seen in a direction perpendicular to the surface.” Prior art does not teach or suggest the above limitation.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Butler et al., (US 9,899,332 B2) and Ophir et al. (US 2018/0269091 A1), both teach marking pads using probe needles. Takahashi et al., (US 2008/0197353 A1) teaches forming protrusions above a test pad. Chen at al., (US 6,872,630) teaches recesses in the top surface of a semiconductor substrate used as aligning marks.
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/CRISTIAN A TIVARUS/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
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