DETAILED ACTION
This office action is in response to the reply filed on 12/05/2025.
Claims 1-19 are pending in the application, with claims 2-6, 8-13, and 16-17 having been withdrawn. Claims 1, 7, 14-15, and 18-19 have therefore been examined.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 7, 14-15, and 18-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Bjorklund (U.S. Publication 2010/0312988).
Regarding claims 1 and 18-19, Bjorklund discloses a processing apparatus comprising: decoder circuitry configured to generate control signals in response to an instruction [paragraph 0078; an instruction is decoded]; processing circuitry comprising a plurality of processing lanes, wherein the processing circuitry is configured, in response to the control signals, to perform a vector processing operation in each processing lane of the plurality of processing lanes [paragraphs 0053, 0078; processing occurs in multiple lanes in response to the decoded instruction] for which a per-lane mask indicates that processing for that processing lane is enabled [paragraphs 0068, 0070; a per-lane mask is used to determine whether execution occurs in each lane]; and control circuitry to monitor each processing lane of the plurality of processing lanes for each instruction of a plurality of instructions performed in the plurality of processing lanes and to modify the per-lane mask for a processing lane of the plurality of processing lanes in response to a processing state of the processing lane meeting one or more predetermined conditions [paragraphs 0020, 0033; each processing lane is monitored and the mask is modified based on conditions].
Regarding claim 7, Bjorklund discloses the processing apparatus of claim 1, wherein: the decoder circuitry is responsive to an update-condition instruction specifying a new condition to generate update-condition control signals [paragraph 0033; an instruction is executed that sets the condition codes]; and the processing circuitry is configured, in response to the update-condition control signals, to set the new condition as one of the one or more predetermined conditions [paragraph 0033; the instruction updates the condition codes that are stored].
Regarding claim 14, Bjorklund discloses the processing apparatus of claim 1 wherein: the decode circuitry is responsive to a set-mask instruction specifying a new per-lane mask to generate set-mask control signals [paragraph 0033; an instruction is executed that sets the condition codes]; and the processing circuitry is configured, in response to the set-mask control signals, to set the new per-lane mask as the per-lane mask [paragraph 0033; the instruction updates the condition codes that are stored].
Regarding claim 15, Bjorklund discloses the processing apparatus of claim 1 wherein: the decode circuitry is responsive to a reset-condition instruction to generate reset-condition control signals [paragraphs 0021-0022; a skip end instruction is executed]; and the processing circuitry is configured, in response to the reset-condition control signals to set the predetermined condition to a default predetermined condition [paragraphs 0021-0022; the skip end instruction clears the skip indicator].
Conclusion
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/COREY S FAHERTY/Primary Examiner, Art Unit 2183
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